This adds PLL settings for the ethernet ports of the TP-Link TL-WR1043
v2/v3 and the Openmesh OM5P-AC-v2.
We also change the PLL-settings in the qca9557.dtsi to match the ones
used as default on the ar71xx target.
As of 4b9680f138 those devices have broken ethernet ports as the default
PLL settings defined in the QCA9557.dtsi are applied which are off for
those devices.
Signed-off-by: David Bauer <mail@david-bauer.net>
Fix all issues found by the devicetree compiler like wrong address/size
cells as well as wrong/missing/superfluous unit addresses.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use only the jedec,spi-nor compatible string. Everything else either
never worked or is only support to keep compatibility.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This target can automatically detect the correct memory size and we've
been using it for long in ar71xx.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Add the SoC compatible to the individual dts files. Rename the dts files
to match the common pattern.
Remove dts files wich aren't used and no image in ar71xx exists.
Signed-off-by: Mathias Kresin <dev@kresin.me>
David Bauer
Mathias Kresin
Chuanhong Guo
Johann Neuhauser
John Crispin