This basically selects the new generic MIPS timer code for BCM963xx and
simplifies the timer setup code.
Signed-off-by: Axel Gembe <ago@bastart.eu.org>
SVN-Revision: 11181
The ISR ended up in an endless loop because the TX ISR never got used or masked.
This patch basically makes the TX ISR mask the the TX interrupt when it
encounters it, because it doesn't even use the TX interrupt.
Signed-off-by: Axel Gembe <ago@bastart.eu.org>
SVN-Revision: 11179
This patch adds interrupt handling as on AR7. The old code was very messy and
didn't work too well. It also removes the unused file int-handler.S.
Signed-off-by: Axel Gembe <ago@bastart.eu.org>
SVN-Revision: 11178
The load address for BCM963xx is 0x80010000, not 0xf8001000 as in the current
sources. I think this is just a typo, so this patch fixes it (tested on 96345).
Signed-off-by: Axel Gembe <ago@bastart.eu.org>
SVN-Revision: 11177
This adds CFE tagged image generation in the BCM963xx target image Makefile.
It has to generate its own LZMA compressed kernel because CFE is a LZMA nazi.
It also seems that the Broadcom image tagger as well as CFE use AdvanceCOMP,
which is based on a slightly older LZMA SDK. Anyways, some of the code is
GPL, some of it is LGPL, so it might be that Broadcom owes some sources.
Also, LZMA has a bug which causes it to generate different output when you
are using stdin / stdout compared to plain files. I've just worked around
the issue by using plain files.
Signed-off-by: Axel Gembe <ago@bastart.eu.org>
SVN-Revision: 11171
Current kernels have the same kernel entry as load address, so just set them
like this. Also, the BCM963xx uses 0x80010000 as its load address, so use this
too.
Signed-off-by: Axel Gembe <ago@bastart.eu.org>
SVN-Revision: 11169
Felix Fietkau
Nicolas Thill
Imre Kaloz
Florian Fainelli
Gabor Juhos