As discussed in 1d18a14a90 ("ath79: really fix TP-Link Archer C7
v2 MAC address"), stock firmware MAC address assignment is
actually as follows:
wlan0 (5GHz) : -1
wlan1 (2.4GHz) : 0
eth1 (LAN) : 0
eth0 (WAN) : 1
This has never been fixed for ar71xx, so let's do it now.
Note that with WDR4900 v2 even both wlan0 and wlan1 where assigned
to basemac-1 before ...
Fixes: FS#408
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This fixes commit bae927c551 ("ar71xx: add support for TP-LINK CPE510
V2.0") where the support for this device wasn't optimal.
Device support for the CPE510v2 so far has been a hack to enable
flashing with CPE510v1 images. Those even have different hardware (e.g.
additional ethernet port).
With this patch, we provide proper support for this device in ar71xx.
Installation:
- Flash factory image through stock firmware WEB UI or through TFTP
- To get to TFTP recovery just hold reset button while powering on
for around 4-5 seconds and release.
- Rename factory image to recovery.bin
- Stock TFTP server IP: 192.168.0.100
- Stock device TFTP address: 192.168.0.254
Fixes: bae927c551 ("ar71xx: add support for TP-LINK CPE510 V2.0")
Signed-off-by: Andrew Cameron <apcameron@softhome.net>
[Rebased onto revert commit, changed comments in mach-cpe510.c,
changed commit title and description, fixed eth0 MAC address,
removed eth1 initialization]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[squashed revert, added fixes tag]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
GPIO key labels have been changed to standard ones (rfkill, reset, wps).
It does not affect button functionality.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Without this patch, an extra entry appears for AR9287 GPIO
that duplicates WLAN LED but in fact drives nothing:
gpiochip1: GPIOs 502-511, ath9k-phy0:
gpio-502 ( |netgear:blue:wlan ) out hi
gpio-503 ( |netgear:amber:test ) out hi
gpio-504 ( |netgear:green:power ) out lo
gpio-505 ( |rfkill ) in hi
gpio-507 ( |wps ) in hi
gpio-508 ( |reset ) in hi
gpio-510 ( |ath9k-phy0 ) out hi <===!
The pin pointed above is default LED GPIO (8) for AR9287.
For WNR2200 it is not connected anywhere - pin 0 drives blue WLAN
LED instead - but initialization code is missing that information.
This fix calls ap9x_pci_setup_wmac_led_pin() function at device
setup, forcing WLAN LED pin to be 0 and removing redundant entry.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
In commit 6c937df749 ("ar71xx: wpj531: fix GPIOs for LED") wrong GPIO
13 for SIG1/RSS1 LED was commited, the correct GPIO number for this LED
is 12.
It's listed in "Hardware Guide - wpj531 7A06 (02/07/2019)" as GPIO12/RSS1
on the LED header and same GPIO 12 is used in the vendor's SDK as well.
Fixes: 6c937df749 ("ar71xx: wpj531: fix GPIOs for LED")
Signed-off-by: Leon M. George <leon@georgemail.eu>
[commit subject/message facelift]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The Aerohive HiveAP 121 has the wrong PLL value set for Gigabit speeds,
leading to packet-loss. 10M and 100M work fine.
This commit sets the Gigabit Ethernet PLL value to the correct value,
fixing packet loss.
Confirmed with iperf and floodping.
Signed-off-by: David Bauer <mail@david-bauer.net>
While flashing lots of RB2011 devices, I noticed that
some of them refused to boot properly, failing over the NAND parameters.
Checking in detail shows that some device seem to use another NAND flash
which only support standard 2048-byte pages, without 512-byte subpage support.
This commit disables usage of these small subpage completely.
Advantages:
- Both NAND's with(out) subpage support are working now
- The nand speed increases a bit (measured roughly 1%) in typical usecases
Disadvantages:
- The maximum storage capacity decreases by ~0.2%
as small changes can consume a full page (2048 bytes) now.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
All leds on these boards are green. v1 has RFKILL GPIO 23 for production
units (it had GPIO 13 only for test phase units, and these are rather
very rare to find). As for the previous attempt to fix this and revert
due to WDR boards have blue leds, it was wrong: WDR board does not use
common setup (false).
Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
fixes intermittent loss of connectivity on 1Gbit port, with log message:
> 803x_aneg_done: SGMII link is not ok
Thanks to David Bauer for pointing me in the right direction.
I just had to figure out the right bus_id, which you find in this log:
> ag71xx ag71xx.1: connected to PHY at gpio-1:00 [uid=004dd074,
driver=Atheros 8031 ethernet]
Fixes FS#2236
Signed-off-by: Etienne Champetier <champetier.etienne@gmail.com>
[Wrapped commit message - Fixed whitespace erors]
Signed-off-by: David Bauer <mail@david-bauer.net>
Apply the same approach as in commit 3b53d6fdbc ("ar71xx: fix pci irq
init on kernel 4.14") to fix IRQ initialization for ath79-based chipsets
on rb4xx.
Ref: PR#2182
Acked-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Signed-off-by: W. Michael Petullo <mike@flyn.org>
[commit ref fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The vendor firmware only uses two mac addresses, the mac address on the
label and the label + 1. While checking multiple devices, all labels have
even mac addresses. Concluding only 2 address are assigned to a device.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
CPU: AR9342 SoC
RAM: 64 MB DDR2
Flash: 8 MB NOR SPI
Ports: 100 MBit (24V PoE in)
WLAN: 2.4/5 GHz
UART: 1 UART on PCB marked as J1 with 115200 8N1 config
LEDs: Power, Ethernet, 4x RSSI LEDs (orange, red, 2x green)
Buttons: Reset
UART connection details
.---------------------------------.
| |
[ETH] J1 [ANT]
| o VCC o RX o TX o GND |
`---------------------------------'
Flashing instructions using recovery method over TFTP
1. Unplug the ethernet cable from the router.
2. Using paper clip press and hold the router's reset button. Make sure
you can feel it depressed by the paper clip. Do not release the button
until step 4.
3. While keeping the reset button pressed in, plug the ethernet cable
back into the AP. Keep the reset button depressed until you see the
device's LEDs flashing in upgrade mode (alternating LED1/LED3 and
LED2/LED4), this may take up to 25 seconds.
4. You may release the reset button, now the device should be in TFTP
transfer mode.
5. Set a static IP on your Computer's NIC. A static IP of 192.168.1.25/24
should work.
6. Plug the PoE injector's LAN cable directly to your computer.
7. Start tftp client and issue following commands:
tftp> binary
tftp> connect 192.168.1.20
tftp> put openwrt-ar71xx-generic-ubnt-bullet-m-xw-squashfs-factory.bin
Tested only on Bullet M2HP.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Looks identical to the v2.
This PR adds support for a popular low-cost 2.4GHz N based AP
Specifications:
- SoC: Qualcomm Atheros QCA9533 (650MHz)
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz N based built into SoC 2x2
- Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Robert Marko <robimarko@gmail.com>
[Rebased, adjusted for separate tplink-safeloader entry, dynamic partitioning]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The Mikrotik RouterBOARD SXT 2nD r3 is an outdoor WiFi AP / CPE
with a single 2.4 GHz radio and a 100 Mbps Ethernet port.
The device similar to the SXT 2nD r2, but it has SPI NOR flash instead
of NAND flash.
Hardware
--------
CPU: Atheros AR9344 (600 MHz)
RAM: 64 MiB
FLASH: 16 MiB SPI NOR W25Q128
ETH: 1x 100 Mbps Atheros AG71xx
WiFi: 2T2R 802.11b/g/n (ath9k)
Power: Passive PoE 8-30 V
Installation instructions:
1. Boot openwrt-ar71xx-mikrotik-vmlinux-initramfs.elf using a
DHCP+TFTP server.
2. Erase the "firmware" partition using the mtd command. This should
no longer be required once this patch is merged.
3. Use sysupgrade to install to flash. The file
openwrt-ar71xx-mikrotik-rb-nor-flash-16M-squashfs-sysupgrade.bin
should be used.
Signed-off-by: Xavier Douville <github@douville.org>
fixes intermittent loss of connectivity on 1Gbit port, with
log message:
803x_aneg_done: SGMII link is not ok
Signed-off-by: Mantas Pucka <mantas@8devices.com>
remove USB as this is no LED but power control
rename WiFi LED with correct color red (like in stock firmware)
set middle LED to be used for LAN link/activity
Signed-off-by: Andreas Ziegler <dev@andreas-ziegler.de>
Without this patch PowerCloud CR5000 AR9382 PCIe 5GHz Wifi uses
the mac address from eeprom instead the one specified when
initializing the PCIe chip. There were two issues:
1) ap94_pci_init on the second PCIe wmac is wrong as there is only one
PCIe wmac on this device (the other wmac is the AR1022/AR9342 SoC wmac).
2) Without specifying pdata->use_eeprom there is a failure to load
firmware and caldata.
Thanks to Christian Lamparter (@chunkeey) for the heavy lifting and
help. [0]
[0] <https://github.com/openwrt/openwrt/pull/1613>
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
This add support for TP-Link TL-WA801ND v4 (same as TL-WA801ND v3) :
Specification:
- System-On-Chip: Qualcomm Atheros QCA9533
- CPU/Speed: 650 MHz
- Flash-Chip: Winbond W25Q32BVSIG
- Flash size: 4096 KiB
- RAM: 32 MiB
- Wireless No1: SoC-integrated: QCA9533 2.4GHz 802.11bgn
Flash instructions:
1) To flash the image, rename the file
openwrt-ar71xx-generic-tl-wa801nd-v4-squashfs-factory.bin
to firmware.bin
2) Connect your device to the LAN port, then upload the firmware
through web interface. It will try to download the image and
flash it.
It can take up to 2-3 minutes to finish. When it reaches 100%, the
router will reboot itself.
Signed-off-by: Romain MARIADASSOU <roms2000@free.fr>
RouterBOARD(s) bootloader actully turns Power LED off just before
it starts the kernel. So we need to set the LED default status to On
instead of Keep in order to keep LED on during kernel boot.
This change fixes Power LED off during the kernel boot on the RB91x and
SXT Lite boards.
Fixes: 6cad8ee0bd ("ar71xx: keep the RouterBOARD Power LED in On state")
CC: Mathias Kresin <dev@kresin.me>
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
This adds the build option for UniFi AC Mesh Pro as well as
model detection for it.
The device is a hardware clone of the AC Pro.
- SoC: QCA9563-AL3A (775Mhz)
- RAM: 128MiB
- Flash: 16MiB - dual firmware partitions!
- LAN: 2x 1000M - POE+
- Wireless:
2.4G: QCA9563
5G: UniFi Chip, QCA988X compatible
Signed-off-by: Christoph Krapp <achterin@googlemail.com>
Buttons of AVM FritzBox 4020 are incorrectly flagged as active high.
This was an oversight as RFKill button was working as expected even
with incorrectly flagged GPIO.
Signed-off-by: David Bauer <mail@david-bauer.net>
Netgear WNR612v2 flashed with recent OpenWrt builds suffers from kernel
panic at boot during wireless chip initialization, making device
unusable:
ath: phy0: Ignoring endianness difference in EEPROM magic bytes.
ath: phy0: Enable LNA combining
CPU 0 Unable to handle kernel paging request at virtual address 1000fee1, epc == 801d08f0, ra == 801d0d90
Oops[#1]:
CPU: 0 PID: 469 Comm: kmodloader Not tainted 4.9.120 #0
[ ... register dump etc ... ]
Kernel panic - not syncing: Fatal exception
Rebooting in 1 seconds..
This simple patch fixes above error. It keeps LED table in memory after
kernel init phase for ath9k driver to operate correctly (__initdata
removed).
Also, another bug is fixed - correct array size is provided to function
that adds platform LEDs (this device has only 1 connected to Wifi chip)
preventing code from going outside array bounds.
Fixes: 1f5ea4eae4 ("ar71xx: add correct named default wireless led by using platform leds")
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
[trimmed commit message]
Signed-off-by: Mathias Kresin <dev@kresin.me>
When checking the outcome of the PHY autonegotiation status, at803x
currently returns false in case the SGMII side is not established.
Due to a hardware-bug, ag71xx needs to fixup the SoCs SGMII side, which
it can't as it is not aware of the link-establishment.
This commit allows to ignore the SGMII side autonegotiation status to
allow ag71xx to do the fixup work.
Signed-off-by: David Bauer <mail@david-bauer.net>
The QCA955X is affected by a hardware bug which causes link-loss of the
SGMII link between SoC and PHY. This happens on change of link-state or
speed.
It is not really known what causes this bug. It definitely occurs when
using a AR8033 Gigabit Ethernet PHY.
Qualcomm solves this Bug in a similar fashion. We need to apply the fix
on a per-device base via platform-data as performing the fixup work will
break connectivity in case the SGMII interface is connected to a Switch.
This bug was first proposed to be fixed by Sven Eckelmann in 2016.
https://patchwork.ozlabs.org/patch/604782/
Based-on-patch-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
1) Add comments so it's clear why we did things; this may prevent
someone (e.g. me) from sinking time into fixing things that
aren't broken and/or were done for reason.
2) Drop mdio 0 probe/register; we don't use ag1xx mdio bus 0.
3) Cosmetic reording of some code (tested) that makes the defintion
more clear.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
Add missing definitions for the orange WAN LED on the
TL-WR1043N(D) v4 and v5.
Change the name of a MAC address offset constant to
make it consistent with the format of the
existing constants.
Signed-off-by: Tim Thorpe <tim@tfthorpe.net>
TP-Link Archer C59v2 is a dual-band AC1350 router based on
Qualcomm/Atheros QCA9561+QCA9886 chips.
Specification:
- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 2T2R 5 GHz
- 5x 10/100 Mbps Ethernet
- USB 2.0 port
- UART header on PCB
Flash instruction:
- via web UI:
1. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
2. Login to router and open the Advanced tab
3. Navigate to System Tools -> Firmware Upgrade
4. Upload firmware using the Manual Upgrade form
- via TFTP:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ar71xx-generic-archer-c59-v2-squashfs-factory.bin
and rename it to tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Keith Maika <keithm@aoeex.com>
Qxwlan E750G v8 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (PoE support)
- 2x 10/100/1000 Mbps Ethernet
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E750A v4 is based on Qualcomm QCA9344.
Specification:
- 560/450/225 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 5G GHz (AR9344)
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x miniPCIe slot (USB 2.0 bus only)
- 7x LED (6 driven by GPIO)
- 1x button (reset)
- 1x DC jack for main power input (9-48 V)
- UART (J23) and LEDs (J2) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
Qxwlan E558 v2 is based on Qualcomm QCA9558 + AR8327.
Specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 8/16 MB of FLASH (SPI NOR)
- 2T2R 2.4 GHz (QCA9558)
- 3x 10/100/1000 Mbps Ethernet (one port with PoE support)
- 4x miniPCIe slot (USB 2.0 bus only)
- 1x microSIM slot
- 5x LED (4 driven by GPIO)
- 1x button (reset)
- 1x 3-pos switch
- 1x DC jack for main power input (9-48 V)
- UART (JP5) and LEDs (J8) headers on PCB
Flash instruction (using U-Boot CLI and tftp server):
- Configure PC with static IP 192.168.1.10 and tftp server.
- Rename "sysupgrade" filename to "firmware.bin" and place it in tftp
server directory.
- Connect PC with one of RJ45 ports, power up the board and press
"enter" key to access U-Boot CLI.
- Use the following command to update the device to OpenWrt: "run lfw".
Flash instruction (using U-Boot web-based recovery):
- Configure PC with static IP 192.168.1.xxx(2-254)/24.
- Connect PC with one of RJ45 ports, press the reset button, power up
the board and keep button pressed for around 6-7 seconds, until LEDs
start flashing.
- Open your browser and enter 192.168.1.1, select "sysupgrade" image
and click the upgrade button.
Signed-off-by: 张鹏 <sd20@qxwlan.com>
The wrong MAC addresses (from the point of view of the physical device
label) were being assigned to the wrong interfaces. Fix that.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The reset button was incorrectly returning KEY_WPS_BUTTON as the key
code. We want KEY_RESTART., so make that fix.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
The PCIe wireless MAC address address is better labelled as WMAC
than MAC to emphasize that it is for a wireless interface.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
81d446b045 introduced incomplete
support for this device.
This patch attempts to correct the situation based on OEM source
code.
LED1-3 are GSM mode on OFW (2G/3G/4G) hence unassigned here.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: David Ehrmann <ehrmann@gmail.com>
The active_low flag was missing for the user LED. This LED is open drain
(confirmed in OEM source) and open drain only makes sense for active low
GPIOs.
The two wireless LEDs mentioned in the comments are also #defined for
future reference.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: Ryan Mounce <ryan@mounce.com.au>
e15c63a375 introduced code that was trying
to register GPIO 1 as both an LED and a button. The OEM source makes it
clear that LED1 is not wired to the SoC GPIOs. GPIO 1 is the reset button.
Furthermore the (green) power led default state should also be defined,
(matching OEM source), and it should be used by diag.sh since it's
currently the only software-controllable LED.
This patch fixes these issues and renames the corresponding #defines for
clarity
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
The gpios that control power toggle for USB on the RouterBOARD devices
are active low _off_ switches.
When they are active (low), power is off. When they are inactive
(high), power is on.
Rename GPIO defines, set gpios to GPIOF_ACTIVE_LOW for consistency and
reflect their true action in the display name. This brings openwrt code
in line with OEM.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Tested-by: Ryan Mounce <ryan@mounce.com.au>
This patch adds support for the MikroTik RB931-2nD (hAP mini):
https://mikrotik.com/product/RB931-2nD
Specifications:
* SoC: Qualcomm QCA9533 (650MHz)
* RAM: 32MiB
* Storage: 16MiB SPI NOR flash
* Ethernet: 3x100M
* Wireless: QCA9533 built-in, dual-chain 802.11b/g/n
Installation:
1. Setup a DHCP/BOOTP Server with the following parameters:
* DHCP-Option 66 (TFTP server name): pointing to a local TFTP
server within the same subnet of the DHCP range
* DHCP-Option 67 (Bootfile-Name): matching the initramfs filename
of the to be booted image. The usable intramfs files are:
- openwrt-ar71xx-mikrotik-vmlinux-initramfs.elf
- openwrt-ar71xx-mikrotik-vmlinux-initramfs-lzma.elf
- openwrt-ar71xx-mikrotik-rb-nor-flash-16M-initramfs-kernel.bin
2. Press the reset button on the board and keep that pressed.
3. Connect the board to your local network via its Internet port.
4. Release the button after the LEDs on the board are turned off.
Now the board should load and start the initramfs image from
the TFTP server.
5. Now connect the board via either of its LAN ports (2 or 3).
6. Upload the sysupgrade image to the board with scp:
$ scp openwrt-ar71xx-mikrotik-rb-nor-flash-16M-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/fw.bin
7. Log in to the running system listening on 192.168.1.1 via ssh
as root (without password):
$ ssh root@192.168.1.1
8. Flash the uploaded firmware file from the ssh session via the
sysupgrade command:
root@OpenWrt:~# sysupgrade /tmp/fw.bin
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
This PR adds support for a popular low-cost 2.4GHz N based AP
Specifications:
- SoC: Qualcomm Atheros QCA9533 (650MHz)
- RAM: 64MB
- Storage: 8 MB SPI NOR
- Wireless: 2.4GHz N based built into SoC 2x2
- Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN
Installation:
Flash factory image through stock firmware WEB UI
or through TFTP
To get to TFTP recovery just hold reset button while powering on for
around 4-5 seconds and release.
Rename factory image to recovery.bin
Stock TFTP server IP:192.168.0.100
Stock device TFTP adress:192.168.0.254
Notes:
TP-Link does not use bootstrap registers so without this patch reference
clock detects as 40MHz while it is actually 25MHz.
This is due to messed up bootstrap resistor configuration on the PCB.
Provided GPL code just forces 25MHz reference clock.
That causes booting with completely wrong clocks, for example, CPU tries
to boot at 1040MHz while the stock is 650MHz.
So this PR depends on PR #672 to remove 40MHz reference clock.
Thanks to Sven Eckelmann <sven@narfation.org> for properly patching that.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
TP-Link Archer C7 v5 is a dual-band AC1750 router, based on Qualcomm/Atheros
QCA9563+QCA9880.
Specification:
- 750/400/250 MHz (CPU/DDR/AHB
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 3T3R 5 GHz
- 5x 10/100/1000 Mbps Ethernet
- 10x LED, 2x button
- UART header on PCB
Flash instruction:
1. Upload lede-ar71xx-generic-archer-c7-v5-squashfs-factory.bin via Web interface
Flash instruction using TFTP recovery:
1. Set PC to fixed ip address 192.168.0.66
2. Download lede-ar71xx-generic-archer-c7-v5-squashfs-factory.bin
and rename it to ArcherC7v5_tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Signed-off-by: Arvid E. Picciani <aep@exys.org>
Adrian Schmutzler
Michal Cieslakiewicz
Sungbo Eo
Leon M. George
David Bauer
Koen Vandeputte
Tomislav Požega
Etienne Champetier
W. Michael Petullo
Alexander Couzens
Petr Štetiar
Robert Marko
Xavier Douville
Mantas Pucka
Andreas Ziegler
Edoardo Scaglia
Daniel F. Dickinson
Romain MARIADASSOU
Sergey Ryazanov
Christoph Krapp
Pau Escrich
John Crispin
Tim Thorpe
Keith Maika
张鹏
Thibaut VARÈNE
Arvid E. Picciani