5 Commits (a4edea5ef3b6c19179f3232e3b8d2ed5a41bd163)

Author	SHA1	Message	Date
Gabor Juhos	40a5f5c16e	ar71xx: define NAND controller base address and register size for AR934X/QCA955x ... SVN-Revision: 33382	2012-09-12 19:06:38 +00:00
Gabor Juhos	f4be8a76de	ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x ... SVN-Revision: 33335	2012-09-08 13:39:09 +00:00
Gabor Juhos	d1b237b335	ar71xx: add initial support for the QCA955X SoCs ... SVN-Revision: 32606	2012-07-05 08:26:47 +00:00
Gabor Juhos	7284cf73d6	ar71xx: refactor PCI code to allow registering multiple PCI controllers ... SVN-Revision: 32605	2012-07-05 08:26:45 +00:00
Felix Fietkau	5d364d0ca1	ar71xx: add support for reading the MAC address from OTP ROM on AR933x ... SVN-Revision: 32446	2012-06-19 00:21:58 +00:00