openwrt

Author	SHA1	Message	Date
Gabor Juhos	0677e16248	ar71xx: Fix header offset for newer WRT160NL models Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K, resulting in miscalculated partition sizes. Since the actual sizes did not change, hardcode them to their current sizes, and make sure they are at least one erase block big (in case Cisco decides to start to use chips with 128K erase blocks). Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> SVN-Revision: 27049	2011-05-31 22:53:20 +00:00
Gabor Juhos	acd8ad4de5	ar71xx: wrap long lines (build errors has been fixed - juhosg) Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> SVN-Revision: 23977	2010-11-12 18:51:04 +00:00
Gabor Juhos	500fac1735	ar71xx: fix whitespaces nits (build error has been fixed - juhosg) Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> SVN-Revision: 23975	2010-11-12 18:50:29 +00:00
Gabor Juhos	905f2d62f9	ar71xx: update image generation and trx header parsing for the WRT160NL * patch by Bernhard Loos * note: trailing whitespaces has been removed SVN-Revision: 20525	2010-03-27 17:38:36 +00:00
Gabor Juhos	214f39d46d	WRT160NL: more mtd parser cleanup SVN-Revision: 17201	2009-08-09 12:56:06 +00:00
Gabor Juhos	c202ef57b1	WRT160NL: mtd parser cleanup SVN-Revision: 17177	2009-08-08 13:06:28 +00:00
Gabor Juhos	8f854e27c8	move the trx parser out from the patch SVN-Revision: 17176	2009-08-08 12:08:41 +00:00