This is a patch to connect eth0.1 (lan) to the only
ethernet connector available.
D-Link DAP-1350 goes bricked with AA 12.09-beta.
This is because the current esw configuration for the
board connects eth0.2 (wan) to the *ONE and ONLY*
ethernet connector available, preventing initial access
to the board through 192.168.1.1 on eth0.1 after flashing,
effectively bricking the board.
There are things that should be done to make this board
really useful, but for AA 12.09, this one liner is
indispensable.
Signed of by Yoichi Shinoda <shinoda@jaist.ac.jp>
SVN-Revision: 33411
Somehow detecting the RAM size in common/setup.c doesn't
work here, it always detects 64M and then crashes on devices
with less RAM.
Probably using MEMC_REG_SDRAM_CFG1 to know the RAM size is how
it could be, for now I use the mem=32M kernel parameter to get
stuff working.
Signed-off-by: Daniel Golle <dgolle@allnet.de>
SVN-Revision: 33381
Add missing andmask to ramips_esw register read for recv_good value.
Without the mask, recv_bad leaks into the recv_good packet count.
Didn't notice the bug before since you don't usually get bad
packets, so I only saw it when I was playing with overlength packets
earlier...
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33322
Use doubletagging to disable ramips_esw vlan by default, it seems
more reliable.
Daniel Golle found an issue where sometimes (possibly only for
RT3352) the default vlan disable method (clearing en_vlan, untag,
doubletag and putting all ports into vlan 0) doesn't work and the
packets get sent out vlan-tagged with vlan 0.
Instead switch to using the doubletagging method (allow doubletagged
packets, put all ports into vlan 0 with untag enabled) by default.
Unless someone figures out a way to really globally disable vlan for
this switch, this seems like the best (most reliable) option.
I did some tests regarding maximum packet size and did not see any
difference between the two methods, both allow for slightly bigger packets
than the ramips_main.c ethernet driver (ping stops going through
above "ping -s 1472" (1514 bytes), on the switch packets are recv_good until
"ping -s 1490", or about 1532 bytes).
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33321
Power down phy on disabled switch ports.
Haven't measured this myself yet, but according to this
http://www.8devices.com/community/viewtopic.php?f=6&t=156
it can save about 300mW of power.
[juhosg: fix checkpatch warning]
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33304
Add support for 8devices Carambola dev board.
The Carambola is a small RT3050-based development board with two
ethernet ports, on-board chip antenna, usb and plenty of accessible
gpio ports, sold by 8devices.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33303
Rename POC registers.
The current code uses POC1-POC3.
The datasheet uses:
POC1: Port Control 0
POC1: Port Control 1
POC2: Port Control 2
So the first POC1 is a typo that should have been POC0, rename the
registers to POC0-POC2 accordingly.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33302
Stop handling VLAN setup in the kernel.
Removes the obsolete RT305X_ESW_VLAN_CONFIG_BYPASS option I added for
WL-351 and add some extra comments.
Also removes the en_vlan per-port flag that isn't very useful really, it now
is only controlled by the global enable_vlan flag.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33301
Add switch setup to uci network defaults.
The 'lan' attribute is used to decide into which vlan to put the
port.
Currently 'disable' is never set, but the intention is to use this
for devices like the 8devices Carambola, which only has two ports
hooked up to the SoC.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33300
Add swconfig support to ramips_esw.c
This patch adds swconfig support for ramips_esw:
Tested on both D-LINK DIR-300 B1 and Sitecom WL-351 (external
rtl8366rb on internal port 5).
I've made sure that in the enable_vlan=0 case it behaves like a dumb
switch, so external switches should work fine with vlans and
verified this on the WL-351.
The current state shown by swconfig is always read directly from HW
registers, new settings only show after 'swconfig dev rt305x set apply'.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33299
Minor indentation cleanup.
Prepare for the main swconfig patch by cleaning up indentation a bit.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 33298
Generate image for the ALL0239-3G which can be flashed through the
chipset-vendor SDK based firmware's web-interface and bootloader.
The bootloader seems to ignore uImage checksum errors, but does complain about
them once the 0xDEADC0DE was replaced by an actual JFFS2 page.
I'm working on implementing fixtrx for uImage in the mtd package to solve this.
Signed-off-by: Daniel Golle <dgolle@allnet.de>
SVN-Revision: 33206
rt2x00 still needs some patching as the radio doesn't come to life.
Installation via webflash.
[juhosg: fix whitespace issues, remove rt305x_register_usb
from machine setup because the board has no USB port]
Signed-off-by: Mikko Hissa <mikko.hissa@uta.fi>
SVN-Revision: 33205
In order to get OHCI/EHCI working on the Rt3352, the platform device must be
named so rt3883-?hci will recognize it.
Signed-off-by: Daniel Golle <dgolle@allnet.de>
SVN-Revision: 33145
As the userspace has no means to determine the maximum possible timeout, use
that as the default and let the userspace lower it when necessary.
As the result the usual OpenWrt install (with busybox's watchdog trying to set
the timeout to 60s on start) is using a 33s timeout on an RT3052 clocked at
384MHz instead of the current 20s default.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 33144
D-Link's DIR-620 allows to flash a uImage directly from its web-interface but
for that the image name should be set to DIR_620.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 33143
Full functionality runtime tested, installation via OEM web-interface requires
a follow-up patch.
Thanks go to Sergey Vasilyugin for his patch that pointed me at the missing
bits (including the antiparallel wps led).
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
SVN-Revision: 33142
The initial support for the D-Link DAP-1350.
USB related functionality is not tested.
Signed-off-by: Yoichi Shinoda <shinoda@jaist.ac.jp>
SVN-Revision: 32821
Currently, sys_clk/10 is used which is just wrong.
cpu_clk/10 would work for systems with 400MHz CPU clock.
Signed-off-by: Daniel Golle <dgolle@allnet.de>
SVN-Revision: 32812
Detect and apply MAC address of a Fonera 2.0n (ramips)
Signed-off-by: Malte Forkel <malte.forkel@berlin.de>
Signed-off-by: Vasilis Tsiligiannis <b_tsiligiannis@silverton.gr>
SVN-Revision: 32490
This patch adds support for the Korean made Petatel PSR-680W Wireless CDMA Router.
The platform is based on Ralink RT3052.
http://wiki.openwrt.org/toh/petatel/psr-680w
Signed-off-by: Dmitry Shmygov <shmygov at rambler.ru>
SVN-Revision: 32450
Add led devices for D-Link DIR-300-B1 WAN LED.
Note that the GPIO state is also ANDed with the esw switch port 4
LED state, which is why I've set the amber LED to default-on.
Closes: https://dev.openwrt.org/ticket/11326
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
[ juhosg:
- fix comment style in mach-dir-300-revb.c,
- remove the PPP specific LED setup, not everyone uses a PPP connection
on the WAN interface]
SVN-Revision: 31989
Add byte queue limits support to net/ethernet/ramips_main.c
"Byte queue limits are a mechanism to limit the size of the transmit
hardware queue on a NIC by number of bytes. The goal of these byte
limits is too reduce latency (HOL blocking) caused by excessive
queuing in hardware (aka buffer bloat) without sacrificing
throughput."
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 31844
Sysupgrade works just fine on my Sitecom WL-351 after adding this
oneliner.
Signed-off-by: Tobias Diedrich <ranma+openwrt@tdiedrich.de>
SVN-Revision: 31843
John Crispin
Gabor Juhos
Florian Fainelli
Vasilis Tsiligiannis