These instructions are for 64-bit load/store. On ARMv5TE, the CPU
requires addresses to be aligned to 64-bit. When misaligned, behavior is
undefined (effectively either loads the same word twice on LDRD, or
corrupts surrounding memory on STRD).
On ARMv6 and newer, unaligned access is safe.
Removing these instructions for ARMv5TE is necessary, because GCC
ignores alignment information in pointers and does unsafe optimizations
that have shown up as bugs in various places.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 39638
SPARC builds are currently broken because we do not define the MUSL
dynamic linker name, fix that.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 37938
Fix "Widening multiply-accumulate operation uses wrong value extension"
for 4.7, 4.7-linaro and 4.6-linaro, which backported the broken code to 4.6.
Vanilla 4.6 is unaffected.
Fixes#13420.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 36486
The .init and .fini sections are built by concatenating code
fragments. Putting mips16 code in the middle of a mips32 code block
doesn't work. Make gcc built the magic crt stuff in no-mips16 mode.
This is specific to 4.6-linaro but is probably portable to other gcc
flavors. Adding this to the t-libgcc-mips16 makefile fragment is a
hack not suitable for pushing upstream, but there is no mips/t-linux
or mips/t-uclibc and I am not going to touch gcc/configure for two
lines.
Signed-off-by: Jay Carlson <nop@nop.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 36200
Musl is an alternative C-library, see http://www.musl-libc.org for more infos.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 34314
Felix Fietkau
Florian Fainelli
Jonas Gorski
Luka Perkov
Imre Kaloz
Jo-Philipp Wich
Gabor Juhos
Hauke Mehrtens