10 Commits (2317e72d9983be83cc0bfa6a5cd6e74a4a4c9b2b)

Author	SHA1	Message	Date
Felix Fietkau	8067f3f3cc	ar71xx: work around a PCI controller bug which causes reads to the PCI_COMMAND register to return bogus values - properly fixes ath9k module reload issues ... SVN-Revision: 24236	2010-12-04 01:32:15 +00:00
Gabor Juhos	f4d5c885e4	ar71xx: return statements does not need parenthesis ... Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> SVN-Revision: 23979	2010-11-12 18:51:38 +00:00
Gabor Juhos	18aa68d368	ar71xx: check returned value of ioremap in ar71xx_pcibios_setup ... SVN-Revision: 20288	2010-03-18 19:19:19 +00:00
Gabor Juhos	73f7a1c224	ar71xx: optimize register access in ar71xx_pci.c ... SVN-Revision: 20287	2010-03-18 19:19:16 +00:00
Gabor Juhos	5f109ef2f3	ar71xx: move PCI intterupt handling code to pci-ar7{1xx,24x}.c ... SVN-Revision: 20281	2010-03-18 19:18:54 +00:00
Gabor Juhos	0757fee42d	ar71xx: use ar71xx_pci_fixup on ar71xx SoCs only ... SVN-Revision: 17807	2009-10-01 19:40:57 +00:00
Gabor Juhos	089b5ccb47	reorganize PCI code ... SVN-Revision: 16672	2009-07-05 07:53:07 +00:00
Gabor Juhos	9f93bd51cf	rename DDR registers ... SVN-Revision: 13363	2008-11-26 17:17:13 +00:00
Gabor Juhos	a43e2d5ac6	fix the PCI byte lane enable generation code, based on a patch by Chris Dearman ... SVN-Revision: 12617	2008-09-17 13:29:47 +00:00
Gabor Juhos	f529a37420	surprise :p ... SVN-Revision: 11894	2008-07-21 17:08:14 +00:00