The original implementation loaded the count register with (wrong) semi-
random values due to its implemenation nature.
If the wrongly calulated value was below the kickrate,
the WD was triggered and rebooted the system.
Rework this, partly based on upstream patches, to dynamically fetch the
current clockrate and calculate the proper offset for the WD countdown
register.
Before:
[ 143.800000] count val: 27219720
[ 148.820000] count val: 50623201
[ 153.830000] count val: 96425250
[ 158.830000] count val: 89735401
[ 163.840000] count val: 4756110
After:
[ 0.700000] MPCore WD init. clockrate: 299984500 prescaler: 256
countrate: 1171814 timeout: 60s
[ 358.530000] count val: 35154751
[ 363.540000] count val: 35154750
[ 368.540000] count val: 35154751
[ 373.550000] count val: 35154750
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Adds preliminary kernel 4.9 support for this target.
- Refreshed/Updated all patches
Added 3 new patches:
- 093 --> Add virtual PCI MMIO mapping
- 230 --> Remove deprecated code
- 240 --> Rework AT24 eeprom code to use the new NVMEM API
Compiled & tested on cns3xxx (gw2388)
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Koen Vandeputte
Felix Fietkau