Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 2T2R
WiFi5: QCA9880 2T2R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Replace the code with a more readable version. Rename the recipe
to reflect the real usecase.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
The 'factory' partition will move to 0x50000-0x60000 in 2019. As
the webserver in bootloader is compatible with different mtdlayout,
all the users still can upgrade firmware whatever on ath79 or ar71xx.
Signed-off-by: Rosy Song <rosysong@rosinson.com>
This patch adds support for the COMFAST CF-E110N, an outdoor wireless
CPE with two Ethernet ports and a 802.11bgn radio.
Specifications:
- 650/400/216 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet, both with PoE-in support
- 64 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 26 dBm
- 11 dBi built-in antenna
- POWER/LAN/WAN/WLAN green LEDs
- 4x RSSI LEDs (2x red, 2x green)
- UART (115200 8N1) and GPIO (J9) headers on PCB
Flashing instructions:
The original firmware is based on OpenWrt so a sysupgrade image can be
installed via the stock web GUI. Settings from the original firmware
will be saved and restored on the new want, so a factory reset will be
needed: once the new firmware is flashed, perform the factory reset by
pushing the reset button several times during the boot process, while the
WAN LED flashes, until it starts flashing quicker.
The U-boot bootloader contains a recovery HTTP server to upload the
firmware. Push the reset button while powering the device on and keep it
pressed for >10 seconds. The recovery page will be at http://192.168.1.1
Notes:
The device is advertised, sold and labeled as "CF-E110N", but the
bootloader and the stock firmware identify it as "v2".
Acknowledgments:
Petr Štetiar <ynezz@true.cz>
Sebastian Kemper <sebastian_ml@gmx.net>
Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
[drop unused labels from devicetree source file]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch adds support for TP-Link Archer C6 v2 (EU)
Hardware specification:
- SOC: Qualcomm QCA9563 @ 775MHz
- Flash: GigaDevice GD25Q64CSIG (8MiB)
- RAM: Zentel A3R1GE40JBF (128 MiB DDR2)
- Ethernet: Qualcomm QCA8337N: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) QCA9563 integrated (3x3)
- 5GHz (ac) Qualcomm QCA9886 (2x2)
- Button: 1x power, 1x reset, 1x wps
- LED: 6x LEDs: power, wlan2g, wlan5g, lan, wan, wps
- UART: There's no UART header on the board
Flash instructions:
Upload
openwrt-ath79-generic-tplink_archer-c6-v2-squashfs-factory.bin
via the router Web interface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the router
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the
tftp root directory renamed to ArcherC6v2_tp_recovery.bin.
4. Connect power cable to router, press and hold the reset
button and turn the router on
5. Keep the reset button pressed until the WPS LED lights up
6. Wait ~150 seconds to complete flashing
According to the GPL source the non-EU variant has different
GPIOs assigned to some of the LEDs and buttons. The flash
layout might be different as well. The wikidevi entry for
Archer A6/C6 assumes they are identical.
Signed-off-by: Georgi Vlaev <georgi.vlaev@gmail.com>
EnGenius EWS511AP is a wireless managed wall AP with PoE support,
based on Qualcomm/Atheros QCA9531(Honeybee) + QCA9887.
Short specification:
- 128MB of RAM
- 16 MB of SPI FLASH
- 2T2R 2.4 GHz (QCA9531), 802.11b/g/n
- 1T1R 5 GHz (QCA9887), 802.11ac/n/a
- 2x 10/100 Mbps Ethernet (one port with PoE support)
- 1x Power LED, 2x LAN LEDs, 1x WLAN 2.4G LED, 1x WLAN 5G LED
- 1x RESET button
- built-in watchdog chipset
Flash instruction:
From EnGenius firmware to OpenWrt firmware:
Original firmware is based on QSDK.
Use sysupgrade firmware directly in vendor GUI.
Reset to factory default is necessary.
From OpenWrt firmware to EnGenius firmware:
1. Setup a TFTP server on your computer and configure static IP to 192.168.99.8
Put the OpenWrt firmware in the root directory on your computer.
2. Power up EWS511AP. Press 4 and then press any key to enter u-boot.
3. Download OpenWrt firmware
(ath)> tftpboot 0x80060000 ${dir}"openwrt-ath79-generic-engenius_ews511ap-squashfs-sysupgrade.bin"
4. Flash the firmware
(ath)> erase 0x9f060000 +f50000
(ath)> cp.b $fileaddr 0x9f060000 $filesize
5. Reboot
(ath)> reset
Signed-off-by: Guan-Hong Lin <GH.Lin@senao.com>
This device is called GL-AR300M, therefore rename the board(s)
to 'gl-ar300m-nor' and 'gl-ar300m-nand'
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[change boardname in uboot envtools as well, don't use wildcards for
boardname]
Signed-off-by: Mathias Kresin <dev@kresin.me>
CPU: Atheros AR9341 535MHz
RAM: 32MB
FLASH: 4MiB
PORTS: 4 Port 100/10 Switch, 1 Port 100/10 Wan
WiFi: Atheros AR9341 2x2:2 bgn
LED: Power (static on), LAN (controlled by Switch), WAN, SYS, WiFi, RFKill
BTN: WPS, WiFi, Reset
Installation:
Upload the factory image via the vendor-GUI.
Signed-off-by: Antonio Silverio <menion@gmail.com>
[resolve merge conflicts, squash commits, fix commit title, remove
default default off led properties, mark sysupgrade image compatible
with the ar71xx version of the board, drop blank lines from dts]
Signed-off-by: Mathias Kresin <dev@kresin.me>
With this commit the TP-Link Archer C58 and Archer C59 use caldata
patching in order to set the correct 5GHz MAC-address.
Tested on TP-Link Archer C59 v1.
For more details see commit 330965b.
Signed-off-by: David Bauer <mail@david-bauer.net>
Right now this patch adds nor image generation only. NAND image
generation is not supportet at the moment.
Furtheremore support for the MicroSD port is not implemented as of now.
Specification:
- SOC: QCA9563 (775MHz)
- Flash: 16 MiB (W25Q128FVSG)
- RAM: 128 MiB DDR2
- Ethernet: 2x 1Gbps LAN + 1x 1Gbps WAN
- Wireless: 2.4GHz (bgn) and 5GHz (ac)
- USB: 1x USB 2.0 port
- Button: 1x switch button, 1x reset button
- LED: 3x LEDS (green)
- Another LED can be accessed on GPIO 7 if soldered
Flash instruction:
- Set static ip to 192.168.1.2
- Unplug the power cord
- Hold reset button
- Plug power back in
- Right led will flash 5 times
- Release reset button
- Browse to 192.168.1.1
- Choose sysupgrade image in NOR-flash section
- Press "update nor firmware"
- After successful transfer unplug network cable before device restarts
Signed-off-by: Christoph Krapp <achterin@googlemail.com>
[resolve merge conflicts, rename buttons, use switch input type for mode
switch]
Signed-off-by: Mathias Kresin <dev@kresin.me>
The OCEDO Koala has incorrect PLL settings which result in ~3% packet
loss on ethernet connections.
Also omit the gmac-configuration as it's incorrect too.
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware spec of DIR-859 A1:
SoC: QCA9563
DRAM: 64MB DDR2
Flash: 16MB SPI-NOR
Switch: QCA8337N
WiFi 5.8GHz: QCA9880
USB is supported on the PCB but not connected.
Flash instructions:
1. Upgrade the factory.bin through the factory web interface or the u-boot
failsafe interface.
The firmware will boot up correctly for the first time.
Do not power off the device after OpenWrt has booted. Otherwise the u-boot
will enter failsafe mode as the checksum of the firmware has been changed.
2. Upgrade the sysupgrade.bin in OpenWrt.
After upgrading completes the u-boot won't complain about the firmware
checksum and it's OK to use now.
3. If you powered off the device before upgrading the sysupgrade.bin, just
upgrade the factory.bin through the u-boot failsafe interface and then goto
step 2.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
[squash commits, use common seama recipes, sync factory image recipe
with ramips version]
Signed-off-by: Mathias Kresin <dev@kresin.me>
Fix the switch port order to have the correct order in LuCI.
Fixes: FS#1469
Signed-off-by: Eduardo Barros <geadas@gmail.com>
[trim commit title, add a proper commit message, add fixes tag, keep
alphabetical order of the blocks]
Signed-off-by: Mathias Kresin <dev@kresin.me>
Currently all Archer A7 v5 have the same (incorrect) MAC address.
The address is currently derived from eth1 which is not present on the
QCA9563. Use eth0 to get the correct MAC address.
Signed-off-by: David Bauer <mail@david-bauer.net>
It's same for Bullet and Nanostation so far, so let's hope it's going to
be the same for other boards sharing the same platform.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
It's not necessary as it's already defined in ar934x.dtsi to:
pll-data = <0x16000000 0x00000101 0x00001616>;
And in ar71xx it's currently set to the same values:
#define AR934X_PLL_VAL_1000 0x16000000
#define AR934X_PLL_VAL_100 0x00000101
#define AR934X_PLL_VAL_10 0x00001616
And dumping the value from the airOS v6.1.7 has the same value:
AR934X_PLL_ETH_XMII_CONTROL_REG 0x1805002C 0x101
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Currently there is no LED signalization for various system states
implemented in diag.sh, so this patch adds support for it.
Tested-by: Joe Ayers <ae6xe@arrl.net>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 3T3R
WiFi5: QCA9880 3T3R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
There is also a Micro-B USB-port present but this only seems to be a
dummy as the circuit next to it is not present (at least in my unit).
It is also not mentioned in the devolo manual.
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
1x Atheros AR8033
WiFi2: QCA9558 2T2R
WiFi5: QCA9880 2T2R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
This commit adds support for TP-Link Archer C7 v5, leveraging most effort
from commit ea9baee and 1e4ee63. Archer C7 v5 is identical to Archer A7 v5
but with a different flash layout.
Specification:
- QCA9563 SoC (750 MHz)
- 128 MiB of RAM (DDR2)
- 16 MiB of flash (SPI)
- 5x 1 Gbps Ethernet (1x WAN + 4x LAN)
- 2.4GHz (bgn) SoC internal + 5GHz (ac) QCA9880
- 10x LED, 2x button
- UART header on PCB
Flash instructions:
1. Upload openwrt-ath79-generic-tplink_archer-c7-v5-squashfs-factory.bin
via web interface.
Flash instructions using TFTP recovery:
1. Plug PC to one of the LAN ports
2. Set PC to fixed IP address 192.168.0.66
3. Rename the factory image to ArcherC7v5_tp_recovery.bin and place it in
TFTP root directory
4. Turn on the router with the reset button pressed for about 15 secs
5. Release the button and wait about 150 secs to complete flashing
Signed-off-by: TOCK Chiu <tock.chiu@gmail.com>
The range of pinmux reg property "<0x1804002c 0x40>" for QCA955x
SoC does not includes GPIO_FUNCTION register.
Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
NEC Aterm WG800HP is a 2.4/5 GHz band 11ac router, based on Qualcomm
Atheros QCA9563.
Specification:
- Qualcomm Atheros QCA9563
- 64 MB of RAM (DDR2)
- 8 MB of Flash (SPI-NOR)
- 2.4/5 GHz wifi
- 2.4 GHz: 2T2R (SoC internal)
- 5 GHz: 1T1R (QCA9887)
- 4x 10/100/1000 Mbps Ethernet
- 8x LEDs, 3x keys (2x buttons, 1x slide-switch)
- UART through-hole on PCB (J2)
- Vcc, GND, NC, TX, RX from SoC side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port on WG800HP
2. Connect power cable to WG800HP and turn on it
3. Access to "http://192.168.10.1/" and open firmware update page
("ファームウェア更新")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC
does not includes GPIO_FUNCTION register.
If the device uses "&jtag_disable_pins", this causes the following
errors:
[ 1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40)
[ 1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Use pad-offset and append-string to create the cameo factory images for
the D-LINK DIR-825 C1/DIR-835 A1 factory images.
Tested-by: Sebastian Kemper <sebastian_ml@gmx.net>
Signed-off-by: Mathias Kresin <dev@kresin.me>
Since commit 61b5b4971e ("mac80211: make ath10k-ct the default ath10k")
select ath10k-ct and the -ct firmwares by default.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
>From the Documentation/devicetree/bindings/leds/common.txt:
- default-state : The initial state of the LED. Valid values are "on", "off",
and "keep". If the LED is already on or off and the default-state property is
set the to same value, then no glitch should be produced where the LED
momentarily turns off (or on). The "keep" setting will keep the LED at
whatever its current state is, without producing a glitch. The default is
off if this property is not present.
So setting the default-state of the LEDs to `off` is redundant as `off`
is default LED state anyway. We should remove it as almost every new
PR/patch submission contains this property by default which seems to be
just copy&paste from some DTS file already present in the tree.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This patch adds support for TP-Link Archer A7
Specification:
- SOC: QCA9563
- Flash: 16 MiB (SPI)
- RAM: 128 MiB (DDR2)
- Ethernet: 4x 1Gbps LAN + 1x 1Gbps WAN
- Wireless:
- 2.4GHz (bgn) SoC internal
- 5GHz (ac) QCA988x
- USB: 1x USB 2.0 port
- Button: 1x power, 1x reset, 1x wps
- LED: 10x LEDs
- UART: holes in PCB
- Vcc, GND, RX, TX from ethernet port side
- 115200n8
Flash instructions:
Upload openwrt-ath79-generic-tplink_archer-a7-v5-squashfs-factory.bin
via the Webinterface.
Flash instruction using tftp recovery:
1. Connect the computer to one of the LAN ports of the Archer A7
2. Set the computer IP to 192.168.0.66
3. Start a tftp server with the OpenWrt factory image in the tftp
root directory renamed to ArcherC7v5_tp_recovery.bin
2. Connect power cable to Archer A7, press and hold the reset button
and turn the router on
3. Keep the reset button pressed for ~5 seconds
4. Wait ~150 seconds to complete flashing
Changes since first revision:
- Flash instructions using stock image webinterface
- Changed "Version 5" in model string to "v5"
- Split DTS file in qca9563_tplink_archer-x7-v5.dtsi
and qca9563_tplink_archer-a7-v5.dts
- Firmware image is now build with dynamic partitioning
- Default to ath10k-ct
Changes since second revision:
- Changed uboot@0 to uboot@20000 in DTS file
- Fixed ordering issue in board led script
- Specify firmware partition format in DTS file
- Rebased Makefile device definition on common
Device/tplink-safeloader-uimage definition
- Merged switch section in network script
(same configuration as tplink,tl-wdr3600
and tplink,tl-wdr4300)
Signed-off-by: Karl-Felix Glatzer <karl.glatzer@gmx.de>
This patch fixes wrong usage of debounce-interval subnode property of
gpio-keys-polled nodes, which was used inproperly in parent node, but it
belongs to the subnodes, excerpt from the docs:
Optional subnode-properties:
- debounce-interval: Debouncing interval time in milliseconds.
If not specified defaults to 5.
And the docs are up to date as the source code matches that description
as well:
if (fwnode_property_read_u32(child, "debounce-interval",
&button->debounce_interval))
button->debounce_interval = 5;
While at it, I've also re-formatted gpio-keys-polled nodes, usually just
adding new lines after every key subnode.
Cc: Tomasz Maciej Nowak <tomek_n@o2.pl>
Cc: Matt Merhar <mattmerhar@protonmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Currently it's quite hard to diff debugging output between ar71xx and
ath79, so this patch tries to improve it by adding the same
ag71xx_dump_regs function and placing debugging output from the
registers to relatively same places.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
This commit ports both dir-825-c1 and dir-835-a1 from ar71xx to ath79.
They're pretty much identical, except dir-835-a1 has less LEDs.
The routers come with 128 MByte of RAM and 16 MBytes of flash and sport
2.4GHz and 5.0GHz wireless. Both routers have entries already in
OpenWrt's TOH. Please check there for more information on these
antiquities.
https://openwrt.org/toh/hwdata/d-link/d-link_dir-825_c1https://openwrt.org/toh/hwdata/d-link/d-link_dir-835_a1
Installation:
1. Connect to the web interface of the vendor firmware (usually
listening on 192.168.0.1).
2. Go to "Tools", then "Firmware".
3. In the "Firmware Upgrade" box click "Browse".
4. Select the OpenWrt factory image for your router.
5. Click "Upload", confirm the popups if you agree to flash the file you
selected.
6. Wait for firmware upgrade to complete. It takes about 5 minutes.
Run-tested on dir-825-c1. dir-835-a1 should work as well, but I don't
have this router so I can't confirm.
Signed-off-by: Sebastian Kemper <sebastian_ml@gmx.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [trivial changes]
This ports support for TP-Link TL-WR842N/ND v1 from ar71xx.
CPU: Atheros AR7241 400 MHz
RAM: 32 MiB
FLASH: 8 MiB
PORTS: 4 Port 100/10 Switch, 1 Port 100/10 Wan
WiFi: Atheros AR9287
LED: SYS, WiFi, LAN, WAN, 3G, QSS
BTN: WiFi, Reset/WPS
AR71xx target used "tl-mr3420" as board id so force flag is needed
if upgrading from old target.
Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [trivial cleanup]
The qca9557/qca956x reset-controller aren't a simple bus. A simple bus
would require node unit addresses.
Add the node unit addresses for the qca9557 usb phys. Add the regs for
the USB_PWRCTL and USB_CONFIG registers even not yet used.
Fix the wrong ar7100 pcie controller node unit address as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
PowerCloud Systems CAP324 has a bicolor power LED and OpenWrt DTS files /
base files support using both colours to better inform user of state
and to better match stock firmware, so use green power to indicate
normal operation.
Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
I-O DATA WN-AG300DGR is a 2T2R 2.4/5 GHz 11n router, based on Atheros
AR1022.
WN-AG300DGR does not have an LED to indicates power or system status,
I set "router" LED as OpenWrt status LED.
There is no eeprom data for 5 GHz wlan in "art" partition.
Specification:
- Atheros AR1022
- 64 MB of RAM (DDR2)
- 8 MB of Flash (SPI-NOR)
- 2T2R 2.4/5GHz wifi
- 2.4 GHz: SoC internal
- 5 GHz: Atheros AR93x2
- 5x 10/100/1000 Mbps Ethernet
- 6x LEDs, 6x keys (4x buttons, 1x slide switch)
- 1x USB 2.0 Type-A
- UART through-hole on PCB
- Vcc, GND, TX, RX from ethernet port side
- 115200n8
Flash instruction using factory image:
1. Connect the computer to the LAN port on WN-AG300DGR
2. Connect power cable to WN-AG300DGR and turn it
3. Access to "http://192.168.0.1/" and open firmware update page
("ファームウェア")
4. Select the OpenWrt factory image and click update ("更新") button
5. Wait ~150 seconds to complete flashing
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
WB2000 is a dual-band 11N AP using AR9344.
The factory firmware used the original DB120 partition table
with a small kernel partition at the end of firmware and the
kernel will easily get oversized in the future. Since it has
to be flashed using UART I also swapped kernel/rootfs and
changed the default load address.
Specification:
- SoC: Atheros AR9344
- RAM: 128 MB
- Flash: 16 MB
- Ethernet: 10/100/1000 Mbps (Atheros AR8035)
- 2x USB 2.0
- WIFI: AR9344(2G) + AR9382(5G)
- RTC: DS1338
Known issue:
5G ath9k led doesn't work due to commit ccab68f.
Flash instruction:
Set up a TFTP server on your computer and configure static IP.
Connect UART (J11 TX/GND/RX) and press any key to enter U-boot
shell.
1. Change the default boot command:
setenv bootcmd 'bootm 0x9f050000 || bootm 0x9fd50000'
saveenv
2. Set your router ipaddr and server ipaddr. e.g.:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.50
3. Load and flash the firmware:
tftp 0x80060000 fw.bin
erase 0x9f050000 +$filesize
cp.b $fileaddr 0x9f050000 $filesize
4. Reset your router:
reset
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[Drop the i2c node unit address. Move the ath9k-leds node out of the spi
node, it doesn't belong there. Add the #gpio-cells property to the pci
wifi node. All fix dtc compiler warnings]
Signed-off-by: Mathias Kresin <dev@kresin.me>
merge
David Bauer
Paul Wassi
Christoph Krapp
Mathias Kresin
Rosy Song
Roger Pueyo Centelles
Georgi Vlaev
Guan-Hong Lin
INAGAKI Hiroshi
Antonio Silverio
Weijie Gao
Eduardo Barros
Petr Štetiar
TOCK Chiu
Christian Lamparter
Karl-Felix Glatzer
Sebastian Kemper
Marcin Jurkowski
Daniel F. Dickinson
Chuanhong Guo