mirror of https://github.com/hak5/openwrt.git
parent
d72bde99cd
commit
fe0c7aac66
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@ -9,12 +9,13 @@
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*
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*
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*/
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*/
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/leds.h>
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#include <linux/leds.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <asm/mach-ar71xx/mach-rb750.h>
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#include <asm/mach-ath79/mach-rb750.h>
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#define DRV_NAME "leds-rb750"
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#define DRV_NAME "leds-rb750"
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@ -12,7 +12,8 @@
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ath79.h>
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#define DRIVER_NAME "wndr3700-led-usb"
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#define DRIVER_NAME "wndr3700-led-usb"
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@ -20,14 +21,14 @@ static void wndr3700_usb_led_set(struct led_classdev *cdev,
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enum led_brightness brightness)
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enum led_brightness brightness)
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{
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{
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if (brightness)
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if (brightness)
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ar71xx_device_start(RESET_MODULE_GE1_PHY);
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ath79_device_reset_clear(AR71XX_RESET_GE1_PHY);
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else
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else
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ar71xx_device_stop(RESET_MODULE_GE1_PHY);
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ath79_device_reset_set(AR71XX_RESET_GE1_PHY);
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}
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}
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static enum led_brightness wndr3700_usb_led_get(struct led_classdev *cdev)
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static enum led_brightness wndr3700_usb_led_get(struct led_classdev *cdev)
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{
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{
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return ar71xx_device_stopped(RESET_MODULE_GE1_PHY) ? LED_OFF : LED_FULL;
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return ath79_device_reset_get(AR71XX_RESET_GE1_PHY) ? LED_OFF : LED_FULL;
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}
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}
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static struct led_classdev wndr3700_usb_led = {
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static struct led_classdev wndr3700_usb_led = {
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@ -12,6 +12,8 @@
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* by the Free Software Foundation.
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* by the Free Software Foundation.
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*/
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtd.h>
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@ -22,8 +24,8 @@
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#include <linux/gpio.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ar71xx/rb4xx_cpld.h>
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#include <asm/mach-ath79/rb4xx_cpld.h>
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#define DRV_NAME "rb4xx-nand"
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#define DRV_NAME "rb4xx-nand"
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#define DRV_VERSION "0.2.0"
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#define DRV_VERSION "0.2.0"
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@ -238,12 +240,8 @@ static int __devinit rb4xx_nand_probe(struct platform_device *pdev)
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goto err_set_drvdata;
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goto err_set_drvdata;
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}
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}
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#ifdef CONFIG_MTD_PARTITIONS
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mtd_device_register(&info->mtd, rb4xx_nand_partitions,
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ret = add_mtd_partitions(&info->mtd, rb4xx_nand_partitions,
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ARRAY_SIZE(rb4xx_nand_partitions));
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ARRAY_SIZE(rb4xx_nand_partitions));
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#else
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ret = add_mtd_device(&info->mtd);
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#endif
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if (ret)
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if (ret)
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goto err_release_nand;
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goto err_release_nand;
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@ -1,14 +1,15 @@
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/*
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/*
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* NAND flash driver for the MikroTik RouterBOARD 750
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* NAND flash driver for the MikroTik RouterBOARD 750
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*
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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* by the Free Software Foundation.
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*/
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/partitions.h>
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@ -16,8 +17,9 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ar71xx/mach-rb750.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/mach-rb750.h>
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#define DRV_NAME "rb750-nand"
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#define DRV_NAME "rb750-nand"
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#define DRV_VERSION "0.1.0"
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#define DRV_VERSION "0.1.0"
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@ -73,7 +75,7 @@ static struct mtd_partition rb750_nand_partitions[] = {
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static void rb750_nand_write(const u8 *buf, unsigned len)
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static void rb750_nand_write(const u8 *buf, unsigned len)
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{
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{
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void __iomem *base = ar71xx_gpio_base;
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void __iomem *base = ath79_gpio_base;
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u32 out;
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u32 out;
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u32 t;
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u32 t;
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unsigned i;
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unsigned i;
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static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
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static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
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const u8 *verify_buf)
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const u8 *verify_buf)
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{
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{
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void __iomem *base = ar71xx_gpio_base;
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void __iomem *base = ath79_gpio_base;
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unsigned i;
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unsigned i;
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for (i = 0; i < len; i++) {
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for (i = 0; i < len; i++) {
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static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
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static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
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{
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{
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void __iomem *base = ar71xx_gpio_base;
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void __iomem *base = ath79_gpio_base;
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u32 func;
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u32 func;
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u32 t;
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u32 t;
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/* disable latch */
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/* disable latch */
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rb750_latch_change(RB750_LVC573_LE, 0);
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rb750_latch_change(RB750_LVC573_LE, 0);
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/* disable alternate functions */
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rb750_nand_pins_enable();
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ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
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AR724X_GPIO_FUNC_SPI_EN);
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/* set input mode for data lines */
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/* set input mode for data lines */
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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t = __raw_readl(base + AR71XX_GPIO_REG_OE);
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__raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
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__raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
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base + AR71XX_GPIO_REG_OE);
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base + AR71XX_GPIO_REG_OE);
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/* restore alternate functions */
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rb750_nand_pins_disable();
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ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN,
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AR724X_GPIO_FUNC_JTAG_DISABLE);
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/* enable latch */
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/* enable latch */
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rb750_latch_change(0, RB750_LVC573_LE);
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rb750_latch_change(0, RB750_LVC573_LE);
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static int rb750_nand_dev_ready(struct mtd_info *mtd)
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static int rb750_nand_dev_ready(struct mtd_info *mtd)
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{
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{
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void __iomem *base = ar71xx_gpio_base;
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void __iomem *base = ath79_gpio_base;
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return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
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return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
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}
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}
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unsigned int ctrl)
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unsigned int ctrl)
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{
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{
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if (ctrl & NAND_CTRL_CHANGE) {
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if (ctrl & NAND_CTRL_CHANGE) {
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void __iomem *base = ar71xx_gpio_base;
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void __iomem *base = ath79_gpio_base;
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u32 t;
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u32 t;
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t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
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t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
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static void __init rb750_nand_gpio_init(void)
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static void __init rb750_nand_gpio_init(void)
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{
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{
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void __iomem *base = ar71xx_gpio_base;
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void __iomem *base = ath79_gpio_base;
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u32 out;
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u32 out;
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u32 t;
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u32 t;
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goto err_set_drvdata;
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goto err_set_drvdata;
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}
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}
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#ifdef CONFIG_MTD_PARTITIONS
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ret = mtd_device_register(&info->mtd, rb750_nand_partitions,
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ret = add_mtd_partitions(&info->mtd, rb750_nand_partitions,
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ARRAY_SIZE(rb750_nand_partitions));
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ARRAY_SIZE(rb750_nand_partitions));
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#else
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ret = add_mtd_device(&info->mtd);
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#endif
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if (ret)
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if (ret)
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goto err_release_nand;
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goto err_release_nand;
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@ -108,7 +108,7 @@ static int tplink_check_rootfs_magic(struct mtd_info *mtd, size_t offset)
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static int tplink_parse_partitions(struct mtd_info *master,
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static int tplink_parse_partitions(struct mtd_info *master,
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struct mtd_partition **pparts,
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struct mtd_partition **pparts,
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unsigned long origin)
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struct mtd_part_parser_data *data)
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{
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{
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struct mtd_partition *parts;
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struct mtd_partition *parts;
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struct tplink_fw_header *header;
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struct tplink_fw_header *header;
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@ -83,7 +83,7 @@ struct wrt160nl_header {
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static int wrt160nl_parse_partitions(struct mtd_info *master,
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static int wrt160nl_parse_partitions(struct mtd_info *master,
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struct mtd_partition **pparts,
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struct mtd_partition **pparts,
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unsigned long origin)
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struct mtd_part_parser_data *data)
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{
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{
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struct wrt160nl_header *header;
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struct wrt160nl_header *header;
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struct trx_header *theader;
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struct trx_header *theader;
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@ -10,6 +10,7 @@
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*/
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*/
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/spinlock.h>
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@ -21,8 +22,7 @@
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#include <linux/bitops.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <linux/gpio.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ar71xx/platform.h>
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#define DRV_DESC "Atheros AP83 board SPI Controller driver"
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#define DRV_DESC "Atheros AP83 board SPI Controller driver"
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#define DRV_VERSION "0.1.0"
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#define DRV_VERSION "0.1.0"
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@ -106,7 +106,7 @@ static void ap83_spi_chipselect(struct spi_device *spi, int on)
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dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1);
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dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1);
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if (on) {
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if (on) {
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ar71xx_flash_acquire();
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ath79_flash_acquire();
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sp->addr = 0;
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sp->addr = 0;
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ap83_spi_rr(sp, sp->addr);
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ap83_spi_rr(sp, sp->addr);
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@ -114,7 +114,7 @@ static void ap83_spi_chipselect(struct spi_device *spi, int on)
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gpio_set_value(AP83_SPI_GPIO_CS, 0);
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gpio_set_value(AP83_SPI_GPIO_CS, 0);
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} else {
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} else {
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gpio_set_value(AP83_SPI_GPIO_CS, 1);
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gpio_set_value(AP83_SPI_GPIO_CS, 1);
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ar71xx_flash_release();
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ath79_flash_release();
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}
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}
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}
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}
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@ -127,7 +127,7 @@ static void ap83_spi_chipselect(struct spi_device *spi, int on)
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#define EXPAND_BITBANG_TXRX
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#define EXPAND_BITBANG_TXRX
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#include <linux/spi/spi_bitbang.h>
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#include <linux/spi/spi_bitbang.h>
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#include "spi_bitbang_txrx.h"
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#include "spi-bitbang-txrx.h"
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static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
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static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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unsigned nsecs, u32 word, u8 bits)
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@ -13,6 +13,7 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/device.h>
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@ -21,7 +22,7 @@
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#include <linux/gpio.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <asm/mach-ar71xx/rb4xx_cpld.h>
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#include <asm/mach-ath79/rb4xx_cpld.h>
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#define DRV_NAME "spi-rb4xx-cpld"
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#define DRV_NAME "spi-rb4xx-cpld"
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#define DRV_DESC "RB4xx CPLD driver"
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#define DRV_DESC "RB4xx CPLD driver"
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@ -12,7 +12,10 @@
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*
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*
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*/
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/spinlock.h>
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@ -20,7 +23,8 @@
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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||||||
|
#include <asm/mach-ath79/ath79.h>
|
||||||
|
|
||||||
#define DRV_NAME "rb4xx-spi"
|
#define DRV_NAME "rb4xx-spi"
|
||||||
#define DRV_DESC "Mikrotik RB4xx SPI controller driver"
|
#define DRV_DESC "Mikrotik RB4xx SPI controller driver"
|
||||||
|
@ -41,13 +45,16 @@ struct rb4xx_spi {
|
||||||
unsigned spi_ctrl_flash;
|
unsigned spi_ctrl_flash;
|
||||||
unsigned spi_ctrl_fread;
|
unsigned spi_ctrl_fread;
|
||||||
|
|
||||||
|
struct clk *ahb_clk;
|
||||||
|
unsigned long ahb_freq;
|
||||||
|
|
||||||
spinlock_t lock;
|
spinlock_t lock;
|
||||||
struct list_head queue;
|
struct list_head queue;
|
||||||
int busy:1;
|
int busy:1;
|
||||||
int cs_wait;
|
int cs_wait;
|
||||||
};
|
};
|
||||||
|
|
||||||
static unsigned spi_clk_low = SPI_IOC_CS1;
|
static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1;
|
||||||
|
|
||||||
#ifdef RB4XX_SPI_DEBUG
|
#ifdef RB4XX_SPI_DEBUG
|
||||||
static inline void do_spi_delay(void)
|
static inline void do_spi_delay(void)
|
||||||
|
@ -60,10 +67,11 @@ static inline void do_spi_delay(void) { }
|
||||||
|
|
||||||
static inline void do_spi_init(struct spi_device *spi)
|
static inline void do_spi_init(struct spi_device *spi)
|
||||||
{
|
{
|
||||||
unsigned cs = SPI_IOC_CS0 | SPI_IOC_CS1;
|
unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1;
|
||||||
|
|
||||||
if (!(spi->mode & SPI_CS_HIGH))
|
if (!(spi->mode & SPI_CS_HIGH))
|
||||||
cs ^= (spi->chip_select == 2) ? SPI_IOC_CS1 : SPI_IOC_CS0;
|
cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 :
|
||||||
|
AR71XX_SPI_IOC_CS0;
|
||||||
|
|
||||||
spi_clk_low = cs;
|
spi_clk_low = cs;
|
||||||
}
|
}
|
||||||
|
@ -71,17 +79,18 @@ static inline void do_spi_init(struct spi_device *spi)
|
||||||
static inline void do_spi_finish(void __iomem *base)
|
static inline void do_spi_finish(void __iomem *base)
|
||||||
{
|
{
|
||||||
do_spi_delay();
|
do_spi_delay();
|
||||||
__raw_writel(SPI_IOC_CS0 | SPI_IOC_CS1, base + SPI_REG_IOC);
|
__raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1,
|
||||||
|
base + AR71XX_SPI_REG_IOC);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void do_spi_clk(void __iomem *base, int bit)
|
static inline void do_spi_clk(void __iomem *base, int bit)
|
||||||
{
|
{
|
||||||
unsigned bval = spi_clk_low | ((bit & 1) ? SPI_IOC_DO : 0);
|
unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0);
|
||||||
|
|
||||||
do_spi_delay();
|
do_spi_delay();
|
||||||
__raw_writel(bval, base + SPI_REG_IOC);
|
__raw_writel(bval, base + AR71XX_SPI_REG_IOC);
|
||||||
do_spi_delay();
|
do_spi_delay();
|
||||||
__raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
|
__raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void do_spi_byte(void __iomem *base, unsigned char byte)
|
static void do_spi_byte(void __iomem *base, unsigned char byte)
|
||||||
|
@ -97,19 +106,19 @@ static void do_spi_byte(void __iomem *base, unsigned char byte)
|
||||||
|
|
||||||
pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
|
pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
|
||||||
(unsigned)byte,
|
(unsigned)byte,
|
||||||
(unsigned char)__raw_readl(base + SPI_REG_RDS));
|
(unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS));
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
|
static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
|
||||||
unsigned bit2)
|
unsigned bit2)
|
||||||
{
|
{
|
||||||
unsigned bval = (spi_clk_low |
|
unsigned bval = (spi_clk_low |
|
||||||
((bit1 & 1) ? SPI_IOC_DO : 0) |
|
((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) |
|
||||||
((bit2 & 1) ? SPI_IOC_CS2 : 0));
|
((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0));
|
||||||
do_spi_delay();
|
do_spi_delay();
|
||||||
__raw_writel(bval, base + SPI_REG_IOC);
|
__raw_writel(bval, base + AR71XX_SPI_REG_IOC);
|
||||||
do_spi_delay();
|
do_spi_delay();
|
||||||
__raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
|
__raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
|
static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
|
||||||
|
@ -121,7 +130,7 @@ static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
|
||||||
|
|
||||||
pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
|
pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
|
||||||
(unsigned)byte,
|
(unsigned)byte,
|
||||||
(unsigned char) __raw_readl(base + SPI_REG_RDS));
|
(unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS));
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
|
static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
|
||||||
|
@ -150,9 +159,9 @@ static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
|
||||||
do_spi_byte(base, sdata);
|
do_spi_byte(base, sdata);
|
||||||
|
|
||||||
if (rx_ptr) {
|
if (rx_ptr) {
|
||||||
rx_ptr[i] = __raw_readl(base + SPI_REG_RDS) & 0xff;
|
rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff;
|
||||||
} else if (rxv_ptr) {
|
} else if (rxv_ptr) {
|
||||||
unsigned char c = __raw_readl(base + SPI_REG_RDS);
|
unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS);
|
||||||
if (rxv_ptr[i] != c)
|
if (rxv_ptr[i] != c)
|
||||||
return i;
|
return i;
|
||||||
}
|
}
|
||||||
|
@ -201,9 +210,9 @@ static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
|
||||||
if (t->tx_buf && !t->verify)
|
if (t->tx_buf && !t->verify)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
|
__raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
|
||||||
__raw_writel(rbspi->spi_ctrl_fread, base + SPI_REG_CTRL);
|
__raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL);
|
||||||
__raw_writel(0, base + SPI_REG_FS);
|
__raw_writel(0, base + AR71XX_SPI_REG_FS);
|
||||||
|
|
||||||
if (t->rx_buf) {
|
if (t->rx_buf) {
|
||||||
memcpy(t->rx_buf, (const void *)addr, t->len);
|
memcpy(t->rx_buf, (const void *)addr, t->len);
|
||||||
|
@ -216,9 +225,9 @@ static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
|
||||||
m->actual_length += t->len;
|
m->actual_length += t->len;
|
||||||
|
|
||||||
if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
|
if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
|
||||||
__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
|
__raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
|
||||||
__raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
|
__raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL);
|
||||||
__raw_writel(0, base + SPI_REG_FS);
|
__raw_writel(0, base + AR71XX_SPI_REG_FS);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -237,8 +246,8 @@ static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
|
||||||
if (rb4xx_spi_read_fast(rbspi, m) == 0)
|
if (rb4xx_spi_read_fast(rbspi, m) == 0)
|
||||||
return -1;
|
return -1;
|
||||||
|
|
||||||
__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
|
__raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
|
||||||
__raw_writel(SPI_CTRL_FASTEST, base + SPI_REG_CTRL);
|
__raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL);
|
||||||
do_spi_init(m->spi);
|
do_spi_init(m->spi);
|
||||||
|
|
||||||
list_for_each_entry(t, &m->transfers, transfer_list) {
|
list_for_each_entry(t, &m->transfers, transfer_list) {
|
||||||
|
@ -262,8 +271,8 @@ static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
|
||||||
}
|
}
|
||||||
|
|
||||||
do_spi_finish(base);
|
do_spi_finish(base);
|
||||||
__raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
|
__raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL);
|
||||||
__raw_writel(0, base + SPI_REG_FS);
|
__raw_writel(0, base + AR71XX_SPI_REG_FS);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -352,11 +361,12 @@ static int rb4xx_spi_setup(struct spi_device *spi)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
|
static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max,
|
||||||
|
const char *name)
|
||||||
{
|
{
|
||||||
unsigned div;
|
unsigned div;
|
||||||
|
|
||||||
div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
|
div = (rbspi->ahb_freq - 1) / (2 * hz_max);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CPU has a bug at (div == 0) - first bit read is random
|
* CPU has a bug at (div == 0) - first bit read is random
|
||||||
|
@ -365,7 +375,7 @@ static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
|
||||||
++div;
|
++div;
|
||||||
|
|
||||||
if (name) {
|
if (name) {
|
||||||
unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
|
unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000;
|
||||||
unsigned div_real = 2 * (div + 1);
|
unsigned div_real = 2 * (div + 1);
|
||||||
pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
|
pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
|
||||||
name,
|
name,
|
||||||
|
@ -396,23 +406,40 @@ static int rb4xx_spi_probe(struct platform_device *pdev)
|
||||||
master->transfer = rb4xx_spi_transfer;
|
master->transfer = rb4xx_spi_transfer;
|
||||||
|
|
||||||
rbspi = spi_master_get_devdata(master);
|
rbspi = spi_master_get_devdata(master);
|
||||||
|
|
||||||
|
rbspi->ahb_clk = clk_get(&pdev->dev, "ahb");
|
||||||
|
if (IS_ERR(rbspi->ahb_clk)) {
|
||||||
|
err = PTR_ERR(rbspi->ahb_clk);
|
||||||
|
goto err_put_master;
|
||||||
|
}
|
||||||
|
|
||||||
|
err = clk_enable(rbspi->ahb_clk);
|
||||||
|
if (err)
|
||||||
|
goto err_clk_put;
|
||||||
|
|
||||||
|
rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk);
|
||||||
|
if (!rbspi->ahb_freq) {
|
||||||
|
err = -EINVAL;
|
||||||
|
goto err_clk_disable;
|
||||||
|
}
|
||||||
|
|
||||||
platform_set_drvdata(pdev, rbspi);
|
platform_set_drvdata(pdev, rbspi);
|
||||||
|
|
||||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
if (r == NULL) {
|
if (r == NULL) {
|
||||||
err = -ENOENT;
|
err = -ENOENT;
|
||||||
goto err_put_master;
|
goto err_clk_disable;
|
||||||
}
|
}
|
||||||
|
|
||||||
rbspi->base = ioremap(r->start, r->end - r->start + 1);
|
rbspi->base = ioremap(r->start, r->end - r->start + 1);
|
||||||
if (!rbspi->base) {
|
if (!rbspi->base) {
|
||||||
err = -ENXIO;
|
err = -ENXIO;
|
||||||
goto err_put_master;
|
goto err_clk_disable;
|
||||||
}
|
}
|
||||||
|
|
||||||
rbspi->master = master;
|
rbspi->master = master;
|
||||||
rbspi->spi_ctrl_flash = get_spi_ctrl(SPI_FLASH_HZ, "FLASH");
|
rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH");
|
||||||
rbspi->spi_ctrl_fread = get_spi_ctrl(SPI_CPLD_HZ, "CPLD");
|
rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD");
|
||||||
rbspi->cs_wait = -1;
|
rbspi->cs_wait = -1;
|
||||||
|
|
||||||
spin_lock_init(&rbspi->lock);
|
spin_lock_init(&rbspi->lock);
|
||||||
|
@ -428,6 +455,10 @@ static int rb4xx_spi_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
err_iounmap:
|
err_iounmap:
|
||||||
iounmap(rbspi->base);
|
iounmap(rbspi->base);
|
||||||
|
err_clk_disable:
|
||||||
|
clk_disable(rbspi->ahb_clk);
|
||||||
|
err_clk_put:
|
||||||
|
clk_put(rbspi->ahb_clk);
|
||||||
err_put_master:
|
err_put_master:
|
||||||
platform_set_drvdata(pdev, NULL);
|
platform_set_drvdata(pdev, NULL);
|
||||||
spi_master_put(master);
|
spi_master_put(master);
|
||||||
|
@ -440,6 +471,8 @@ static int rb4xx_spi_remove(struct platform_device *pdev)
|
||||||
struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
|
struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
|
||||||
|
|
||||||
iounmap(rbspi->base);
|
iounmap(rbspi->base);
|
||||||
|
clk_disable(rbspi->ahb_clk);
|
||||||
|
clk_put(rbspi->ahb_clk);
|
||||||
platform_set_drvdata(pdev, NULL);
|
platform_set_drvdata(pdev, NULL);
|
||||||
spi_master_put(rbspi->master);
|
spi_master_put(rbspi->master);
|
||||||
|
|
||||||
|
|
|
@ -1,17 +0,0 @@
|
||||||
--- a/drivers/leds/leds-rb750.c
|
|
||||||
+++ b/drivers/leds/leds-rb750.c
|
|
||||||
@@ -9,12 +9,13 @@
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
+#include <linux/module.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/leds.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/mach-rb750.h>
|
|
||||||
+#include <asm/mach-ath79/mach-rb750.h>
|
|
||||||
|
|
||||||
#define DRV_NAME "leds-rb750"
|
|
||||||
|
|
|
@ -1,30 +0,0 @@
|
||||||
--- a/drivers/leds/leds-wndr3700-usb.c
|
|
||||||
+++ b/drivers/leds/leds-wndr3700-usb.c
|
|
||||||
@@ -12,7 +12,8 @@
|
|
||||||
#include <linux/module.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/ar71xx.h>
|
|
||||||
+#include <asm/mach-ath79/ar71xx_regs.h>
|
|
||||||
+#include <asm/mach-ath79/ath79.h>
|
|
||||||
|
|
||||||
#define DRIVER_NAME "wndr3700-led-usb"
|
|
||||||
|
|
||||||
@@ -20,14 +21,14 @@ static void wndr3700_usb_led_set(struct
|
|
||||||
enum led_brightness brightness)
|
|
||||||
{
|
|
||||||
if (brightness)
|
|
||||||
- ar71xx_device_start(RESET_MODULE_GE1_PHY);
|
|
||||||
+ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY);
|
|
||||||
else
|
|
||||||
- ar71xx_device_stop(RESET_MODULE_GE1_PHY);
|
|
||||||
+ ath79_device_reset_set(AR71XX_RESET_GE1_PHY);
|
|
||||||
}
|
|
||||||
|
|
||||||
static enum led_brightness wndr3700_usb_led_get(struct led_classdev *cdev)
|
|
||||||
{
|
|
||||||
- return ar71xx_device_stopped(RESET_MODULE_GE1_PHY) ? LED_OFF : LED_FULL;
|
|
||||||
+ return ath79_device_reset_get(AR71XX_RESET_GE1_PHY) ? LED_OFF : LED_FULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct led_classdev wndr3700_usb_led = {
|
|
|
@ -1,36 +0,0 @@
|
||||||
--- a/drivers/mtd/nand/rb4xx_nand.c
|
|
||||||
+++ b/drivers/mtd/nand/rb4xx_nand.c
|
|
||||||
@@ -12,6 +12,8 @@
|
|
||||||
* by the Free Software Foundation.
|
|
||||||
*/
|
|
||||||
|
|
||||||
+#include <linux/kernel.h>
|
|
||||||
+#include <linux/module.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/mtd/nand.h>
|
|
||||||
#include <linux/mtd/mtd.h>
|
|
||||||
@@ -22,8 +24,8 @@
|
|
||||||
#include <linux/gpio.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/ar71xx.h>
|
|
||||||
-#include <asm/mach-ar71xx/rb4xx_cpld.h>
|
|
||||||
+#include <asm/mach-ath79/ath79.h>
|
|
||||||
+#include <asm/mach-ath79/rb4xx_cpld.h>
|
|
||||||
|
|
||||||
#define DRV_NAME "rb4xx-nand"
|
|
||||||
#define DRV_VERSION "0.2.0"
|
|
||||||
@@ -238,12 +240,8 @@ static int __devinit rb4xx_nand_probe(st
|
|
||||||
goto err_set_drvdata;
|
|
||||||
}
|
|
||||||
|
|
||||||
-#ifdef CONFIG_MTD_PARTITIONS
|
|
||||||
- ret = add_mtd_partitions(&info->mtd, rb4xx_nand_partitions,
|
|
||||||
+ mtd_device_register(&info->mtd, rb4xx_nand_partitions,
|
|
||||||
ARRAY_SIZE(rb4xx_nand_partitions));
|
|
||||||
-#else
|
|
||||||
- ret = add_mtd_device(&info->mtd);
|
|
||||||
-#endif
|
|
||||||
if (ret)
|
|
||||||
goto err_release_nand;
|
|
||||||
|
|
|
@ -1,122 +0,0 @@
|
||||||
--- a/drivers/mtd/nand/rb750_nand.c
|
|
||||||
+++ b/drivers/mtd/nand/rb750_nand.c
|
|
||||||
@@ -1,14 +1,15 @@
|
|
||||||
/*
|
|
||||||
* NAND flash driver for the MikroTik RouterBOARD 750
|
|
||||||
*
|
|
||||||
- * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
+ * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
|
||||||
* under the terms of the GNU General Public License version 2 as published
|
|
||||||
* by the Free Software Foundation.
|
|
||||||
*/
|
|
||||||
|
|
||||||
-#include <linux/init.h>
|
|
||||||
+#include <linux/kernel.h>
|
|
||||||
+#include <linux/module.h>
|
|
||||||
#include <linux/mtd/nand.h>
|
|
||||||
#include <linux/mtd/mtd.h>
|
|
||||||
#include <linux/mtd/partitions.h>
|
|
||||||
@@ -16,8 +17,9 @@
|
|
||||||
#include <linux/io.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/ar71xx.h>
|
|
||||||
-#include <asm/mach-ar71xx/mach-rb750.h>
|
|
||||||
+#include <asm/mach-ath79/ar71xx_regs.h>
|
|
||||||
+#include <asm/mach-ath79/ath79.h>
|
|
||||||
+#include <asm/mach-ath79/mach-rb750.h>
|
|
||||||
|
|
||||||
#define DRV_NAME "rb750-nand"
|
|
||||||
#define DRV_VERSION "0.1.0"
|
|
||||||
@@ -73,7 +75,7 @@ static struct mtd_partition rb750_nand_p
|
|
||||||
|
|
||||||
static void rb750_nand_write(const u8 *buf, unsigned len)
|
|
||||||
{
|
|
||||||
- void __iomem *base = ar71xx_gpio_base;
|
|
||||||
+ void __iomem *base = ath79_gpio_base;
|
|
||||||
u32 out;
|
|
||||||
u32 t;
|
|
||||||
unsigned i;
|
|
||||||
@@ -107,7 +109,7 @@ static void rb750_nand_write(const u8 *b
|
|
||||||
static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
|
|
||||||
const u8 *verify_buf)
|
|
||||||
{
|
|
||||||
- void __iomem *base = ar71xx_gpio_base;
|
|
||||||
+ void __iomem *base = ath79_gpio_base;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++) {
|
|
||||||
@@ -136,7 +138,7 @@ static int rb750_nand_read_verify(u8 *re
|
|
||||||
|
|
||||||
static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
|
|
||||||
{
|
|
||||||
- void __iomem *base = ar71xx_gpio_base;
|
|
||||||
+ void __iomem *base = ath79_gpio_base;
|
|
||||||
u32 func;
|
|
||||||
u32 t;
|
|
||||||
|
|
||||||
@@ -145,9 +147,7 @@ static void rb750_nand_select_chip(struc
|
|
||||||
/* disable latch */
|
|
||||||
rb750_latch_change(RB750_LVC573_LE, 0);
|
|
||||||
|
|
||||||
- /* disable alternate functions */
|
|
||||||
- ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
|
|
||||||
- AR724X_GPIO_FUNC_SPI_EN);
|
|
||||||
+ rb750_nand_pins_enable();
|
|
||||||
|
|
||||||
/* set input mode for data lines */
|
|
||||||
t = __raw_readl(base + AR71XX_GPIO_REG_OE);
|
|
||||||
@@ -172,9 +172,7 @@ static void rb750_nand_select_chip(struc
|
|
||||||
__raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
|
|
||||||
base + AR71XX_GPIO_REG_OE);
|
|
||||||
|
|
||||||
- /* restore alternate functions */
|
|
||||||
- ar71xx_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN,
|
|
||||||
- AR724X_GPIO_FUNC_JTAG_DISABLE);
|
|
||||||
+ rb750_nand_pins_disable();
|
|
||||||
|
|
||||||
/* enable latch */
|
|
||||||
rb750_latch_change(0, RB750_LVC573_LE);
|
|
||||||
@@ -183,7 +181,7 @@ static void rb750_nand_select_chip(struc
|
|
||||||
|
|
||||||
static int rb750_nand_dev_ready(struct mtd_info *mtd)
|
|
||||||
{
|
|
||||||
- void __iomem *base = ar71xx_gpio_base;
|
|
||||||
+ void __iomem *base = ath79_gpio_base;
|
|
||||||
|
|
||||||
return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
|
|
||||||
}
|
|
||||||
@@ -192,7 +190,7 @@ static void rb750_nand_cmd_ctrl(struct m
|
|
||||||
unsigned int ctrl)
|
|
||||||
{
|
|
||||||
if (ctrl & NAND_CTRL_CHANGE) {
|
|
||||||
- void __iomem *base = ar71xx_gpio_base;
|
|
||||||
+ void __iomem *base = ath79_gpio_base;
|
|
||||||
u32 t;
|
|
||||||
|
|
||||||
t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
|
|
||||||
@@ -236,7 +234,7 @@ static int rb750_nand_verify_buf(struct
|
|
||||||
|
|
||||||
static void __init rb750_nand_gpio_init(void)
|
|
||||||
{
|
|
||||||
- void __iomem *base = ar71xx_gpio_base;
|
|
||||||
+ void __iomem *base = ath79_gpio_base;
|
|
||||||
u32 out;
|
|
||||||
u32 t;
|
|
||||||
|
|
||||||
@@ -306,12 +304,8 @@ static int __devinit rb750_nand_probe(st
|
|
||||||
goto err_set_drvdata;
|
|
||||||
}
|
|
||||||
|
|
||||||
-#ifdef CONFIG_MTD_PARTITIONS
|
|
||||||
- ret = add_mtd_partitions(&info->mtd, rb750_nand_partitions,
|
|
||||||
+ ret = mtd_device_register(&info->mtd, rb750_nand_partitions,
|
|
||||||
ARRAY_SIZE(rb750_nand_partitions));
|
|
||||||
-#else
|
|
||||||
- ret = add_mtd_device(&info->mtd);
|
|
||||||
-#endif
|
|
||||||
if (ret)
|
|
||||||
goto err_release_nand;
|
|
||||||
|
|
|
@ -1,47 +0,0 @@
|
||||||
--- a/drivers/spi/spi-ap83.c
|
|
||||||
+++ b/drivers/spi/spi-ap83.c
|
|
||||||
@@ -10,6 +10,7 @@
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
+#include <linux/module.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/delay.h>
|
|
||||||
#include <linux/spinlock.h>
|
|
||||||
@@ -21,8 +22,7 @@
|
|
||||||
#include <linux/bitops.h>
|
|
||||||
#include <linux/gpio.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/ar71xx.h>
|
|
||||||
-#include <asm/mach-ar71xx/platform.h>
|
|
||||||
+#include <asm/mach-ath79/ath79.h>
|
|
||||||
|
|
||||||
#define DRV_DESC "Atheros AP83 board SPI Controller driver"
|
|
||||||
#define DRV_VERSION "0.1.0"
|
|
||||||
@@ -106,7 +106,7 @@ static void ap83_spi_chipselect(struct s
|
|
||||||
dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1);
|
|
||||||
|
|
||||||
if (on) {
|
|
||||||
- ar71xx_flash_acquire();
|
|
||||||
+ ath79_flash_acquire();
|
|
||||||
|
|
||||||
sp->addr = 0;
|
|
||||||
ap83_spi_rr(sp, sp->addr);
|
|
||||||
@@ -114,7 +114,7 @@ static void ap83_spi_chipselect(struct s
|
|
||||||
gpio_set_value(AP83_SPI_GPIO_CS, 0);
|
|
||||||
} else {
|
|
||||||
gpio_set_value(AP83_SPI_GPIO_CS, 1);
|
|
||||||
- ar71xx_flash_release();
|
|
||||||
+ ath79_flash_release();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
@@ -127,7 +127,7 @@ static void ap83_spi_chipselect(struct s
|
|
||||||
|
|
||||||
#define EXPAND_BITBANG_TXRX
|
|
||||||
#include <linux/spi/spi_bitbang.h>
|
|
||||||
-#include "spi_bitbang_txrx.h"
|
|
||||||
+#include "spi-bitbang-txrx.h"
|
|
||||||
|
|
||||||
static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
|
|
||||||
unsigned nsecs, u32 word, u8 bits)
|
|
|
@ -1,19 +0,0 @@
|
||||||
--- a/drivers/spi/spi-rb4xx-cpld.c
|
|
||||||
+++ b/drivers/spi/spi-rb4xx-cpld.c
|
|
||||||
@@ -13,6 +13,7 @@
|
|
||||||
|
|
||||||
#include <linux/types.h>
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
+#include <linux/module.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/module.h>
|
|
||||||
#include <linux/device.h>
|
|
||||||
@@ -21,7 +22,7 @@
|
|
||||||
#include <linux/gpio.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/rb4xx_cpld.h>
|
|
||||||
+#include <asm/mach-ath79/rb4xx_cpld.h>
|
|
||||||
|
|
||||||
#define DRV_NAME "spi-rb4xx-cpld"
|
|
||||||
#define DRV_DESC "RB4xx CPLD driver"
|
|
|
@ -1,261 +0,0 @@
|
||||||
--- a/drivers/spi/spi-rb4xx.c
|
|
||||||
+++ b/drivers/spi/spi-rb4xx.c
|
|
||||||
@@ -12,7 +12,10 @@
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
+#include <linux/clk.h>
|
|
||||||
+#include <linux/err.h>
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
+#include <linux/module.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/delay.h>
|
|
||||||
#include <linux/spinlock.h>
|
|
||||||
@@ -20,7 +23,8 @@
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/spi/spi.h>
|
|
||||||
|
|
||||||
-#include <asm/mach-ar71xx/ar71xx.h>
|
|
||||||
+#include <asm/mach-ath79/ar71xx_regs.h>
|
|
||||||
+#include <asm/mach-ath79/ath79.h>
|
|
||||||
|
|
||||||
#define DRV_NAME "rb4xx-spi"
|
|
||||||
#define DRV_DESC "Mikrotik RB4xx SPI controller driver"
|
|
||||||
@@ -41,13 +45,16 @@ struct rb4xx_spi {
|
|
||||||
unsigned spi_ctrl_flash;
|
|
||||||
unsigned spi_ctrl_fread;
|
|
||||||
|
|
||||||
+ struct clk *ahb_clk;
|
|
||||||
+ unsigned long ahb_freq;
|
|
||||||
+
|
|
||||||
spinlock_t lock;
|
|
||||||
struct list_head queue;
|
|
||||||
int busy:1;
|
|
||||||
int cs_wait;
|
|
||||||
};
|
|
||||||
|
|
||||||
-static unsigned spi_clk_low = SPI_IOC_CS1;
|
|
||||||
+static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1;
|
|
||||||
|
|
||||||
#ifdef RB4XX_SPI_DEBUG
|
|
||||||
static inline void do_spi_delay(void)
|
|
||||||
@@ -60,10 +67,11 @@ static inline void do_spi_delay(void) {
|
|
||||||
|
|
||||||
static inline void do_spi_init(struct spi_device *spi)
|
|
||||||
{
|
|
||||||
- unsigned cs = SPI_IOC_CS0 | SPI_IOC_CS1;
|
|
||||||
+ unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1;
|
|
||||||
|
|
||||||
if (!(spi->mode & SPI_CS_HIGH))
|
|
||||||
- cs ^= (spi->chip_select == 2) ? SPI_IOC_CS1 : SPI_IOC_CS0;
|
|
||||||
+ cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 :
|
|
||||||
+ AR71XX_SPI_IOC_CS0;
|
|
||||||
|
|
||||||
spi_clk_low = cs;
|
|
||||||
}
|
|
||||||
@@ -71,17 +79,18 @@ static inline void do_spi_init(struct sp
|
|
||||||
static inline void do_spi_finish(void __iomem *base)
|
|
||||||
{
|
|
||||||
do_spi_delay();
|
|
||||||
- __raw_writel(SPI_IOC_CS0 | SPI_IOC_CS1, base + SPI_REG_IOC);
|
|
||||||
+ __raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1,
|
|
||||||
+ base + AR71XX_SPI_REG_IOC);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void do_spi_clk(void __iomem *base, int bit)
|
|
||||||
{
|
|
||||||
- unsigned bval = spi_clk_low | ((bit & 1) ? SPI_IOC_DO : 0);
|
|
||||||
+ unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0);
|
|
||||||
|
|
||||||
do_spi_delay();
|
|
||||||
- __raw_writel(bval, base + SPI_REG_IOC);
|
|
||||||
+ __raw_writel(bval, base + AR71XX_SPI_REG_IOC);
|
|
||||||
do_spi_delay();
|
|
||||||
- __raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
|
|
||||||
+ __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void do_spi_byte(void __iomem *base, unsigned char byte)
|
|
||||||
@@ -97,19 +106,19 @@ static void do_spi_byte(void __iomem *ba
|
|
||||||
|
|
||||||
pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
|
|
||||||
(unsigned)byte,
|
|
||||||
- (unsigned char)__raw_readl(base + SPI_REG_RDS));
|
|
||||||
+ (unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS));
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
|
|
||||||
unsigned bit2)
|
|
||||||
{
|
|
||||||
unsigned bval = (spi_clk_low |
|
|
||||||
- ((bit1 & 1) ? SPI_IOC_DO : 0) |
|
|
||||||
- ((bit2 & 1) ? SPI_IOC_CS2 : 0));
|
|
||||||
+ ((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) |
|
|
||||||
+ ((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0));
|
|
||||||
do_spi_delay();
|
|
||||||
- __raw_writel(bval, base + SPI_REG_IOC);
|
|
||||||
+ __raw_writel(bval, base + AR71XX_SPI_REG_IOC);
|
|
||||||
do_spi_delay();
|
|
||||||
- __raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
|
|
||||||
+ __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
|
|
||||||
@@ -121,7 +130,7 @@ static void do_spi_byte_fast(void __iome
|
|
||||||
|
|
||||||
pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
|
|
||||||
(unsigned)byte,
|
|
||||||
- (unsigned char) __raw_readl(base + SPI_REG_RDS));
|
|
||||||
+ (unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS));
|
|
||||||
}
|
|
||||||
|
|
||||||
static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
|
|
||||||
@@ -150,9 +159,9 @@ static int rb4xx_spi_txrx(void __iomem *
|
|
||||||
do_spi_byte(base, sdata);
|
|
||||||
|
|
||||||
if (rx_ptr) {
|
|
||||||
- rx_ptr[i] = __raw_readl(base + SPI_REG_RDS) & 0xff;
|
|
||||||
+ rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff;
|
|
||||||
} else if (rxv_ptr) {
|
|
||||||
- unsigned char c = __raw_readl(base + SPI_REG_RDS);
|
|
||||||
+ unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS);
|
|
||||||
if (rxv_ptr[i] != c)
|
|
||||||
return i;
|
|
||||||
}
|
|
||||||
@@ -201,9 +210,9 @@ static int rb4xx_spi_read_fast(struct rb
|
|
||||||
if (t->tx_buf && !t->verify)
|
|
||||||
return -1;
|
|
||||||
|
|
||||||
- __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
|
|
||||||
- __raw_writel(rbspi->spi_ctrl_fread, base + SPI_REG_CTRL);
|
|
||||||
- __raw_writel(0, base + SPI_REG_FS);
|
|
||||||
+ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
|
|
||||||
+ __raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL);
|
|
||||||
+ __raw_writel(0, base + AR71XX_SPI_REG_FS);
|
|
||||||
|
|
||||||
if (t->rx_buf) {
|
|
||||||
memcpy(t->rx_buf, (const void *)addr, t->len);
|
|
||||||
@@ -216,9 +225,9 @@ static int rb4xx_spi_read_fast(struct rb
|
|
||||||
m->actual_length += t->len;
|
|
||||||
|
|
||||||
if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
|
|
||||||
- __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
|
|
||||||
- __raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
|
|
||||||
- __raw_writel(0, base + SPI_REG_FS);
|
|
||||||
+ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
|
|
||||||
+ __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL);
|
|
||||||
+ __raw_writel(0, base + AR71XX_SPI_REG_FS);
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
@@ -237,8 +246,8 @@ static int rb4xx_spi_msg(struct rb4xx_sp
|
|
||||||
if (rb4xx_spi_read_fast(rbspi, m) == 0)
|
|
||||||
return -1;
|
|
||||||
|
|
||||||
- __raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
|
|
||||||
- __raw_writel(SPI_CTRL_FASTEST, base + SPI_REG_CTRL);
|
|
||||||
+ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS);
|
|
||||||
+ __raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL);
|
|
||||||
do_spi_init(m->spi);
|
|
||||||
|
|
||||||
list_for_each_entry(t, &m->transfers, transfer_list) {
|
|
||||||
@@ -262,8 +271,8 @@ static int rb4xx_spi_msg(struct rb4xx_sp
|
|
||||||
}
|
|
||||||
|
|
||||||
do_spi_finish(base);
|
|
||||||
- __raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
|
|
||||||
- __raw_writel(0, base + SPI_REG_FS);
|
|
||||||
+ __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL);
|
|
||||||
+ __raw_writel(0, base + AR71XX_SPI_REG_FS);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
@@ -352,11 +361,12 @@ static int rb4xx_spi_setup(struct spi_de
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
-static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
|
|
||||||
+static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max,
|
|
||||||
+ const char *name)
|
|
||||||
{
|
|
||||||
unsigned div;
|
|
||||||
|
|
||||||
- div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
|
|
||||||
+ div = (rbspi->ahb_freq - 1) / (2 * hz_max);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* CPU has a bug at (div == 0) - first bit read is random
|
|
||||||
@@ -365,7 +375,7 @@ static unsigned get_spi_ctrl(unsigned hz
|
|
||||||
++div;
|
|
||||||
|
|
||||||
if (name) {
|
|
||||||
- unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
|
|
||||||
+ unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000;
|
|
||||||
unsigned div_real = 2 * (div + 1);
|
|
||||||
pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
|
|
||||||
name,
|
|
||||||
@@ -396,23 +406,40 @@ static int rb4xx_spi_probe(struct platfo
|
|
||||||
master->transfer = rb4xx_spi_transfer;
|
|
||||||
|
|
||||||
rbspi = spi_master_get_devdata(master);
|
|
||||||
+
|
|
||||||
+ rbspi->ahb_clk = clk_get(&pdev->dev, "ahb");
|
|
||||||
+ if (IS_ERR(rbspi->ahb_clk)) {
|
|
||||||
+ err = PTR_ERR(rbspi->ahb_clk);
|
|
||||||
+ goto err_put_master;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ err = clk_enable(rbspi->ahb_clk);
|
|
||||||
+ if (err)
|
|
||||||
+ goto err_clk_put;
|
|
||||||
+
|
|
||||||
+ rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk);
|
|
||||||
+ if (!rbspi->ahb_freq) {
|
|
||||||
+ err = -EINVAL;
|
|
||||||
+ goto err_clk_disable;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
platform_set_drvdata(pdev, rbspi);
|
|
||||||
|
|
||||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
||||||
if (r == NULL) {
|
|
||||||
err = -ENOENT;
|
|
||||||
- goto err_put_master;
|
|
||||||
+ goto err_clk_disable;
|
|
||||||
}
|
|
||||||
|
|
||||||
rbspi->base = ioremap(r->start, r->end - r->start + 1);
|
|
||||||
if (!rbspi->base) {
|
|
||||||
err = -ENXIO;
|
|
||||||
- goto err_put_master;
|
|
||||||
+ goto err_clk_disable;
|
|
||||||
}
|
|
||||||
|
|
||||||
rbspi->master = master;
|
|
||||||
- rbspi->spi_ctrl_flash = get_spi_ctrl(SPI_FLASH_HZ, "FLASH");
|
|
||||||
- rbspi->spi_ctrl_fread = get_spi_ctrl(SPI_CPLD_HZ, "CPLD");
|
|
||||||
+ rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH");
|
|
||||||
+ rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD");
|
|
||||||
rbspi->cs_wait = -1;
|
|
||||||
|
|
||||||
spin_lock_init(&rbspi->lock);
|
|
||||||
@@ -428,6 +455,10 @@ static int rb4xx_spi_probe(struct platfo
|
|
||||||
|
|
||||||
err_iounmap:
|
|
||||||
iounmap(rbspi->base);
|
|
||||||
+err_clk_disable:
|
|
||||||
+ clk_disable(rbspi->ahb_clk);
|
|
||||||
+err_clk_put:
|
|
||||||
+ clk_put(rbspi->ahb_clk);
|
|
||||||
err_put_master:
|
|
||||||
platform_set_drvdata(pdev, NULL);
|
|
||||||
spi_master_put(master);
|
|
||||||
@@ -440,6 +471,8 @@ static int rb4xx_spi_remove(struct platf
|
|
||||||
struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
|
|
||||||
|
|
||||||
iounmap(rbspi->base);
|
|
||||||
+ clk_disable(rbspi->ahb_clk);
|
|
||||||
+ clk_put(rbspi->ahb_clk);
|
|
||||||
platform_set_drvdata(pdev, NULL);
|
|
||||||
spi_master_put(rbspi->master);
|
|
||||||
|
|
|
@ -1,11 +0,0 @@
|
||||||
--- a/drivers/mtd/tplinkpart.c
|
|
||||||
+++ b/drivers/mtd/tplinkpart.c
|
|
||||||
@@ -108,7 +108,7 @@ static int tplink_check_rootfs_magic(str
|
|
||||||
|
|
||||||
static int tplink_parse_partitions(struct mtd_info *master,
|
|
||||||
struct mtd_partition **pparts,
|
|
||||||
- unsigned long origin)
|
|
||||||
+ struct mtd_part_parser_data *data)
|
|
||||||
{
|
|
||||||
struct mtd_partition *parts;
|
|
||||||
struct tplink_fw_header *header;
|
|
|
@ -1,11 +0,0 @@
|
||||||
--- a/drivers/mtd/wrt160nl_part.c
|
|
||||||
+++ b/drivers/mtd/wrt160nl_part.c
|
|
||||||
@@ -83,7 +83,7 @@ struct wrt160nl_header {
|
|
||||||
|
|
||||||
static int wrt160nl_parse_partitions(struct mtd_info *master,
|
|
||||||
struct mtd_partition **pparts,
|
|
||||||
- unsigned long origin)
|
|
||||||
+ struct mtd_part_parser_data *data)
|
|
||||||
{
|
|
||||||
struct wrt160nl_header *header;
|
|
||||||
struct trx_header *theader;
|
|
Loading…
Reference in New Issue