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ar71xx: remove pdata->fifo_cfg* 

The values are the same for all chipsets that use it

Signed-off-by: Felix Fietkau <nbd@nbd.name>
openwrt-18.06
Felix Fietkau 2018-03-02 21:30:10 +01:00
parent 11d70f0600
commit f62d2b9549
3 changed files with 3 additions and 56 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
View File

@ -900,13 +900,6 @@ void __init ath79_register_eth(unsigned int id)
}
pdata->has_gbit = 1;
pdata->is_ar724x = 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
case ATH79_SOC_AR7241:
@ -936,13 +929,6 @@ void __init ath79_register_eth(unsigned int id)
pdata->is_ar724x = 1;
if (ath79_soc == ATH79_SOC_AR7240)
pdata->is_ar7240 = 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
case ATH79_SOC_AR9132:
@ -979,13 +965,6 @@ void __init ath79_register_eth(unsigned int id)
}
pdata->is_ar724x = 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
case ATH79_SOC_AR9341:
@ -1016,13 +995,6 @@ void __init ath79_register_eth(unsigned int id)
pdata->max_frame_len = SZ_16K - 1;
pdata->desc_pktlen_mask = SZ_16K - 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
case ATH79_SOC_TP9343:
@ -1048,13 +1020,6 @@ void __init ath79_register_eth(unsigned int id)
pdata->has_gbit = 1;
pdata->is_ar724x = 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
case ATH79_SOC_QCA9556:
@ -1082,13 +1047,6 @@ void __init ath79_register_eth(unsigned int id)
*/
pdata->max_frame_len = SZ_4K - 1;
pdata->desc_pktlen_mask = SZ_16K - 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
case ATH79_SOC_QCA956X:
@ -1121,13 +1079,6 @@ void __init ath79_register_eth(unsigned int id)
pdata->has_gbit = 1;
pdata->is_ar724x = 1;
if (!pdata->fifo_cfg1)
pdata->fifo_cfg1 = 0x0010ffff;
if (!pdata->fifo_cfg2)
pdata->fifo_cfg2 = 0x015500aa;
if (!pdata->fifo_cfg3)
pdata->fifo_cfg3 = 0x01f00140;
break;
default:

4
target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
View File

@ -45,10 +45,6 @@ struct ag71xx_platform_data {
void (*set_speed)(int speed);
void (*update_pll)(u32 pll_10, u32 pll_100, u32 pll_1000);
u32 fifo_cfg1;
u32 fifo_cfg2;
u32 fifo_cfg3;
unsigned int max_frame_len;
unsigned int desc_pktlen_mask;
};

6
target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
View File

@ -453,8 +453,8 @@ static void ag71xx_hw_setup(struct ag71xx *ag)
/* setup FIFO configuration registers */
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
if (pdata->is_ar724x) {
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0010ffff);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x015500aa);
} else {
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
@ -596,7 +596,7 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update)
if (pdata->is_ar91xx)
fifo3 = 0x00780fff;
else if (pdata->is_ar724x)
fifo3 = pdata->fifo_cfg3;
fifo3 = 0x01f00140;
else
fifo3 = 0x008001ff;