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ar71xx: Fix gigabit switch support for Mikrotik RB951G-2HnD 

Without this patch, when using rev 3 of the Atheros AR9344 SoC, the
gigabit switch (AR8327) does not work or works very erratically.

This is a re-spin of http://patchwork.ozlabs.org/patch/419857/ with a
different PLL value, according to the feedback from several users
(including myself) as shown here:

  https://openwrt.org/toh/mikrotik/rb2011uias#tracking_reported_experience_with_suggested_patch_for_the_5_gige_ports

Performance is acceptable: testing L3 forwarding without NAT yields a
performance of 370 Mbit/s (iperf3 TCP) and 41 Kpps (iperf3 UDP with 64
bytes payload). Both tests show that 100% of CPU time is spent on softirq.

A similar fix for a different device (RB2011) was added in e457d22261
("Make GBit switch work on RB2011").

Signed-off-by: Baptiste Jonglez <git@bitsofnetworks.org>
(cherry picked from commit 247043c968)
openwrt-19.07
Baptiste Jonglez 2020-03-26 19:03:42 +01:00 committed by Petr Štetiar
parent bdbda30384
commit f5b3cd1539
1 changed files with 2 additions and 0 deletions
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2
target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c
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@ -266,6 +266,7 @@ static void __init rb951g_setup(void)
return; return;
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_RXD_DELAY |
AR934X_ETH_CFG_SW_ONLY_MODE); AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(0, 0x0); ath79_register_mdio(0, 0x0);
@ -276,6 +277,7 @@ static void __init rb951g_setup(void)
ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0); ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_pll_data.pll_1000 = 0x6f000000;
ath79_register_eth(0); ath79_register_eth(0);