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initial attempt at cleaning up the bcm63xx stuff 

SVN-Revision: 4664
lede-17.01
Felix Fietkau 2006-08-25 13:19:54 +00:00
parent 072b31105f
commit f4f917d704
10 changed files with 12836 additions and 16355 deletions
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4
openwrt/target/linux/brcm63xx-2.6/config
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@ -1260,8 +1260,8 @@ CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_KGDB is not set
CONFIG_RUNTIME_DEBUG=y
CONFIG_MIPS_UNCACHED=y
# CONFIG_RUNTIME_DEBUG is not set
# CONFIG_MIPS_UNCACHED is not set
#
# Security options

131
openwrt/target/linux/brcm63xx-2.6/patches/000-arch_mips.patch
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@ -1,131 +0,0 @@
--- linux-2.6.17/arch/mips/Kconfig 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/arch/mips/Kconfig 2006-07-13 19:08:11.000000000 +0200
@@ -12,6 +12,15 @@
prompt "System type"
default SGI_IP22
+config MIPS_BRCM
+ bool "Support for the Broadcom boards"
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_HAS_CPU_MIPS32_R1
+ select IRQ_CPU
+ help
+ This is a fmaily of boards based on the Broadcom MIPS32
+
config MIPS_MTX1
bool "4G Systems MTX-1 board"
select DMA_NONCOHERENT
@@ -780,6 +789,7 @@
endchoice
+source "arch/mips/brcm-boards/bcm963xx/Kconfig"
source "arch/mips/ddb5xxx/Kconfig"
source "arch/mips/gt64120/ev64120/Kconfig"
source "arch/mips/jazz/Kconfig"
--- linux-2.6.17/arch/mips/Makefile 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/arch/mips/Makefile 2006-07-13 18:55:59.000000000 +0200
@@ -145,6 +145,20 @@
#
#
+# Broadcom board
+#
+core-$(CONFIG_MIPS_BRCM) += arch/mips/brcm-boards/generic/ arch/mips/brcm-boards/bcm963xx/
+core-$(CONFIG_MIPS_BRCM) += bcmdrivers/opensource/char/serial/impl1/
+#core-$(CONFIG_MIPS_BRCM) += bcmdrivers/opensource/char/board/bcm963xx/impl1/
+#core-$(CONFIG_MIPS_BRCM) += boardparms/bcm963xx/
+cflags-$(CONFIG_MIPS_BRCM) += -Iinclude/asm-mips/mach-bcm963xx
+cflags-$(CONFIG_MIPS_BRCM) += -Iarch/mips/brcm-boards/generic/include
+cflags-$(CONFIG_MIPS_BRCM) += -Ibcmdrivers/opensource/include/bcm963xx
+cflags-$(CONFIG_MIPS_BRCM) += -Iboardparms/bcm963xx
+load-$(CONFIG_MIPS_BRCM) += 0xffffffff80010000
+
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
diff -urN linux-2.6.17/arch/mips/kernel/cpu-probe.c linux-2.6.17-brcm63xx/arch/mips/kernel/cpu-probe.c
--- linux-2.6.17/arch/mips/kernel/cpu-probe.c 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/arch/mips/kernel/cpu-probe.c 2006-07-13 18:59:04.000000000 +0200
@@ -568,6 +568,25 @@
return;
}
+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
+{
+ decode_configs(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_BCM6338:
+ c->cputype = CPU_BCM6338;
+ break;
+ case PRID_IMP_BCM6345:
+ c->cputype = CPU_BCM6345;
+ break;
+ case PRID_IMP_BCM6348:
+ c->cputype = CPU_BCM6348;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
static inline void cpu_probe_mips(struct cpuinfo_mips *c)
{
decode_configs(c);
@@ -704,6 +723,9 @@
case PRID_COMP_LEGACY:
cpu_probe_legacy(c);
break;
+ case PRID_COMP_BROADCOM:
+ cpu_probe_broadcom(c);
+ break;
case PRID_COMP_MIPS:
cpu_probe_mips(c);
break;
diff -urN linux-2.6.17/arch/mips/kernel/proc.c linux-2.6.17-brcm63xx/arch/mips/kernel/proc.c
--- linux-2.6.17/arch/mips/kernel/proc.c 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/arch/mips/kernel/proc.c 2006-07-13 19:00:53.000000000 +0200
@@ -85,6 +85,9 @@
[CPU_VR4181A] = "NEC VR4181A",
[CPU_SR71000] = "Sandcraft SR71000",
[CPU_PR4450] = "Philips PR4450",
+ [CPU_BCM6338] = "BCM6338",
+ [CPU_BCM6345] = "BCM6345",
+ [CPU_BCM6348] = "BCM6348",
};
diff -urN linux-2.6.17/arch/mips/mm/c-r4k.c linux-2.6.17-brcm63xx/arch/mips/mm/c-r4k.c
--- linux-2.6.17/arch/mips/mm/c-r4k.c 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/arch/mips/mm/c-r4k.c 2006-07-13 19:03:23.000000000 +0200
@@ -914,6 +914,13 @@
if (!(config & MIPS_CONF_M))
panic("Don't know how to probe P-caches on this cpu.");
+ if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348)
+ {
+ printk("brcm mips: enabling icache and dcache...\n");
+ /* Enable caches */
+ write_c0_diag(read_c0_diag() | 0xC0000000);
+ }
+
/*
* So we seem to be a MIPS32 or MIPS64 CPU
* So let's probe the I-cache ...
diff -urN linux-2.6.17/arch/mips/mm/tlbex.c linux-2.6.17-brcm63xx/arch/mips/mm/tlbex.c
--- linux-2.6.17/arch/mips/mm/tlbex.c 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/arch/mips/mm/tlbex.c 2006-07-13 19:03:57.000000000 +0200
@@ -882,6 +882,9 @@
case CPU_4KSC:
case CPU_20KC:
case CPU_25KF:
+ case CPU_BCM6338:
+ case CPU_BCM6345:
+ case CPU_BCM6348:
tlbw(p);
break;

12834
openwrt/target/linux/brcm63xx-2.6/patches/001-bcm963xx.patch Normal file
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File diff suppressed because it is too large Load Diff

9249
openwrt/target/linux/brcm63xx-2.6/patches/001-brcm_boards.patch
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File diff suppressed because it is too large Load Diff

438
openwrt/target/linux/brcm63xx-2.6/patches/002-pci_bcm96348.patch
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@ -1,438 +0,0 @@
diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/Makefile linux-2.6.16.7-patched/arch/mips/pci/Makefile
--- linux-2.6.16.7-generic-patched/arch/mips/pci/Makefile 2006-04-17 23:53:25.000000000 +0200
+++ linux-2.6.16.7-patched/arch/mips/pci/Makefile 2006-07-05 15:21:58.000000000 +0200
@@ -18,6 +18,7 @@ obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
+obj-$(CONFIG_BCM_PCI) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
#
# These are still pretty much in the old state, watch, go blind.
diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/fixup-bcm96348.c linux-2.6.16.7-patched/arch/mips/pci/fixup-bcm96348.c
--- linux-2.6.16.7-generic-patched/arch/mips/pci/fixup-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
+++ linux-2.6.16.7-patched/arch/mips/pci/fixup-bcm96348.c 2006-07-05 15:21:58.000000000 +0200
@@ -0,0 +1,85 @@
+/*
+<:copyright-gpl
+ Copyright 2002 Broadcom Corp. All Rights Reserved.
+
+ This program is free software; you can distribute it and/or modify it
+ under the terms of the GNU General Public License (Version 2) as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+:>
+*/
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+
+#include <bcmpci.h>
+#include <bcm_intr.h>
+#include <bcm_map_part.h>
+
+static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
+
+static char irq_tab_bcm96348[] __initdata = {
+ [0] = INTERRUPT_ID_MPI,
+ [1] = INTERRUPT_ID_MPI,
+#if defined(CONFIG_USB)
+ [USB_HOST_SLOT] = INTERRUPT_ID_USBH
+#endif
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return irq_tab_bcm96348[slot];
+}
+
+static void bcm96348_fixup(struct pci_dev *dev)
+{
+ uint32 memaddr;
+ uint32 size;
+
+ memaddr = pci_resource_start(dev, 0);
+ size = pci_resource_len(dev, 0);
+
+ switch (PCI_SLOT(dev->devfn)) {
+ case 0:
+ // UBUS to PCI address range
+ // Memory Window 1. Mask determines which bits are decoded.
+ mpi->l2pmrange1 = ~(size-1);
+ // UBUS to PCI Memory base address. This is akin to the ChipSelect base
+ // register.
+ mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
+ // UBUS to PCI Remap Address. Replaces the masked address bits in the
+ // range register with this setting.
+ // Also, enable direct I/O and direct Memory accesses
+ mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
+ break;
+
+ case 1:
+ // Memory Window 2
+ mpi->l2pmrange2 = ~(size-1);
+ // UBUS to PCI Memory base address.
+ mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
+ // UBUS to PCI Remap Address
+ mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
+ break;
+
+#if defined(CONFIG_USB)
+ case USB_HOST_SLOT:
+ dev->resource[0].start = USB_HOST_BASE;
+ dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
+ break;
+#endif
+ }
+}
+
+struct pci_fixup pcibios_fixups[] = {
+ { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
+ {0}
+};
diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/ops-bcm96348.c linux-2.6.16.7-patched/arch/mips/pci/ops-bcm96348.c
--- linux-2.6.16.7-generic-patched/arch/mips/pci/ops-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
+++ linux-2.6.16.7-patched/arch/mips/pci/ops-bcm96348.c 2006-07-05 15:21:58.000000000 +0200
@@ -0,0 +1,276 @@
+/*
+<:copyright-gpl
+ Copyright 2002 Broadcom Corp. All Rights Reserved.
+
+ This program is free software; you can distribute it and/or modify it
+ under the terms of the GNU General Public License (Version 2) as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+:>
+*/
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/addrspace.h>
+
+#include <bcm_intr.h>
+#include <bcm_map_part.h>
+#include <bcmpci.h>
+
+#include <linux/delay.h>
+
+#if defined(CONFIG_USB)
+#if 0
+#define DPRINT(x...) printk(x)
+#else
+#define DPRINT(x...)
+#endif
+
+static int
+pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
+static int
+pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
+
+static bool usb_mem_size_rd = FALSE;
+static uint32 usb_mem_base = 0;
+static uint32 usb_cfg_space_cmd_reg = 0;
+#endif
+static bool pci_mem_size_rd = FALSE;
+
+static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
+
+static void mpi_SetupPciConfigAccess(uint32 addr)
+{
+ mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
+}
+
+static void mpi_ClearPciConfigAccess(void)
+{
+ mpi->l2pcfgctl = 0x00000000;
+}
+
+#if defined(CONFIG_USB)
+/* --------------------------------------------------------------------------
+ Name: pci63xx_int_write
+Abstract: PCI Config write on internal device(s)
+ -------------------------------------------------------------------------- */
+static int
+pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
+{
+ if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ switch (size) {
+ case 1:
+ DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
+ PCI_SLOT(devfn), where, size, *value);
+ break;
+ case 2:
+ DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
+ PCI_SLOT(devfn), where, size, *value);
+ switch (where) {
+ case PCI_COMMAND:
+ usb_cfg_space_cmd_reg = *value;
+ break;
+ default:
+ break;
+ }
+ break;
+ case 4:
+ DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
+ PCI_SLOT(devfn), where, size, *value);
+ switch (where) {
+ case PCI_BASE_ADDRESS_0:
+ if (*value == 0xffffffff) {
+ usb_mem_size_rd = TRUE;
+ } else {
+ usb_mem_base = *value;
+ }
+ break;
+ default:
+ break;
+ }
+ break;
+ default:
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+/* --------------------------------------------------------------------------
+ Name: pci63xx_int_read
+Abstract: PCI Config read on internal device(s)
+ -------------------------------------------------------------------------- */
+static int
+pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
+{
+ uint32 retValue = 0xFFFFFFFF;
+
+ if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ // For now, this is specific to the USB Host controller. We can
+ // make it more general if we have to...
+ // Emulate PCI Config accesses
+ switch (where) {
+ case PCI_VENDOR_ID:
+ case PCI_DEVICE_ID:
+ retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
+ break;
+ case PCI_COMMAND:
+ case PCI_STATUS:
+ retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
+ break;
+ case PCI_CLASS_REVISION:
+ case PCI_CLASS_DEVICE:
+ retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
+ break;
+ case PCI_BASE_ADDRESS_0:
+ if (usb_mem_size_rd) {
+ retValue = USB_BAR0_MEM_SIZE;
+ } else {
+ if (usb_mem_base != 0)
+ retValue = usb_mem_base;
+ else
+ retValue = USB_HOST_BASE;
+ }
+ usb_mem_size_rd = FALSE;
+ break;
+ case PCI_CACHE_LINE_SIZE:
+ case PCI_LATENCY_TIMER:
+ retValue = 0;
+ break;
+ case PCI_HEADER_TYPE:
+ retValue = PCI_HEADER_TYPE_NORMAL;
+ break;
+ case PCI_SUBSYSTEM_VENDOR_ID:
+ retValue = PCI_VENDOR_ID_BROADCOM;
+ break;
+ case PCI_SUBSYSTEM_ID:
+ retValue = 0x6300;
+ break;
+ case PCI_INTERRUPT_LINE:
+ retValue = INTERRUPT_ID_USBH;
+ break;
+ default:
+ break;
+ }
+
+ switch (size) {
+ case 1:
+ *value = (retValue >> ((where & 3) << 3)) & 0xff;
+ DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
+ PCI_SLOT(devfn), where, size, *value);
+ break;
+ case 2:
+ *value = (retValue >> ((where & 3) << 3)) & 0xffff;
+ DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
+ PCI_SLOT(devfn), where, size, *value);
+ break;
+ case 4:
+ *value = retValue;
+ DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
+ PCI_SLOT(devfn), where, size, *value);
+ break;
+ default:
+ break;
+ }
+
+ return PCIBIOS_SUCCESSFUL;
+}
+#endif
+
+static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * val)
+{
+ volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
+ uint32 data;
+
+#if defined(CONFIG_USB)
+ if (PCI_SLOT(devfn) == USB_HOST_SLOT)
+ return pci63xx_int_read(devfn, where, val, size);
+#endif
+
+ mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
+ data = *(uint32 *)ioBase;
+ switch(size) {
+ case 1:
+ *val = (data >> ((where & 3) << 3)) & 0xff;
+ break;
+ case 2:
+ *val = (data >> ((where & 3) << 3)) & 0xffff;
+ break;
+ case 4:
+ *val = data;
+ /* Special case for reading PCI device range */
+ if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
+ if (pci_mem_size_rd) {
+ /* bcm6348 PCI memory window minimum size is 64K */
+ *val &= PCI_SIZE_64K;
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ pci_mem_size_rd = FALSE;
+ mpi_ClearPciConfigAccess();
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
+ uint32 data;
+
+#if defined(CONFIG_USB)
+ if (PCI_SLOT(devfn) == USB_HOST_SLOT)
+ return pci63xx_int_write(devfn, where, &val, size);
+#endif
+ mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
+ data = *(uint32 *)ioBase;
+ switch(size) {
+ case 1:
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ break;
+ case 2:
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ break;
+ case 4:
+ data = val;
+ /* Special case for reading PCI device range */
+ if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
+ if (val == 0xffffffff)
+ pci_mem_size_rd = TRUE;
+ }
+ break;
+ default:
+ break;
+ }
+ *(uint32 *)ioBase = data;
+ udelay(500);
+ mpi_ClearPciConfigAccess();
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ops bcm96348_pci_ops = {
+ .read = bcm96348_pcibios_read,
+ .write = bcm96348_pcibios_write
+};
diff -Naurp linux-2.6.16.7-generic-patched/arch/mips/pci/pci-bcm96348.c linux-2.6.16.7-patched/arch/mips/pci/pci-bcm96348.c
--- linux-2.6.16.7-generic-patched/arch/mips/pci/pci-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
+++ linux-2.6.16.7-patched/arch/mips/pci/pci-bcm96348.c 2006-07-05 15:21:58.000000000 +0200
@@ -0,0 +1,54 @@
+/*
+<:copyright-gpl
+ Copyright 2002 Broadcom Corp. All Rights Reserved.
+
+ This program is free software; you can distribute it and/or modify it
+ under the terms of the GNU General Public License (Version 2) as
+ published by the Free Software Foundation.
+
+ This program is distributed in the hope it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+:>
+*/
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/pci_channel.h>
+#include <bcmpci.h>
+
+static struct resource bcm_pci_io_resource = {
+ .name = "bcm96348 pci IO space",
+ .start = BCM_PCI_IO_BASE,
+ .end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
+ .flags = IORESOURCE_IO
+};
+
+static struct resource bcm_pci_mem_resource = {
+ .name = "bcm96348 pci memory space",
+ .start = BCM_PCI_MEM_BASE,
+ .end = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
+ .flags = IORESOURCE_MEM
+};
+
+extern struct pci_ops bcm96348_pci_ops;
+
+struct pci_controller bcm96348_controller = {
+ .pci_ops = &bcm96348_pci_ops,
+ .io_resource = &bcm_pci_io_resource,
+ .mem_resource = &bcm_pci_mem_resource,
+};
+
+static void bcm96348_pci_init(void)
+{
+ register_pci_controller(&bcm96348_controller);
+}
+
+arch_initcall(bcm96348_pci_init);

70
openwrt/target/linux/brcm63xx-2.6/patches/010-include_asm_mips.patch
View File

@ -1,70 +0,0 @@
--- linux-2.6.17/include/asm-mips/bootinfo.h 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/include/asm-mips/bootinfo.h 2006-07-13 19:14:01.000000000 +0200
@@ -218,6 +218,14 @@
#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
#define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
+/*
+ * Valid machtype for group BRCM
+ */
+#define MACH_GROUP_BRCM 23 /* Broadcom boards */
+#define MACH_BCM96338 0
+#define MACH_BCM96345 1
+#define MACH_BCM96348 2
+
#define CL_SIZE COMMAND_LINE_SIZE
const char *get_system_type(void);
--- linux-2.6.17/include/asm-mips/cpu.h 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/include/asm-mips/cpu.h 2006-07-13 19:15:17.000000000 +0200
@@ -103,6 +103,13 @@
#define PRID_IMP_SR71000 0x0400
+/* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
+ */
+
+#define PRID_IMP_BCM6338 0x9000
+#define PRID_IMP_BCM6345 0x8000
+#define PRID_IMP_BCM6348 0x9100
+
/*
* Definitions for 7:0 on legacy processors
*/
@@ -200,7 +207,10 @@
#define CPU_SB1A 62
#define CPU_74K 63
#define CPU_R14000 64
-#define CPU_LAST 64
+#define CPU_BCM6338 65
+#define CPU_BCM6345 66
+#define CPU_BCM6348 67
+#define CPU_LAST 67
/*
* ISA Level encodings
--- linux-2.6.17/include/asm-mips/mach-generic/param.h 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/include/asm-mips/mach-generic/param.h 2006-07-13 19:17:26.000000000 +0200
@@ -8,6 +8,6 @@
#ifndef __ASM_MACH_GENERIC_PARAM_H
#define __ASM_MACH_GENERIC_PARAM_H
-#define HZ 1000 /* Internal kernel timer frequency */
+#define HZ 200 /* Internal kernel timer frequency */
#endif /* __ASM_MACH_GENERIC_PARAM_H */
--- linux-2.6.17/include/asm-mips/module.h 2006-06-18 03:49:35.000000000 +0200
+++ linux-2.6.17-brcm63xx/include/asm-mips/module.h 2006-07-13 19:18:34.000000000 +0200
@@ -113,6 +113,12 @@
#define MODULE_PROC_FAMILY "RM9000 "
#elif defined CONFIG_CPU_SB1
#define MODULE_PROC_FAMILY "SB1 "
+#elif defined CONFIG_CPU_BCM6338
+#define MODULE_PROC_FAMILY "BCM6338 "
+#elif defined CONFIG_CPU_BCM6345
+#define MODULE_PROC_FAMILY "BCM6345 "
+#elif defined CONFIG_CPU_BCM6348
+#define MODULE_PROC_FAMILY "BCM6348 "
#else
#error MODULE_PROC_FAMILY undefined for your processor configuration
#endif

40
openwrt/target/linux/brcm63xx-2.6/patches/011-include_mach_bcm963xx.patch
View File

@ -1,40 +0,0 @@
diff -Naurp linux-2.6.16.7-generic-patched/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h linux-2.6.16.7-patched/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h
--- linux-2.6.16.7-generic-patched/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
+++ linux-2.6.16.7-patched/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 2006-07-05 15:21:58.000000000 +0200
@@ -0,0 +1,36 @@
+#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb 1
+#define cpu_has_4kex 4
+#define cpu_has_4ktlb 8
+#define cpu_has_fpu 0
+#define cpu_has_32fpr 0
+#define cpu_has_counter 0x40
+#define cpu_has_watch 0
+#define cpu_has_mips16 0
+#define cpu_has_divec 0x200
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 0
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 0x40000
+#define cpu_has_mcheck 0x2000
+#define cpu_has_ejtag 0x4000
+#define cpu_has_llsc 0x10000
+#define cpu_has_vtag_icache 0
+#define cpu_has_dc_aliases 0
+#define cpu_has_ic_fills_f_dc 0
+
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 0
+#define cpu_has_64bit_zero_reg 0
+#define cpu_has_64bit_gp_regs 0
+#define cpu_has_64bit_addresses 0
+
+#define cpu_has_subset_pcaches 0
+
+#define cpu_dcache_line_size() 16
+#define cpu_icache_line_size() 16
+#define cpu_scache_line_size() 0
+
+#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */

3226
openwrt/target/linux/brcm63xx-2.6/patches/020-bcmdrivers.patch
View File

File diff suppressed because it is too large Load Diff

3186
openwrt/target/linux/brcm63xx-2.6/patches/030-boardparms.patch
View File

File diff suppressed because it is too large Load Diff

13
openwrt/target/linux/brcm63xx-2.6/patches/050-disable-synchronize_net.patch
View File

@ -1,13 +0,0 @@
diff -Naurp linux-2.6.16.7-generic-patched/net/ipv4/af_inet.c linux-2.6.16.7-patched/net/ipv4/af_inet.c
--- linux-2.6.16.7-generic-patched/net/ipv4/af_inet.c 2006-04-17 23:53:25.000000000 +0200
+++ linux-2.6.16.7-patched/net/ipv4/af_inet.c 2006-07-05 15:33:47.000000000 +0200
@@ -940,7 +940,9 @@ void inet_register_protosw(struct inet_p
out:
spin_unlock_bh(&inetsw_lock);
+#ifndef CONFIG_MIPS_BRCM
synchronize_net();
+#endif
return;