mirror of https://github.com/hak5/openwrt.git
kernel: fix AT8032 PHY phy id mask
Don't mask bit 4 of the AT8022 phy id. If bit 4 of the AT8022 phy id (0x004dd023) is masked, it will match the phy id of the AR8327 switch (0x004dd033) as well. It results in applied at803x driver settings/callbacks, which will at least limit the AR8327 phys to 100MBit operation instead of the possible 1000MBit. Signed-off-by: Mathias Kresin <dev@kresin.me>openwrt-19.07
parent
89b59994eb
commit
eccde89aa4
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@ -8,15 +8,18 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -62,6 +62,7 @@
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@@ -62,8 +62,10 @@
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#define ATH8030_PHY_ID 0x004dd076
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#define ATH8031_PHY_ID 0x004dd074
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+#define ATH8032_PHY_ID 0x004dd023
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#define ATH8035_PHY_ID 0x004dd072
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#define AT803X_PHY_ID_MASK 0xffffffef
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+#define AT8032_PHY_ID_MASK 0xffffffff
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@@ -256,7 +257,8 @@ static int at803x_probe(struct phy_devic
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MODULE_DESCRIPTION("Atheros 803x PHY driver");
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MODULE_AUTHOR("Matus Ujhelyi");
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@@ -256,7 +258,8 @@ static int at803x_probe(struct phy_devic
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if (!priv)
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return -ENOMEM;
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@ -26,7 +29,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
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goto does_not_require_reset_workaround;
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gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
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@@ -332,7 +334,7 @@ static void at803x_link_change_notify(st
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@@ -332,7 +335,7 @@ static void at803x_link_change_notify(st
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struct at803x_priv *priv = phydev->priv;
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/*
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@ -35,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
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* signalled. This is necessary to circumvent a hardware bug that
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* occurs when the cable is unplugged while TX packets are pending
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* in the FIFO. In such cases, the FIFO enters an error mode it
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@@ -444,6 +446,24 @@ static struct phy_driver at803x_driver[]
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@@ -444,6 +447,24 @@ static struct phy_driver at803x_driver[]
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.aneg_done = at803x_aneg_done,
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.ack_interrupt = &at803x_ack_interrupt,
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.config_intr = &at803x_config_intr,
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@ -43,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
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+ /* ATHEROS 8032 */
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+ .phy_id = ATH8032_PHY_ID,
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+ .name = "Atheros 8032 ethernet",
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+ .phy_id_mask = 0xffffffef,
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+ .phy_id_mask = AT8032_PHY_ID_MASK,
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+ .probe = at803x_probe,
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+ .config_init = at803x_config_init,
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+ .link_change_notify = at803x_link_change_notify,
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@ -60,11 +63,11 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
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} };
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module_phy_driver(at803x_driver);
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@@ -451,6 +471,7 @@ module_phy_driver(at803x_driver);
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@@ -451,6 +472,7 @@ module_phy_driver(at803x_driver);
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static struct mdio_device_id __maybe_unused atheros_tbl[] = {
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{ ATH8030_PHY_ID, AT803X_PHY_ID_MASK },
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{ ATH8031_PHY_ID, AT803X_PHY_ID_MASK },
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+ { ATH8032_PHY_ID, AT803X_PHY_ID_MASK },
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+ { ATH8032_PHY_ID, AT8032_PHY_ID_MASK },
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{ ATH8035_PHY_ID, AT803X_PHY_ID_MASK },
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{ }
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};
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@ -40,7 +40,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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#define AT803X_DEBUG_ADDR 0x1D
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#define AT803X_DEBUG_DATA 0x1E
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@@ -73,6 +80,7 @@ MODULE_LICENSE("GPL");
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@@ -74,6 +81,7 @@ MODULE_LICENSE("GPL");
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struct at803x_priv {
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bool phy_reset:1;
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struct gpio_desc *gpiod_reset;
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@ -48,7 +48,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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};
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struct at803x_context {
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@@ -273,8 +281,16 @@ does_not_require_reset_workaround:
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@@ -274,8 +282,16 @@ does_not_require_reset_workaround:
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return 0;
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}
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@ -65,7 +65,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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int ret;
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ret = genphy_config_init(phydev);
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@@ -295,6 +311,26 @@ static int at803x_config_init(struct phy
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@@ -296,6 +312,26 @@ static int at803x_config_init(struct phy
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return ret;
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}
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@ -92,7 +92,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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return 0;
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}
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@@ -332,6 +368,8 @@ static int at803x_config_intr(struct phy
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@@ -333,6 +369,8 @@ static int at803x_config_intr(struct phy
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static void at803x_link_change_notify(struct phy_device *phydev)
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{
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struct at803x_priv *priv = phydev->priv;
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@ -101,7 +101,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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/*
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* Conduct a hardware reset for AT8030/2 every time a link loss is
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@@ -360,6 +398,24 @@ static void at803x_link_change_notify(st
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@@ -361,6 +399,24 @@ static void at803x_link_change_notify(st
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} else {
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priv->phy_reset = false;
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}
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@ -24,7 +24,7 @@ Signed-off-by: Roman Yeryomin <roman@advem.lv>
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#define AT803X_MODE_CFG_MASK 0x0F
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#define AT803X_MODE_CFG_SGMII 0x01
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@@ -292,6 +296,27 @@ static int at803x_config_init(struct phy
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@@ -293,6 +297,27 @@ static int at803x_config_init(struct phy
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{
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struct at803x_platform_data *pdata;
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int ret;
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