mirror of https://github.com/hak5/openwrt.git
ar71xx: Add support for Wallys DR344
This patch is for Wallys DR344 support under OpenWRT Signed-off-by: Philippe Duchein <wireless-dev@duchein.net> SVN-Revision: 47847lede-17.01
John Crispin
parent
fcf74b1138
commit
eb8ff56684
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@ -15,6 +15,7 @@ board=$(ar71xx_board_name)
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case "$board" in
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all0315n |\
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all0258n |\
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dr344 |\
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ja76pf2|\
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rocket-m-ti |\
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ubnt-unifi-outdoor)
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@ -95,6 +95,9 @@ get_status_led() {
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dlan-pro-1200-ac)
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status_led="devolo:status:wlan"
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;;
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dr344)
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status_led="dr344:green:status"
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;;
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dragino2)
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status_led="dragino2:red:system"
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;;
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@ -463,6 +463,9 @@ ar71xx_board_detect() {
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*"dLAN pro 1200+ WiFi ac")
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name="dlan-pro-1200-ac"
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;;
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*DR344)
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name="dr344"
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;;
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*"Dragino v2")
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name="dragino2"
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;;
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@ -184,6 +184,7 @@ platform_check_image() {
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ap96 | \
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bxu2000n-2-a1 | \
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db120 | \
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dr344 | \
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f9k1115v2 |\
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hornet-ub | \
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mr12 | \
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@ -66,6 +66,7 @@ CONFIG_ATH79_MACH_DIR_825_C1=y
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CONFIG_ATH79_MACH_DLAN_HOTSPOT=y
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CONFIG_ATH79_MACH_DLAN_PRO_1200_AC=y
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CONFIG_ATH79_MACH_DLAN_PRO_500_WP=y
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CONFIG_ATH79_MACH_DR344=y
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CONFIG_ATH79_MACH_GL_DOMINO=y
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CONFIG_ATH79_MACH_DRAGINO2=y
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CONFIG_ATH79_MACH_EAP300V2=y
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@ -0,0 +1,184 @@
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/*
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* Wallys DR344 board support
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*
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* Copyright (c) 2011 Qualcomm Atheros
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* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (c) 2015 Philippe Duchein <wireless-dev@duchein.net>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-ap9x-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-usb.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define DR344_GPIO_LED_SIG1 15
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#define DR344_GPIO_LED_SIG2 11
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#define DR344_GPIO_LED_SIG3 12
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#define DR344_GPIO_LED_SIG4 13
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#define DR344_GPIO_EXTERNAL_LNA0 18
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#define DR344_GPIO_EXTERNAL_LNA1 19
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#define DR344_GPIO_LED_STATUS 14
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#define DR344_GPIO_BTN_RESET 12
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#define DR344_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DR344_KEYS_DEBOUNCE_INTERVAL (3 * DR344_KEYS_POLL_INTERVAL)
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#define DR344_MAC0_OFFSET 0
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#define DR344_MAC1_OFFSET 8
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#define DR344_WMAC_CALDATA_OFFSET 0x1000
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#define DR344_PCIE_CALDATA_OFFSET 0x5000
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static struct gpio_led dr344_leds_gpio[] __initdata = {
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{
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.name = "dr344:green:status",
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.gpio = DR344_GPIO_LED_STATUS,
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.active_low = 1,
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},
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{
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.name = "dr344:red:sig1",
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.gpio = DR344_GPIO_LED_SIG1,
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.active_low = 1,
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},
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{
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.name = "dr344:yellow:sig2",
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.gpio = DR344_GPIO_LED_SIG2,
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.active_low = 1,
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},
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{
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.name = "dr344:green:sig3",
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.gpio = DR344_GPIO_LED_SIG3,
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.active_low = 1,
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},
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{
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.name = "dr344:green:sig4",
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.gpio = DR344_GPIO_LED_SIG4,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button dr344_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DR344_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DR344_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg dr344_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_led_cfg dr344_ar8327_led_cfg = {
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.led_ctrl0 = 0x00000000,
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.led_ctrl1 = 0xc737c737,
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.led_ctrl2 = 0x00000000,
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.led_ctrl3 = 0x00c30c00,
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.open_drain = true,
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};
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static struct ar8327_platform_data dr344_ar8327_data = {
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.pad0_cfg = &dr344_ar8327_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.led_cfg = &dr344_ar8327_led_cfg,
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};
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static struct mdio_board_info dr344_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &dr344_ar8327_data,
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},
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};
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static void __init dr344_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio),
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dr344_leds_gpio);
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ath79_register_gpio_keys_polled(-1, DR344_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dr344_gpio_keys),
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dr344_gpio_keys);
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ath79_register_usb();
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ath79_wmac_set_ext_lna_gpio(0, DR344_GPIO_EXTERNAL_LNA0);
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ath79_wmac_set_ext_lna_gpio(1, DR344_GPIO_EXTERNAL_LNA1);
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ath79_register_wmac(art + DR344_WMAC_CALDATA_OFFSET, NULL);
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ath79_register_pci();
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mdiobus_register_board_info(dr344_mdio0_info,
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ARRAY_SIZE(dr344_mdio0_info));
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ath79_register_mdio(1, 0x0);
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, art + DR344_MAC0_OFFSET, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, art + DR344_MAC1_OFFSET, 0);
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
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AR934X_ETH_CFG_SW_ONLY_MODE);
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/* GMAC0 is connected to an AR8327 switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x0e000000;
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ath79_eth0_pll_data.pll_100 = 0x0101;
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ath79_eth0_pll_data.pll_10 = 0x1313;
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/* GMAC1 is connected to the internal switch */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_register_eth(0);
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ath79_register_eth(1);
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}
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MIPS_MACHINE(ATH79_MACH_DR344, "DR344", "Wallys DR344", dr344_setup);
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@ -0,0 +1,17 @@
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#
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# Copyright (C) 2015 Philippe DUCHEIN <pduchein@gmail.com>
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# Copyright (C) 2009 OpenWrt.org
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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define Profile/DR344
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NAME:=Wallys DR344
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endef
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define Profile/DR344/Description
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Package set optimized for the Wallys DR344 board.
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endef
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$(eval $(call Profile,DR344))
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@ -1503,6 +1503,7 @@ ubdev_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,7488k(firmware)
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whrhpg300n_mtdlayout=mtdparts=spi0.0:248k(u-boot)ro,8k(u-boot-env)ro,3712k(firmware),64k(art)ro
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wlr8100_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),14080k(rootfs),192k(unknown)ro,64k(art)ro,384k(unknown2)ro,15488k@0x40000(firmware)
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wpj344_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro
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dr344_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
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wpj531_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro
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wpj558_mtdlayout_16M=mtdparts=spi0.0:192k(u-boot)ro,16128k(firmware),64k(art)ro
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wndap360_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1728k(kernel),6016k(rootfs),64k(nvram)ro,64k(art)ro,7744k@0x50000(firmware)
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@ -2277,6 +2278,7 @@ $(eval $(call SingleProfile,AthLzma,64k,PB92,pb92,PB92,ttyS0,115200,$$(pb92_mtdl
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$(eval $(call SingleProfile,AthLzma,64k,TUBE2H16M,tube2h-16M,TUBE2H,ttyATH0,115200,$$(alfa_mtdlayout_16M),KRuImage,65536))
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$(eval $(call SingleProfile,AthLzma,64k,WLR8100,wlr8100,WLR8100,ttyS0,115200,$$(wlr8100_mtdlayout),KRuImage))
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$(eval $(call SingleProfile,AthLzma,64k,WPJ344_16M,wpj344-16M,WPJ344,ttyS0,115200,$$(wpj344_mtdlayout_16M),KRuImage,65536))
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$(eval $(call SingleProfile,AthLzma,64k,DR344,dr344,DR344,ttyS0,115200,$$(dr344_mtdlayout),RKuImage))
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$(eval $(call SingleProfile,AthLzma,64k,WPJ531_16M,wpj531-16M,WPJ531,ttyS0,115200,$$(wpj531_mtdlayout_16M),KRuImage,65536))
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$(eval $(call SingleProfile,AthLzma,64k,WPJ558_16M,wpj558-16M,WPJ558,ttyS0,115200,$$(wpj558_mtdlayout_16M),KRuImage,65536))
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$(eval $(call SingleProfile,AthLzma,64k,YUN_8M,yun-8M,Yun,ttyATH0,250000,$$(yun_mtdlayout_8M),RKuImage))
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@ -0,0 +1,42 @@
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diff -Nru a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
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--- a/arch/mips/ath79/Kconfig 2015-10-27 22:09:32.705886861 +0100
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+++ b/arch/mips/ath79/Kconfig 2015-10-27 22:16:08.822566162 +0100
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@@ -512,6 +512,16 @@
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select ATH79_DEV_NFC
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select ATH79_DEV_USB
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+config ATH79_MACH_DR344
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+ bool "Wallys DR344 board support"
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+ select SOC_AS934X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_M25P80
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+
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config ATH79_MACH_DRAGINO2
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bool "DRAGINO V2 support"
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select SOC_AR933X
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diff -Nru a/arch/mips/ath79/machtypes.h b/arch/mips/ath79/machtypes.h
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--- a/arch/mips/ath79/machtypes.h 2015-10-27 22:09:32.706886873 +0100
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+++ b/arch/mips/ath79/machtypes.h 2015-10-27 22:12:28.011957673 +0100
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@@ -60,6 +60,7 @@
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ATH79_MACH_DIR_835_A1, /* D-Link DIR-835 rev. A1 */
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ATH79_MACH_DLAN_PRO_500_WP, /* devolo dLAN pro 500 Wireless+ */
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ATH79_MACH_DLAN_PRO_1200_AC, /* devolo dLAN pro 1200+ WiFi ac*/
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+ ATH79_MACH_DR344, /* Wallys DR344 */
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ATH79_MACH_DRAGINO2, /* Dragino Version 2 */
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ATH79_MACH_ESR900, /* EnGenius ESR900 */
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ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */
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diff -Nru a/arch/mips/ath79/Makefile b/arch/mips/ath79/Makefile
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--- a/arch/mips/ath79/Makefile 2015-10-27 22:09:32.706886873 +0100
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+++ b/arch/mips/ath79/Makefile 2015-10-27 22:17:18.716391867 +0100
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@@ -72,6 +72,7 @@
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obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o
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obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
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obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o
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+obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o
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obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o
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obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o
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obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o
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