provide a system clock to be used by the MIPS timer

Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 34550
lede-17.01
Florian Fainelli 2012-12-06 22:39:52 +00:00
parent 79c2ce01b7
commit e37f6fb458
4 changed files with 33 additions and 8 deletions

View File

@ -3,5 +3,5 @@
# #
obj-y := irq.o pci.o prom.o platform.o proc.o \ obj-y := irq.o pci.o prom.o platform.o proc.o \
setup.o time.o early_printk.o clock.o \ setup.o clock.o time.o early_printk.o \
net_core.o net_intr.o net_core.o net_intr.o

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@ -22,12 +22,19 @@ static struct clk uart_clk = {
.rate = ADM8668_UARTCLK_FREQ, .rate = ADM8668_UARTCLK_FREQ,
}; };
static struct clk sys_clk;
struct clk *clk_get(struct device *dev, const char *id) struct clk *clk_get(struct device *dev, const char *id)
{ {
const char *name = dev_name(dev); const char *lookup = id;
if (!strcmp(name, "apb:uart0")) if (dev)
lookup = dev_name(dev);
if (!strcmp(lookup, "apb:uart0"))
return &uart_clk; return &uart_clk;
if (!strcmp(lookup, "sys"))
return &sys_clk;
return ERR_PTR(-ENOENT); return ERR_PTR(-ENOENT);
} }
@ -54,3 +61,16 @@ void clk_put(struct clk *clk)
{ {
} }
EXPORT_SYMBOL(clk_put); EXPORT_SYMBOL(clk_put);
void __init adm8668_init_clocks(void)
{
u32 adj;
/* adjustable clock selection
* CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc...
*/
adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf;
sys_clk.rate = SYS_CLOCK + adj * 5000000;
pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk.rate / 1000000);
}

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@ -1,17 +1,20 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/clk.h>
#include <asm/time.h> #include <asm/time.h>
#include <adm8668.h> #include <adm8668.h>
void __init plat_time_init(void) void __init plat_time_init(void)
{ {
int adj = (ADM8668_CONFIG_REG(ADM8668_CR3) >> 11) & 0xf; struct clk *sys_clk;
/* adjustable clock selection adm8668_init_clocks();
CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc... */
mips_hpt_frequency = (SYS_CLOCK + adj * 5000000) / 2; sys_clk = clk_get(NULL, "sys");
printk("ADM8668 CPU clock: %d MHz\n", 2*mips_hpt_frequency / 1000000); if (IS_ERR(sys_clk))
panic("unable to get system clock\n");
mips_hpt_frequency = clk_get_rate(sys_clk) / 2;
} }

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@ -109,4 +109,6 @@
#define CRGPIO_TOGGLE(num) \ #define CRGPIO_TOGGLE(num) \
ADM8668_CONFIG_REG(CRGPIO_REG) ^= (1 << (6 + num)) ADM8668_CONFIG_REG(CRGPIO_REG) ^= (1 << (6 + num))
void adm8668_init_clocks(void);
#endif /* __ADM8668_H__ */ #endif /* __ADM8668_H__ */