hak5
/
openwrt
mirror of https://github.com/hak5/openwrt.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

ath9k: use the maximum rate power for the channel txpower limits 

SVN-Revision: 23543
lede-17.01
Felix Fietkau 2010-10-20 01:05:30 +00:00
parent 935809ebb6
commit dfddaefa6b
1 changed files with 72 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

96
package/mac80211/patches/521-ath9k_hw_tx_power.patch
View File

@ -21,16 +21,28 @@
{ {
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
@@ -768,6 +768,9 @@ static void ath9k_hw_4k_set_txpower(stru @@ -751,15 +751,20 @@ static void ath9k_hw_4k_set_txpower(stru
regulatory->max_power_level = ratesArray[i]; ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset);
+ regulatory->max_power_level = 0;
for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
if (ratesArray[i] > AR5416_MAX_RATE_POWER)
ratesArray[i] = AR5416_MAX_RATE_POWER;
+
+ if (ratesArray[i] > regulatory->max_power_level)
+ regulatory->max_power_level = ratesArray[i];
}
+ if (test) + if (test)
+ return; + return;
+
if (AR_SREV_9280_20_OR_LATER(ah)) { /* Update regulatory */
for (i = 0; i < Ar5416RateSize; i++) -
ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2; i = rate6mb;
if (IS_CHAN_HT40(chan))
i = rateHt40_0;
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -853,7 +853,7 @@ static void ath9k_hw_ar9287_set_txpower( @@ -853,7 +853,7 @@ static void ath9k_hw_ar9287_set_txpower(
@ -42,24 +54,34 @@
{ {
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; struct ar9287_eeprom *pEepData = &ah->eeprom.map9287;
@@ -883,6 +883,16 @@ static void ath9k_hw_ar9287_set_txpower( @@ -877,12 +877,26 @@ static void ath9k_hw_ar9287_set_txpower(
ath9k_hw_set_ar9287_power_cal_table(ah, chan, &txPowerIndexOffset);
+ regulatory->max_power_level = 0;
for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
if (ratesArray[i] > AR9287_MAX_RATE_POWER)
ratesArray[i] = AR9287_MAX_RATE_POWER; ratesArray[i] = AR9287_MAX_RATE_POWER;
+
+ if (ratesArray[i] > regulatory->max_power_level)
+ regulatory->max_power_level = ratesArray[i];
} }
+ if (test)
+ return;
+
+ if (IS_CHAN_2GHZ(chan)) + if (IS_CHAN_2GHZ(chan))
+ i = rate1l; + i = rate1l;
+ else + else
+ i = rate6mb; + i = rate6mb;
+ +
+ regulatory->max_power_level = ratesArray[i]; + regulatory->max_power_level = ratesArray[i];
+
+ if (test)
+ return;
+ +
if (AR_SREV_9280_20_OR_LATER(ah)) { if (AR_SREV_9280_20_OR_LATER(ah)) {
for (i = 0; i < Ar5416RateSize; i++) for (i = 0; i < Ar5416RateSize; i++)
ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
@@ -971,17 +981,6 @@ static void ath9k_hw_ar9287_set_txpower( @@ -971,17 +985,6 @@ static void ath9k_hw_ar9287_set_txpower(
| ATH9K_POW_SM(ratesArray[rateDupOfdm], 8) | ATH9K_POW_SM(ratesArray[rateDupOfdm], 8)
| ATH9K_POW_SM(ratesArray[rateDupCck], 0)); | ATH9K_POW_SM(ratesArray[rateDupCck], 0));
} }
@ -88,18 +110,29 @@
{ {
#define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta) #define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta)
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
@@ -1291,6 +1291,33 @@ static void ath9k_hw_def_set_txpower(str @@ -1285,12 +1285,44 @@ static void ath9k_hw_def_set_txpower(str
ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset);
+ regulatory->max_power_level = 0;
for (i = 0; i < ARRAY_SIZE(ratesArray); i++) {
ratesArray[i] = (int16_t)(txPowerIndexOffset + ratesArray[i]);
if (ratesArray[i] > AR5416_MAX_RATE_POWER)
ratesArray[i] = AR5416_MAX_RATE_POWER; ratesArray[i] = AR5416_MAX_RATE_POWER;
+ if (ratesArray[i] > regulatory->max_power_level)
+ regulatory->max_power_level = ratesArray[i];
} }
+ i = rate6mb; + if (!test) {
+ i = rate6mb;
+ +
+ if (IS_CHAN_HT40(chan)) + if (IS_CHAN_HT40(chan))
+ i = rateHt40_0; + i = rateHt40_0;
+ else if (IS_CHAN_HT20(chan)) + else if (IS_CHAN_HT20(chan))
+ i = rateHt20_0; + i = rateHt20_0;
+ +
+ regulatory->max_power_level = ratesArray[i]; + regulatory->max_power_level = ratesArray[i];
+ }
+ +
+ switch(ar5416_get_ntxchains(ah->txchainmask)) { + switch(ar5416_get_ntxchains(ah->txchainmask)) {
+ case 1: + case 1:
@ -122,7 +155,7 @@
if (AR_SREV_9280_20_OR_LATER(ah)) { if (AR_SREV_9280_20_OR_LATER(ah)) {
for (i = 0; i < Ar5416RateSize; i++) { for (i = 0; i < Ar5416RateSize; i++) {
int8_t pwr_table_offset; int8_t pwr_table_offset;
@@ -1387,34 +1414,6 @@ static void ath9k_hw_def_set_txpower(str @@ -1387,34 +1419,6 @@ static void ath9k_hw_def_set_txpower(str
REG_WRITE(ah, AR_PHY_POWER_TX_SUB, REG_WRITE(ah, AR_PHY_POWER_TX_SUB,
ATH9K_POW_SM(pModal->pwrDecreaseFor3Chain, 6) ATH9K_POW_SM(pModal->pwrDecreaseFor3Chain, 6)
| ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0)); | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0));
@ -168,7 +201,25 @@
{ {
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
@@ -2160,9 +2160,6 @@ static void ath9k_hw_ar9300_set_txpower( @@ -2145,7 +2145,16 @@ static void ath9k_hw_ar9300_set_txpower(
twiceMaxRegulatoryPower,
powerLimit);
- while (i < ar9300RateSize) {
+ regulatory->max_power_level = 0;
+ for (i = 0; i < ar9300RateSize; i++) {
+ if (targetPowerValT2[i] > regulatory->max_power_level)
+ regulatory->max_power_level = targetPowerValT2[i];
+ }
+
+ if (test)
+ return;
+
+ for (i = 0; i < ar9300RateSize; i++) {
ath_print(common, ATH_DBG_EEPROM,
"TPC[%02d] 0x%08x ", i, targetPowerValT2[i]);
i++;
@@ -2160,9 +2169,6 @@ static void ath9k_hw_ar9300_set_txpower(
i++; i++;
} }
@ -178,16 +229,13 @@
/* /*
* This is the TX power we send back to driver core, * This is the TX power we send back to driver core,
* and it can use to pass to userspace to display our * and it can use to pass to userspace to display our
@@ -2181,8 +2178,13 @@ static void ath9k_hw_ar9300_set_txpower( @@ -2181,8 +2187,10 @@ static void ath9k_hw_ar9300_set_txpower(
i = ALL_TARGET_HT20_0_8_16; /* ht20 */ i = ALL_TARGET_HT20_0_8_16; /* ht20 */
ah->txpower_limit = targetPowerValT2[i]; ah->txpower_limit = targetPowerValT2[i];
- regulatory->max_power_level = ratesArray[i]; - regulatory->max_power_level = ratesArray[i];
+ regulatory->max_power_level = targetPowerValT2[i]; + regulatory->max_power_level = targetPowerValT2[i];
+ if (test)
+ return;
+
+ /* Write target power array to registers */ + /* Write target power array to registers */
+ ar9003_hw_tx_power_regwrite(ah, targetPowerValT2); + ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);
ar9003_hw_calibration_apply(ah, chan->channel); ar9003_hw_calibration_apply(ah, chan->channel);