ar71xx: add support for D-Link DIR-615 rev. Ix board

Based on trunk r46212.

Signed-off-by: Jaehoon You <teslamint@gmail.com>

SVN-Revision: 46248
lede-17.01
John Crispin 2015-07-07 13:48:39 +00:00
parent 8f0e96ee11
commit d535218230
11 changed files with 189 additions and 6 deletions

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@ -61,6 +61,7 @@ get_status_led() {
dir-505-a1 |\
dir-600-a1 |\
dir-615-e1 |\
dir-615-i1 |\
dir-615-e4)
status_led="d-link:green:power"
;;

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@ -160,6 +160,14 @@ dir-825-b1)
ucidef_set_led_usbdev "usb" "USB" "d-link:blue:usb" "1-1"
;;
dir-615-i1)
ucidef_set_led_default "power" "POWER" "d-link:green:power" "1"
ucidef_set_led_default "diag" "DIAG" "d-link:amber:power" "0"
ucidef_set_led_default "wps" "WPS" "d-link:blue:wps" "0"
ucidef_set_led_netdev "wan" "WAN" "d-link:green:wan" "eth0"
ucidef_set_led_wlan "wlan" "WLAN" "d-link:green:wlan" "phy0tpt"
;;
dir-825-c1)
ucidef_set_led_usbdev "usb" "USB" "d-link:blue:usb" "1-1"
ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "d-link:blue:wlan2g" "phy0tpt"

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@ -215,6 +215,7 @@ tl-wr941nd)
r6100 |\
smart-300 |\
dir-615-i1 |\
tl-mr3420-v2 |\
tl-wr841n-v8 |\
tl-wr842n-v2 |\

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@ -411,6 +411,9 @@ ar71xx_board_detect() {
*"DIR-615 rev. E4")
name="dir-615-e4"
;;
*"DIR-615 rev. I1")
name="dir-615-i1"
;;
*"DIR-825 rev. B1")
name="dir-825-b1"
;;

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@ -29,6 +29,9 @@ preinit_set_mac_address() {
fetch_mac_from_mtd config lan_mac wan_mac
echo 1 > /sys/class/leds/dir-615-c1:green:wancpu/brightness
;;
dir-615-i1)
fetch_mac_from_mtd nvram sys_lan_mac sys_wan_mac
;;
r6100)
mac_lan=$(mtd_get_mac_binary caldata 0)
[ -n "$mac_lan" ] && ifconfig eth1 hw ether "$mac_lan"

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@ -205,6 +205,7 @@ platform_check_image() {
dir-615-c1 | \
dir-615-e1 | \
dir-615-e4 | \
dir-615-i1 | \
dir-825-c1 | \
dir-835-a1 | \
dragino2 | \

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@ -53,6 +53,7 @@ CONFIG_ATH79_MACH_DHP_1565_A1=y
CONFIG_ATH79_MACH_DIR_505_A1=y
CONFIG_ATH79_MACH_DIR_600_A1=y
CONFIG_ATH79_MACH_DIR_615_C1=y
CONFIG_ATH79_MACH_DIR_615_I1=y
CONFIG_ATH79_MACH_DIR_825_B1=y
CONFIG_ATH79_MACH_DIR_825_C1=y
CONFIG_ATH79_MACH_DRAGINO2=y

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@ -0,0 +1,133 @@
/*
* D-Link DIR-615 rev. I1 board support
* Copyright (C) 2013-2015 Jaehoon You <teslamint@gmail.com>
*
* based on the DIR-600 rev. A1 board support code
* Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
*
* based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DIR_615_I1_GPIO_LED_WPS 15
#define DIR_615_I1_GPIO_LED_POWER_AMBER 14
#define DIR_615_I1_GPIO_LED_POWER_GREEN 4
#define DIR_615_I1_GPIO_LED_WAN_AMBER 22
#define DIR_615_I1_GPIO_LED_WAN_GREEN 12
#define DIR_615_I1_GPIO_LED_WLAN_GREEN 13
#define DIR_615_I1_GPIO_BTN_WPS 16
#define DIR_615_I1_GPIO_BTN_RESET 17
#define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL)
#define DIR_615_I1_LAN_PHYMASK BIT(0)
#define DIR_615_I1_WAN_PHYMASK BIT(4)
#define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4
static struct gpio_led dir_615_i1_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DIR_615_I1_GPIO_LED_POWER_GREEN,
}, {
.name = "d-link:amber:power",
.gpio = DIR_615_I1_GPIO_LED_POWER_AMBER,
}, {
.name = "d-link:amber:wan",
.gpio = DIR_615_I1_GPIO_LED_WAN_AMBER,
}, {
.name = "d-link:green:wan",
.gpio = DIR_615_I1_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:green:wlan",
.gpio = DIR_615_I1_GPIO_LED_WLAN_GREEN,
.active_low = 1,
}, {
.name = "d-link:blue:wps",
.gpio = DIR_615_I1_GPIO_LED_WPS,
.active_low = 1,
}
};
static struct gpio_keys_button dir_615_i1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_I1_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR_615_I1_GPIO_BTN_WPS,
.active_low = 1,
}
};
static void __init dir_615_i1_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
u8 mac[ETH_ALEN];
ath79_register_mdio(0, 0x0);
ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK));
ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR), mac);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
/* GMAC0 is connected to the PHY0 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = DIR_615_I1_WAN_PHYMASK;
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_mask = DIR_615_I1_LAN_PHYMASK;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(NULL);
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio),
dir_615_i1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir_615_i1_gpio_keys),
dir_615_i1_gpio_keys);
ath79_register_wmac(eeprom, mac);
}
MIPS_MACHINE(ATH79_MACH_DIR_615_I1, "DIR-615-I1", "D-Link DIR-615 rev. I1",
dir_615_i1_setup);

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@ -93,6 +93,16 @@ endef
$(eval $(call Profile,DIR615E4))
define Profile/DIR615IX
NAME:=D-Link DIR-615 rev. I1
PACKAGES:=
endef
define Profile/DIR615IX/Description
Package set optimized for the D-Link DIR-615 rev. I1.
endef
$(eval $(call Profile,DIR615IX))
define Profile/DIR825B1
NAME:=D-Link DIR-825 rev. B1

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@ -1177,6 +1177,7 @@ cameo_ap91_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3712k(firmware)
cameo_ap99_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3520k(firmware),64k(mac)ro,192k(lp)ro,64k(art)ro
cameo_ap121_mtdlayout=mtdparts=spi0.0:64k(u-boot)ro,64k(art)ro,64k(mac)ro,64k(nvram)ro,192k(language)ro,3648k(firmware)
cameo_ap121_mtdlayout_8M=mtdparts=spi0.0:64k(u-boot)ro,64k(art)ro,64k(mac)ro,64k(nvram)ro,256k(language)ro,7680k@0x80000(firmware)
cameo_ap123_mtdlayout_4M=mtdparts=spi0.0:64k(u-boot)ro,64k(nvram)ro,3712k(firmware),192k(lang)ro,64k(art)ro
cameo_db120_mtdlayout=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,15936k(firmware),192k(lang)ro,64k(mac)ro,64k(art)ro
cameo_db120_mtdlayout_8M=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,7872k(firmware),128k(lang)ro,64k(art)ro
cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art),13632k@0xa0000(firmware)
@ -1359,6 +1360,10 @@ Image/Build/CameoAP99/buildkernel=$(call MkuImageLzma,$(2),$(3) $(cameo_ap99_mtd
Image/Build/CameoAP99=$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo_ap99_mtdlayout),$(4),65536)
Image/Build/CameoAP99/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo_ap99_mtdlayout))
Image/Build/CameoAP123_4M/buildkernel=$(call MkuImageLzma,$(2),$(3) $(cameo_ap123_mtdlayout_4M))
Image/Build/CameoAP123_4M=$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo_ap123_mtdlayout_4M),$(4),26)
Image/Build/CameoAP123_4M/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo_ap123_mtdlayout_4M))
Image/Build/CameoAP135/buildkernel=$(call MkuImageLzma,$(2),$(3) $(4))
Image/Build/CameoAP135=$(call Image/Build/Cameo,$(1),$(2),$(3),$(4),$(5),26)
Image/Build/CameoAP135/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(4))
@ -2027,6 +2032,9 @@ $(eval $(call SingleProfile,CameoAP91,64kraw,FR54RTR,fr-54rtr,DIR-600-A1,ttyS0,1
$(eval $(call SingleProfile,CameoAP99,64kraw,DIR615E1,dir-615-e1,DIR-615-E1,ttyS0,115200,"AP93-AR7240-RT-081028-00"))
$(eval $(call SingleProfile,CameoAP99,64kraw,DIR615E4,dir-615-e4,DIR-615-E4,ttyS0,115200,"AP99-AR7240-RT-091105-05"))
$(eval $(call SingleProfile,CameoAP123_4M,64kraw,DIR615I1,dir-615-i1,DIR-615-I1,ttyS0,115200,"00DB120AR9341-RT-1012I1-00"))
$(eval $(call SingleProfile,CameoAP123_4M,64kraw,DIR615I3,dir-615-i3,DIR-615-I1,ttyS0,115200,"00DB120AR9341-RT-101214-00"))
$(eval $(call SingleProfile,CameoAP81,64kraw-nojffs,A02RBW300N,a02-rb-w300n,TEW-632BRP,ttyS0,115200,"AP81-AR9130-RT-070614-03"))
$(eval $(call SingleProfile,CameoAP81,64kraw-nojffs,DIR615C1,dir-615-c1,DIR-615-C1,ttyS0,115200,"AP81-AR9130-RT-070614-02"))
$(eval $(call SingleProfile,CameoAP81,64kraw-nojffs,TEW632BRP,tew-632brp,TEW-632BRP,ttyS0,115200,"AP81-AR9130-RT-070614-00"))
@ -2147,6 +2155,7 @@ $(eval $(call SingleProfile,Zcomax,64k,ZCN1523H516,zcn-1523h-5-16,ZCN-1523H-5,tt
$(eval $(call SingleProfile,ZyXEL,64k,NBG_460N_550N_550NH,nbg460n_550n_550nh,NBG460N,ttyS0,115200,NBG-460N))
$(eval $(call MultiProfile,AP121,AP121_2M AP121_4M))
$(eval $(call MultiProfile,DIR615IX,DIR615I1 DIR615I3))
$(eval $(call MultiProfile,AP136,AP136_010 AP136_020))
$(eval $(call MultiProfile,AP143,AP143_8M AP143_16M))
$(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT EWDORIN16M))

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@ -1,6 +1,6 @@
--- a/arch/mips/ath79/machtypes.h
+++ b/arch/mips/ath79/machtypes.h
@@ -16,22 +16,192 @@
@@ -16,22 +16,193 @@
enum ath79_mach_type {
ATH79_MACH_GENERIC = 0,
@ -35,6 +35,7 @@
+ ATH79_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */
+ ATH79_MACH_DIR_615_E1, /* D-Link DIR-615 rev. E1 */
+ ATH79_MACH_DIR_615_E4, /* D-Link DIR-615 rev. E4 */
+ ATH79_MACH_DIR_615_I1, /* D-Link DIR-615 rev. I1 */
+ ATH79_MACH_DIR_825_B1, /* D-Link DIR-825 rev. B1 */
+ ATH79_MACH_DIR_825_C1, /* D-Link DIR-825 rev. C1 */
+ ATH79_MACH_DIR_835_A1, /* D-Link DIR-835 rev. A1 */
@ -266,7 +267,7 @@
config ATH79_MACH_AP121
bool "Atheros AP121 reference board"
select SOC_AR933X
@@ -11,62 +75,996 @@ config ATH79_MACH_AP121
@@ -11,62 +75,1007 @@ config ATH79_MACH_AP121
select ATH79_DEV_M25P80
select ATH79_DEV_USB
select ATH79_DEV_WMAC
@ -582,6 +583,17 @@
+ select ATH79_DEV_WMAC
+ select ATH79_NVRAM
+
+config ATH79_MACH_DIR_615_I1
+ bool "D-Link DIR-615 rev. I1 support"
+ select SOC_AR934X
+ select ATH79_DEV_AP9X_PCI if PCI
+ select ATH79_DEV_ETH
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+ select ATH79_NVRAM
+
+config ATH79_MACH_DIR_825_B1
+ bool "D-Link DIR-825 rev. B1 board support"
+ select SOC_AR71XX
@ -1291,7 +1303,7 @@
config ATH79_MACH_UBNT_XM
bool "Ubiquiti Networks XM/UniFi boards"
@@ -83,6 +1081,97 @@ config ATH79_MACH_UBNT_XM
@@ -83,6 +1092,97 @@ config ATH79_MACH_UBNT_XM
Say 'Y' here if you want your kernel to support the
Ubiquiti Networks XM (rev 1.0) board.
@ -1389,7 +1401,7 @@
endmenu
config SOC_AR71XX
@@ -124,7 +1213,10 @@ config ATH79_DEV_DSA
@@ -124,7 +1224,10 @@ config ATH79_DEV_DSA
config ATH79_DEV_ETH
def_bool n
@ -1401,7 +1413,7 @@
def_bool n
config ATH79_DEV_GPIO_BUTTONS
@@ -154,6 +1246,11 @@ config ATH79_PCI_ATH9K_FIXUP
@@ -154,6 +1257,11 @@ config ATH79_PCI_ATH9K_FIXUP
def_bool n
config ATH79_ROUTERBOOT
@ -1415,7 +1427,7 @@
endif
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -38,9 +38,121 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
@@ -38,9 +38,122 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
#
# Machines
#
@ -1441,6 +1453,7 @@
+obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o
+obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
+obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o
+obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o
+obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
+obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o
+obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o