mirror of https://github.com/hak5/openwrt.git
parent
c28af661ee
commit
d31a7b51ab
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@ -0,0 +1,56 @@
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -19,6 +19,21 @@ choice
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prompt "System type"
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default SGI_IP22
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+config ADM5120
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+ bool "Infineon/ADMtek ADM5120 SoC based machines"
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+ select CEVT_R4K
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+ select CSRC_R4K
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select SYS_HAS_EARLY_PRINTK
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+ select DMA_NONCOHERENT
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+ select IRQ_CPU
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+ select SYS_SUPPORTS_LITTLE_ENDIAN
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+ select SYS_SUPPORTS_BIG_ENDIAN
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select ARCH_REQUIRE_GPIOLIB
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+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
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+ select MIPS_MACHINE
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+
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config MACH_ALCHEMY
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bool "Alchemy processor based machines"
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@@ -632,6 +647,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
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endchoice
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+source "arch/mips/adm5120/Kconfig"
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source "arch/mips/alchemy/Kconfig"
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source "arch/mips/basler/excite/Kconfig"
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source "arch/mips/jazz/Kconfig"
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--- a/arch/mips/Makefile
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+++ b/arch/mips/Makefile
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@@ -181,6 +181,21 @@ cflags-$(CONFIG_MACH_JAZZ) += -I$(srctre
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load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
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#
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+# Infineon/ADMtek ADM5120
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+#
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+libs-$(CONFIG_ADM5120) += arch/mips/adm5120/prom/
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+core-$(CONFIG_ADM5120) += arch/mips/adm5120/common/
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+core-$(CONFIG_ADM5120_OEM_CELLVISION) += arch/mips/adm5120/cellvision/
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+core-$(CONFIG_ADM5120_OEM_COMPEX) += arch/mips/adm5120/compex/
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+core-$(CONFIG_ADM5120_OEM_EDIMAX) += arch/mips/adm5120/edimax/
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+core-$(CONFIG_ADM5120_OEM_INFINEON) += arch/mips/adm5120/infineon/
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+core-$(CONFIG_ADM5120_OEM_MIKROTIK) += arch/mips/adm5120/mikrotik/
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+core-$(CONFIG_ADM5120_OEM_MOTOROLA) += arch/mips/adm5120/motorola/
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+core-$(CONFIG_ADM5120_OEM_ZYXEL) += arch/mips/adm5120/zyxel/
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+cflags-$(CONFIG_ADM5120) += -I$(srctree)/arch/mips/include/asm/mach-adm5120
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+load-$(CONFIG_ADM5120) += 0xffffffff80001000
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+
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+#
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# Common Alchemy Au1x00 stuff
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#
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core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/
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@ -0,0 +1,21 @@
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--- a/drivers/mtd/maps/Kconfig
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+++ b/drivers/mtd/maps/Kconfig
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@@ -562,4 +562,8 @@ config MTD_VMU
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To build this as a module select M here, the module will be called
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vmu-flash.
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+config MTD_ADM5120
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+ tristate "Map driver for ADM5120 based boards"
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+ depends on ADM5120
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+
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endmenu
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--- a/drivers/mtd/maps/Makefile
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+++ b/drivers/mtd/maps/Makefile
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@@ -42,6 +42,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
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obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
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obj-$(CONFIG_MTD_PCI) += pci.o
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obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
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+obj-$(CONFIG_MTD_ADM5120) += adm5120-flash.o
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obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
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obj-$(CONFIG_MTD_EDB7312) += edb7312.o
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obj-$(CONFIG_MTD_IMPA7) += impa7.o
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@ -0,0 +1,23 @@
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--- a/drivers/net/Kconfig
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+++ b/drivers/net/Kconfig
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@@ -612,6 +612,10 @@ config MIPS_AU1X00_ENET
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If you have an Alchemy Semi AU1X00 based system
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say Y. Otherwise, say N.
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+config ADM5120_ENET
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+ tristate "ADM5120 Ethernet switch support"
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+ depends on ADM5120
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+
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config SGI_IOC3_ETH
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bool "SGI IOC3 Ethernet"
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depends on PCI && SGI_IP27
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--- a/drivers/net/Makefile
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+++ b/drivers/net/Makefile
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@@ -195,6 +195,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
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# This is also a 82596 and should probably be merged
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obj-$(CONFIG_LP486E) += lp486e.o
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+obj-$(CONFIG_ADM5120_ENET) += adm5120sw.o
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obj-$(CONFIG_ETH16I) += eth16i.o
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obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o
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obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
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@ -0,0 +1,33 @@
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--- a/drivers/usb/Makefile
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+++ b/drivers/usb/Makefile
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@@ -9,6 +9,7 @@ obj-$(CONFIG_USB) += core/
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obj-$(CONFIG_USB_MON) += mon/
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obj-$(CONFIG_PCI) += host/
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+obj-$(CONFIG_USB_ADM5120_HCD) += host/
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obj-$(CONFIG_USB_EHCI_HCD) += host/
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obj-$(CONFIG_USB_ISP116X_HCD) += host/
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obj-$(CONFIG_USB_ISP1760_HCD) += host/
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -4,6 +4,10 @@
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comment "USB Host Controller Drivers"
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depends on USB
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+config USB_ADM5120_HCD
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+ tristate "ADM5120 HCD support (EXPERIMENTAL)"
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+ depends on USB && ADM5120 && EXPERIMENTAL
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+
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config USB_C67X00_HCD
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tristate "Cypress C67x00 HCD support"
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depends on USB
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--- a/drivers/usb/host/Makefile
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+++ b/drivers/usb/host/Makefile
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@@ -17,6 +17,7 @@ obj-$(CONFIG_USB_WHCI_HCD) += whci/
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obj-$(CONFIG_PCI) += pci-quirks.o
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+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o
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obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
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obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o
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obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
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@ -0,0 +1,19 @@
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--- a/arch/mips/pci/Makefile
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+++ b/arch/mips/pci/Makefile
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@@ -52,3 +52,4 @@ obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc
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obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
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obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
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obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
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+obj-$(CONFIG_ADM5120) += pci-adm5120.o
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--- a/include/linux/pci_ids.h
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+++ b/include/linux/pci_ids.h
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@@ -1764,6 +1764,9 @@
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#define PCI_VENDOR_ID_ESDGMBH 0x12fe
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#define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
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+#define PCI_VENDOR_ID_ADMTEK 0x1317
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+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120
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+
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#define PCI_VENDOR_ID_SIIG 0x131f
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#define PCI_SUBVENDOR_ID_SIIG 0x131f
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#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
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@ -0,0 +1,22 @@
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--- a/drivers/leds/Kconfig
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+++ b/drivers/leds/Kconfig
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@@ -306,4 +306,12 @@ config LEDS_TRIGGER_NETDEV
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This allows LEDs to be controlled by network device activity.
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If unsure, say Y.
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+config LEDS_TRIGGER_ADM5120_SWITCH
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+ tristate "LED ADM5120 Switch Port Status Trigger"
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+ depends on LEDS_TRIGGERS && ADM5120
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+ help
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+ This allows LEDs to be controlled by the port states of
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+ the ADM5120 built-in Ethernet Switch
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+ If unsure, say N.
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+
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endif # NEW_LEDS
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--- a/drivers/leds/Makefile
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+++ b/drivers/leds/Makefile
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@@ -40,3 +40,4 @@ obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledt
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obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o
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obj-$(CONFIG_LEDS_TRIGGER_MORSE) += ledtrig-morse.o
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obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o
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+obj-$(CONFIG_LEDS_TRIGGER_ADM5120_SWITCH) += ledtrig-adm5120-switch.o
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@ -0,0 +1,84 @@
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--- a/drivers/mtd/chips/cfi_cmdset_0002.c
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+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
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@@ -53,6 +53,12 @@
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#define AT49BV6416 0x00d6
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#define MANUFACTURER_SAMSUNG 0x00ec
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+/* Macronix */
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+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */
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+#define MX29LV160T 0x22C4 /* MX29LV160 Top-boot chip */
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+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */
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+#define MX29LV320T 0x22A7 /* MX29LV320 Top-boot chip */
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+
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static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
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static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
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static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
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@@ -293,6 +299,41 @@ static void fixup_M29W128G_write_buffer(
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}
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}
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+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
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+/*
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+ * Some Macronix chips has no/bad bootblock information in the CFI table
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+ */
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+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
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+{
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+ struct map_info *map = mtd->priv;
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+ struct cfi_private *cfi = map->fldrv_priv;
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+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
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+ __u8 t;
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+
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+ switch (cfi->id) {
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+ /* TODO: put affected chip ids here */
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+ case MX29LV160B:
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+ case MX29LV320B:
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+ t = 2; /* Bottom boot */
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+ break;
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+ case MX29LV160T:
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+ case MX29LV320T:
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+ t = 3; /* Top boot */
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+ break;
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+ default:
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+ return;
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+ }
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+
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+ if (extp->TopBottom == t)
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+ /* boot location detected by the CFI layer is correct */
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+ return;
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+
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+ extp->TopBottom = t;
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+ printk("%s: Macronix chip detected, id:0x%04X, boot location forced "
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+ "to %s\n", map->name, cfi->id, (t == 2) ? "bottom" : "top");
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+}
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+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
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+
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static struct cfi_fixup cfi_fixup_table[] = {
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{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
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#ifdef AMD_BOOTLOC_BUG
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@@ -330,6 +371,9 @@ static struct cfi_fixup fixup_table[] =
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*/
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{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
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{ CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL },
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+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
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+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
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+#endif
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{ 0, 0, NULL, NULL }
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};
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--- a/drivers/mtd/chips/Kconfig
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+++ b/drivers/mtd/chips/Kconfig
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@@ -198,6 +198,14 @@ config MTD_CFI_AMDSTD
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provides support for one of those command sets, used on chips
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including the AMD Am29LV320.
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+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
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+ bool "Fix boot-block location for Macronix flash chips"
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+ depends on MTD_CFI_AMDSTD
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+ help
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+ Some Macronix flash chips have no/wrong boot-block location in the
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+ CFI table, and the driver may detect the type incorrectly. Select
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+ this if your board has such chip.
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+
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config MTD_CFI_STAA
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tristate "Support for ST (Advanced Architecture) flash chips"
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depends on MTD_GEN_PROBE
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@ -0,0 +1,68 @@
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--- a/drivers/mtd/chips/jedec_probe.c
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+++ b/drivers/mtd/chips/jedec_probe.c
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@@ -128,6 +128,10 @@
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#define UPD29F064115 0x221C
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/* PMC */
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+#define PM39LV512 0x001B
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+#define PM39LV010 0x001C
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+#define PM39LV020 0x003D
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+#define PM39LV040 0x003E
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#define PM49FL002 0x006D
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#define PM49FL004 0x006E
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#define PM49FL008 0x006A
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@@ -1249,6 +1253,54 @@ static const struct amd_flash_info jedec
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ERASEINFO(0x02000,2),
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ERASEINFO(0x04000,1),
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}
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+ }, {
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+ .mfr_id = MANUFACTURER_PMC,
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+ .dev_id = PM39LV512,
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+ .name = "PMC Pm39LV512",
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+ .devtypes = CFI_DEVICETYPE_X8,
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+ .uaddr = MTD_UADDR_0x0555_0x02AA,
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+ .dev_size = SIZE_64KiB,
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+ .cmd_set = P_ID_AMD_STD,
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+ .nr_regions = 1,
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+ .regions = {
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+ ERASEINFO(0x01000,16),
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+ }
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+ }, {
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+ .mfr_id = MANUFACTURER_PMC,
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+ .dev_id = PM39LV010,
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+ .name = "PMC Pm39LV010",
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+ .devtypes = CFI_DEVICETYPE_X8,
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+ .uaddr = MTD_UADDR_0x0555_0x02AA,
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+ .dev_size = SIZE_128KiB,
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+ .cmd_set = P_ID_AMD_STD,
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+ .nr_regions = 1,
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+ .regions = {
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+ ERASEINFO(0x01000,32),
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+ }
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+ }, {
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+ .mfr_id = MANUFACTURER_PMC,
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+ .dev_id = PM39LV020,
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+ .name = "PMC Pm39LV020",
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+ .devtypes = CFI_DEVICETYPE_X8,
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+ .uaddr = MTD_UADDR_0x0555_0x02AA,
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+ .dev_size = SIZE_256KiB,
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+ .cmd_set = P_ID_AMD_STD,
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+ .nr_regions = 1,
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+ .regions = {
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+ ERASEINFO(0x01000,64),
|
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+ }
|
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+ }, {
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+ .mfr_id = MANUFACTURER_PMC,
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+ .dev_id = PM39LV040,
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+ .name = "PMC Pm39LV040",
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+ .devtypes = CFI_DEVICETYPE_X8,
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+ .uaddr = MTD_UADDR_0x0555_0x02AA,
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+ .dev_size = SIZE_512KiB,
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+ .cmd_set = P_ID_AMD_STD,
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+ .nr_regions = 1,
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+ .regions = {
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+ ERASEINFO(0x01000,128),
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+ }
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}, {
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.mfr_id = MANUFACTURER_PMC,
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.dev_id = PM49FL002,
|
|
@ -0,0 +1,24 @@
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--- a/drivers/mtd/Kconfig
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+++ b/drivers/mtd/Kconfig
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@@ -63,6 +63,11 @@ config MTD_ROOTFS_SPLIT
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depends on MTD_PARTITIONS
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default y
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+config MTD_TRXSPLIT
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+ bool "Automatically find and split TRX partitions"
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+ depends on MTD_PARTITIONS
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+ default n
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+
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config MTD_REDBOOT_PARTS
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tristate "RedBoot partition table parsing"
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depends on MTD_PARTITIONS
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--- a/drivers/mtd/Makefile
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+++ b/drivers/mtd/Makefile
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@@ -8,6 +8,7 @@ mtd-y := mtdcore.o mtdsuper.o mtdbdi.
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mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
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obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
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+obj-$(CONFIG_MTD_TRXSPLIT) += trxsplit.o
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obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
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obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
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obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
|
|
@ -0,0 +1,28 @@
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--- a/drivers/ata/Makefile
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+++ b/drivers/ata/Makefile
|
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@@ -73,6 +73,7 @@ obj-$(CONFIG_PATA_OCTEON_CF) += pata_oct
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obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o
|
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obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o
|
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obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o
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+obj-$(CONFIG_PATA_RB153_CF) += pata_rb153_cf.o
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# Should be last but two libata driver
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obj-$(CONFIG_PATA_ACPI) += pata_acpi.o
|
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# Should be last but one libata driver
|
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--- a/drivers/ata/Kconfig
|
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+++ b/drivers/ata/Kconfig
|
||||
@@ -568,6 +568,15 @@ config PATA_RADISYS
|
||||
|
||||
If unsure, say N.
|
||||
|
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+config PATA_RB153_CF
|
||||
+ tristate "RouterBOARD 153 Compact Flash support"
|
||||
+ depends on ADM5120_MACH_RB_153
|
||||
+ help
|
||||
+ This option enables support for a Compact Flash connected on
|
||||
+ the RouterBOARD 153.
|
||||
+
|
||||
+ If unsure, say N.
|
||||
+
|
||||
config PATA_RB532
|
||||
tristate "RouterBoard 532 PATA CompactFlash support"
|
||||
depends on MIKROTIK_RB532
|
|
@ -0,0 +1,15 @@
|
|||
--- a/arch/mips/kernel/head.S
|
||||
+++ b/arch/mips/kernel/head.S
|
||||
@@ -127,7 +127,12 @@
|
||||
/*
|
||||
* Reserved space for exception handlers.
|
||||
* Necessary for machines which link their kernels at KSEG0.
|
||||
+ * Use as temporary storage for the kernel command line, so that it
|
||||
+ * can be updated easily without having to relink the kernel.
|
||||
*/
|
||||
+
|
||||
+EXPORT(_image_cmdline)
|
||||
+ .ascii "CMDLINE:"
|
||||
.fill 0x400
|
||||
#endif
|
||||
|
|
@ -0,0 +1,378 @@
|
|||
--- a/drivers/serial/amba-pl010.c
|
||||
+++ b/drivers/serial/amba-pl010.c
|
||||
@@ -50,11 +50,10 @@
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
-#define UART_NR 8
|
||||
-
|
||||
#define SERIAL_AMBA_MAJOR 204
|
||||
#define SERIAL_AMBA_MINOR 16
|
||||
-#define SERIAL_AMBA_NR UART_NR
|
||||
+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
|
||||
+#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME
|
||||
|
||||
#define AMBA_ISR_PASS_LIMIT 256
|
||||
|
||||
@@ -80,9 +79,9 @@ static void pl010_stop_tx(struct uart_po
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr &= ~UART010_CR_TIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_start_tx(struct uart_port *port)
|
||||
@@ -90,9 +89,9 @@ static void pl010_start_tx(struct uart_p
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr |= UART010_CR_TIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_stop_rx(struct uart_port *port)
|
||||
@@ -100,9 +99,9 @@ static void pl010_stop_rx(struct uart_po
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_enable_ms(struct uart_port *port)
|
||||
@@ -110,9 +109,9 @@ static void pl010_enable_ms(struct uart_
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
unsigned int cr;
|
||||
|
||||
- cr = readb(uap->port.membase + UART010_CR);
|
||||
+ cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
cr |= UART010_CR_MSIE;
|
||||
- writel(cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(cr, uap->port.membase + UART010_CR);
|
||||
}
|
||||
|
||||
static void pl010_rx_chars(struct uart_amba_port *uap)
|
||||
@@ -120,9 +119,9 @@ static void pl010_rx_chars(struct uart_a
|
||||
struct tty_struct *tty = uap->port.info->port.tty;
|
||||
unsigned int status, ch, flag, rsr, max_count = 256;
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
while (UART_RX_DATA(status) && max_count--) {
|
||||
- ch = readb(uap->port.membase + UART01x_DR);
|
||||
+ ch = __raw_readl(uap->port.membase + UART01x_DR);
|
||||
flag = TTY_NORMAL;
|
||||
|
||||
uap->port.icount.rx++;
|
||||
@@ -131,9 +130,9 @@ static void pl010_rx_chars(struct uart_a
|
||||
* Note that the error handling code is
|
||||
* out of the main execution path
|
||||
*/
|
||||
- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
|
||||
+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
|
||||
if (unlikely(rsr & UART01x_RSR_ANY)) {
|
||||
- writel(0, uap->port.membase + UART01x_ECR);
|
||||
+ __raw_writel(0, uap->port.membase + UART01x_ECR);
|
||||
|
||||
if (rsr & UART01x_RSR_BE) {
|
||||
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
|
||||
@@ -163,7 +162,7 @@ static void pl010_rx_chars(struct uart_a
|
||||
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
|
||||
|
||||
ignore_char:
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
}
|
||||
spin_unlock(&uap->port.lock);
|
||||
tty_flip_buffer_push(tty);
|
||||
@@ -176,7 +175,7 @@ static void pl010_tx_chars(struct uart_a
|
||||
int count;
|
||||
|
||||
if (uap->port.x_char) {
|
||||
- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
|
||||
uap->port.icount.tx++;
|
||||
uap->port.x_char = 0;
|
||||
return;
|
||||
@@ -188,7 +187,7 @@ static void pl010_tx_chars(struct uart_a
|
||||
|
||||
count = uap->port.fifosize >> 1;
|
||||
do {
|
||||
- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
|
||||
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
||||
uap->port.icount.tx++;
|
||||
if (uart_circ_empty(xmit))
|
||||
@@ -206,9 +205,9 @@ static void pl010_modem_status(struct ua
|
||||
{
|
||||
unsigned int status, delta;
|
||||
|
||||
- writel(0, uap->port.membase + UART010_ICR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_ICR);
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
|
||||
delta = status ^ uap->old_status;
|
||||
uap->old_status = status;
|
||||
@@ -236,7 +235,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
|
||||
spin_lock(&uap->port.lock);
|
||||
|
||||
- status = readb(uap->port.membase + UART010_IIR);
|
||||
+ status = __raw_readl(uap->port.membase + UART010_IIR);
|
||||
if (status) {
|
||||
do {
|
||||
if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
|
||||
@@ -249,7 +248,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
if (pass_counter-- == 0)
|
||||
break;
|
||||
|
||||
- status = readb(uap->port.membase + UART010_IIR);
|
||||
+ status = __raw_readl(uap->port.membase + UART010_IIR);
|
||||
} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
|
||||
UART010_IIR_TIS));
|
||||
handled = 1;
|
||||
@@ -263,7 +262,7 @@ static irqreturn_t pl010_int(int irq, vo
|
||||
static unsigned int pl010_tx_empty(struct uart_port *port)
|
||||
{
|
||||
struct uart_amba_port *uap = (struct uart_amba_port *)port;
|
||||
- unsigned int status = readb(uap->port.membase + UART01x_FR);
|
||||
+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
|
||||
}
|
||||
|
||||
@@ -273,7 +272,7 @@ static unsigned int pl010_get_mctrl(stru
|
||||
unsigned int result = 0;
|
||||
unsigned int status;
|
||||
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
if (status & UART01x_FR_DCD)
|
||||
result |= TIOCM_CAR;
|
||||
if (status & UART01x_FR_DSR)
|
||||
@@ -299,12 +298,12 @@ static void pl010_break_ctl(struct uart_
|
||||
unsigned int lcr_h;
|
||||
|
||||
spin_lock_irqsave(&uap->port.lock, flags);
|
||||
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||||
if (break_state == -1)
|
||||
lcr_h |= UART01x_LCRH_BRK;
|
||||
else
|
||||
lcr_h &= ~UART01x_LCRH_BRK;
|
||||
- writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
|
||||
@@ -332,12 +331,12 @@ static int pl010_startup(struct uart_por
|
||||
/*
|
||||
* initialise the old status of the modem signals
|
||||
*/
|
||||
- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
|
||||
|
||||
/*
|
||||
* Finally, enable interrupts
|
||||
*/
|
||||
- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
|
||||
+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
|
||||
uap->port.membase + UART010_CR);
|
||||
|
||||
return 0;
|
||||
@@ -360,10 +359,10 @@ static void pl010_shutdown(struct uart_p
|
||||
/*
|
||||
* disable all interrupts, disable the port
|
||||
*/
|
||||
- writel(0, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_CR);
|
||||
|
||||
/* disable break condition and fifos */
|
||||
- writel(readb(uap->port.membase + UART010_LCRH) &
|
||||
+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
|
||||
~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
|
||||
uap->port.membase + UART010_LCRH);
|
||||
|
||||
@@ -385,7 +384,7 @@ pl010_set_termios(struct uart_port *port
|
||||
/*
|
||||
* Ask the core to calculate the divisor for us.
|
||||
*/
|
||||
- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
|
||||
+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
|
||||
quot = uart_get_divisor(port, baud);
|
||||
|
||||
switch (termios->c_cflag & CSIZE) {
|
||||
@@ -448,25 +447,25 @@ pl010_set_termios(struct uart_port *port
|
||||
uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
|
||||
|
||||
/* first, disable everything */
|
||||
- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
|
||||
+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
|
||||
|
||||
if (UART_ENABLE_MS(port, termios->c_cflag))
|
||||
old_cr |= UART010_CR_MSIE;
|
||||
|
||||
- writel(0, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(0, uap->port.membase + UART010_CR);
|
||||
|
||||
/* Set baud rate */
|
||||
quot -= 1;
|
||||
- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
|
||||
- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
|
||||
+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
|
||||
+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
|
||||
|
||||
/*
|
||||
* ----------v----------v----------v----------v-----
|
||||
* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
|
||||
* ----------^----------^----------^----------^-----
|
||||
*/
|
||||
- writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
- writel(old_cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
|
||||
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
|
||||
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
@@ -538,7 +537,7 @@ static struct uart_ops amba_pl010_pops =
|
||||
.verify_port = pl010_verify_port,
|
||||
};
|
||||
|
||||
-static struct uart_amba_port *amba_ports[UART_NR];
|
||||
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
|
||||
|
||||
#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
|
||||
|
||||
@@ -548,10 +547,10 @@ static void pl010_console_putchar(struct
|
||||
unsigned int status;
|
||||
|
||||
do {
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (!UART_TX_READY(status));
|
||||
- writel(ch, uap->port.membase + UART01x_DR);
|
||||
+ __raw_writel(ch, uap->port.membase + UART01x_DR);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -565,8 +564,8 @@ pl010_console_write(struct console *co,
|
||||
/*
|
||||
* First save the CR then disable the interrupts
|
||||
*/
|
||||
- old_cr = readb(uap->port.membase + UART010_CR);
|
||||
- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
|
||||
|
||||
uart_console_write(&uap->port, s, count, pl010_console_putchar);
|
||||
|
||||
@@ -575,10 +574,10 @@ pl010_console_write(struct console *co,
|
||||
* and restore the TCR
|
||||
*/
|
||||
do {
|
||||
- status = readb(uap->port.membase + UART01x_FR);
|
||||
+ status = __raw_readl(uap->port.membase + UART01x_FR);
|
||||
barrier();
|
||||
} while (status & UART01x_FR_BUSY);
|
||||
- writel(old_cr, uap->port.membase + UART010_CR);
|
||||
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
|
||||
|
||||
clk_disable(uap->clk);
|
||||
}
|
||||
@@ -587,9 +586,9 @@ static void __init
|
||||
pl010_console_get_options(struct uart_amba_port *uap, int *baud,
|
||||
int *parity, int *bits)
|
||||
{
|
||||
- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
|
||||
unsigned int lcr_h, quot;
|
||||
- lcr_h = readb(uap->port.membase + UART010_LCRH);
|
||||
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
|
||||
|
||||
*parity = 'n';
|
||||
if (lcr_h & UART01x_LCRH_PEN) {
|
||||
@@ -604,8 +603,8 @@ pl010_console_get_options(struct uart_am
|
||||
else
|
||||
*bits = 8;
|
||||
|
||||
- quot = readb(uap->port.membase + UART010_LCRL) |
|
||||
- readb(uap->port.membase + UART010_LCRM) << 8;
|
||||
+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
|
||||
+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
|
||||
*baud = uap->port.uartclk / (16 * (quot + 1));
|
||||
}
|
||||
}
|
||||
@@ -623,7 +622,7 @@ static int __init pl010_console_setup(st
|
||||
* if so, search for the first available port that does have
|
||||
* console support.
|
||||
*/
|
||||
- if (co->index >= UART_NR)
|
||||
+ if (co->index >= SERIAL_AMBA_NR)
|
||||
co->index = 0;
|
||||
uap = amba_ports[co->index];
|
||||
if (!uap)
|
||||
@@ -641,7 +640,7 @@ static int __init pl010_console_setup(st
|
||||
|
||||
static struct uart_driver amba_reg;
|
||||
static struct console amba_console = {
|
||||
- .name = "ttyAM",
|
||||
+ .name = SERIAL_AMBA_NAME,
|
||||
.write = pl010_console_write,
|
||||
.device = uart_console_device,
|
||||
.setup = pl010_console_setup,
|
||||
@@ -657,11 +656,11 @@ static struct console amba_console = {
|
||||
|
||||
static struct uart_driver amba_reg = {
|
||||
.owner = THIS_MODULE,
|
||||
- .driver_name = "ttyAM",
|
||||
- .dev_name = "ttyAM",
|
||||
+ .driver_name = SERIAL_AMBA_NAME,
|
||||
+ .dev_name = SERIAL_AMBA_NAME,
|
||||
.major = SERIAL_AMBA_MAJOR,
|
||||
.minor = SERIAL_AMBA_MINOR,
|
||||
- .nr = UART_NR,
|
||||
+ .nr = SERIAL_AMBA_NR,
|
||||
.cons = AMBA_CONSOLE,
|
||||
};
|
||||
|
||||
--- a/drivers/serial/Kconfig
|
||||
+++ b/drivers/serial/Kconfig
|
||||
@@ -284,10 +284,25 @@ config SERIAL_AMBA_PL010
|
||||
help
|
||||
This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
|
||||
an Integrator/AP or Integrator/PP2 platform, or if you have a
|
||||
- Cirrus Logic EP93xx CPU, say Y or M here.
|
||||
+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
+config SERIAL_AMBA_PL010_NUMPORTS
|
||||
+ int "Maximum number of AMBA PL010 serial ports"
|
||||
+ depends on SERIAL_AMBA_PL010
|
||||
+ default "8"
|
||||
+ ---help---
|
||||
+ Set this to the number of serial ports you want the AMBA PL010 driver
|
||||
+ to support.
|
||||
+
|
||||
+config SERIAL_AMBA_PL010_PORTNAME
|
||||
+ string "Name of the AMBA PL010 serial ports"
|
||||
+ depends on SERIAL_AMBA_PL010
|
||||
+ default "ttyAM"
|
||||
+ ---help---
|
||||
+ ::: To be written :::
|
||||
+
|
||||
config SERIAL_AMBA_PL010_CONSOLE
|
||||
bool "Support for console on AMBA serial port"
|
||||
depends on SERIAL_AMBA_PL010=y
|
|
@ -0,0 +1,13 @@
|
|||
--- a/drivers/amba/bus.c
|
||||
+++ b/drivers/amba/bus.c
|
||||
@@ -18,6 +18,10 @@
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
+#ifndef NO_IRQ
|
||||
+#define NO_IRQ (-1)
|
||||
+#endif
|
||||
+
|
||||
#define to_amba_device(d) container_of(d, struct amba_device, dev)
|
||||
#define to_amba_driver(d) container_of(d, struct amba_driver, drv)
|
||||
|
|
@ -0,0 +1,191 @@
|
|||
--- a/drivers/pci/Kconfig
|
||||
+++ b/drivers/pci/Kconfig
|
||||
@@ -51,6 +51,12 @@ config PCI_STUB
|
||||
|
||||
When in doubt, say N.
|
||||
|
||||
+config PCI_DISABLE_COMMON_QUIRKS
|
||||
+ bool "PCI disable common quirks"
|
||||
+ depends on PCI
|
||||
+ help
|
||||
+ If you don't know what to do here, say N.
|
||||
+
|
||||
config HT_IRQ
|
||||
bool "Interrupts on hypertransport devices"
|
||||
default y
|
||||
--- a/drivers/pci/quirks.c
|
||||
+++ b/drivers/pci/quirks.c
|
||||
@@ -98,6 +98,7 @@ static void __devinit quirk_resource_ali
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_resource_alignment);
|
||||
|
||||
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
|
||||
/* The Mellanox Tavor device gives false positive parity errors
|
||||
* Mark this device with a broken_parity_status, to allow
|
||||
* PCI scanning code to "skip" this now blacklisted device.
|
||||
@@ -132,11 +133,11 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_I
|
||||
|
||||
/* The VIA VP2/VP3/MVP3 seem to have some 'features'. There may be a workaround
|
||||
but VIA don't answer queries. If you happen to have good contacts at VIA
|
||||
- ask them for me please -- Alan
|
||||
-
|
||||
- This appears to be BIOS not version dependent. So presumably there is a
|
||||
+ ask them for me please -- Alan
|
||||
+
|
||||
+ This appears to be BIOS not version dependent. So presumably there is a
|
||||
chipset level fix */
|
||||
-
|
||||
+
|
||||
static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
|
||||
{
|
||||
if (!isa_dma_bridge_buggy) {
|
||||
@@ -204,7 +205,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
|
||||
* the info on which Mr Breese based his work.
|
||||
*
|
||||
* Updated based on further information from the site and also on
|
||||
- * information provided by VIA
|
||||
+ * information provided by VIA
|
||||
*/
|
||||
static void quirk_vialatency(struct pci_dev *dev)
|
||||
{
|
||||
@@ -212,7 +213,7 @@ static void quirk_vialatency(struct pci_
|
||||
u8 busarb;
|
||||
/* Ok we have a potential problem chipset here. Now see if we have
|
||||
a buggy southbridge */
|
||||
-
|
||||
+
|
||||
p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL);
|
||||
if (p!=NULL) {
|
||||
/* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */
|
||||
@@ -227,9 +228,9 @@ static void quirk_vialatency(struct pci_
|
||||
if (p->revision < 0x10 || p->revision > 0x12)
|
||||
goto exit;
|
||||
}
|
||||
-
|
||||
+
|
||||
/*
|
||||
- * Ok we have the problem. Now set the PCI master grant to
|
||||
+ * Ok we have the problem. Now set the PCI master grant to
|
||||
* occur every master grant. The apparent bug is that under high
|
||||
* PCI load (quite common in Linux of course) you can get data
|
||||
* loss when the CPU is held off the bus for 3 bus master requests
|
||||
@@ -242,7 +243,7 @@ static void quirk_vialatency(struct pci_
|
||||
*/
|
||||
|
||||
pci_read_config_byte(dev, 0x76, &busarb);
|
||||
- /* Set bit 4 and bi 5 of byte 76 to 0x01
|
||||
+ /* Set bit 4 and bi 5 of byte 76 to 0x01
|
||||
"Master priority rotation on every PCI master grant */
|
||||
busarb &= ~(1<<5);
|
||||
busarb |= (1<<4);
|
||||
@@ -285,7 +286,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
|
||||
* that DMA to AGP space. Latency must be set to 0xA and triton
|
||||
* workaround applied too
|
||||
* [Info kindly provided by ALi]
|
||||
- */
|
||||
+ */
|
||||
static void __init quirk_alimagik(struct pci_dev *dev)
|
||||
{
|
||||
if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) {
|
||||
@@ -361,7 +362,7 @@ static void __devinit quirk_io_region(st
|
||||
pci_claim_resource(dev, nr);
|
||||
dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
|
||||
}
|
||||
-}
|
||||
+}
|
||||
|
||||
/*
|
||||
* ATI Northbridge setups MCE the processor if you even
|
||||
@@ -418,7 +419,7 @@ static void piix4_io_quirk(struct pci_de
|
||||
/*
|
||||
* For now we only print it out. Eventually we'll want to
|
||||
* reserve it (at least if it's in the 0x1000+ range), but
|
||||
- * let's get enough confirmation reports first.
|
||||
+ * let's get enough confirmation reports first.
|
||||
*/
|
||||
base &= -size;
|
||||
dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1);
|
||||
@@ -443,7 +444,7 @@ static void piix4_mem_quirk(struct pci_d
|
||||
}
|
||||
/*
|
||||
* For now we only print it out. Eventually we'll want to
|
||||
- * reserve it, but let's get enough confirmation reports first.
|
||||
+ * reserve it, but let's get enough confirmation reports first.
|
||||
*/
|
||||
base &= -size;
|
||||
dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1);
|
||||
@@ -673,7 +674,7 @@ static void __devinit quirk_vt8235_acpi(
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
|
||||
|
||||
|
||||
-#ifdef CONFIG_X86_IO_APIC
|
||||
+#ifdef CONFIG_X86_IO_APIC
|
||||
|
||||
#include <asm/io_apic.h>
|
||||
|
||||
@@ -687,12 +688,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_V
|
||||
static void quirk_via_ioapic(struct pci_dev *dev)
|
||||
{
|
||||
u8 tmp;
|
||||
-
|
||||
+
|
||||
if (nr_ioapics < 1)
|
||||
tmp = 0; /* nothing routed to external APIC */
|
||||
else
|
||||
tmp = 0x1f; /* all known bits (4-0) routed to external APIC */
|
||||
-
|
||||
+
|
||||
dev_info(&dev->dev, "%sbling VIA external APIC routing\n",
|
||||
tmp == 0 ? "Disa" : "Ena");
|
||||
|
||||
@@ -977,7 +978,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_C
|
||||
static void quirk_disable_pxb(struct pci_dev *pdev)
|
||||
{
|
||||
u16 config;
|
||||
-
|
||||
+
|
||||
if (pdev->revision != 0x04) /* Only C0 requires this */
|
||||
return;
|
||||
pci_read_config_word(pdev, 0x40, &config);
|
||||
@@ -1073,11 +1074,11 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
|
||||
* On ASUS P4B boards, the SMBus PCI Device within the ICH2/4 southbridge
|
||||
* is not activated. The myth is that Asus said that they do not want the
|
||||
* users to be irritated by just another PCI Device in the Win98 device
|
||||
- * manager. (see the file prog/hotplug/README.p4b in the lm_sensors
|
||||
+ * manager. (see the file prog/hotplug/README.p4b in the lm_sensors
|
||||
* package 2.7.0 for details)
|
||||
*
|
||||
- * The SMBus PCI Device can be activated by setting a bit in the ICH LPC
|
||||
- * bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
|
||||
+ * The SMBus PCI Device can be activated by setting a bit in the ICH LPC
|
||||
+ * bridge. Unfortunately, this device has no subvendor/subdevice ID. So it
|
||||
* becomes necessary to do this tweak in two steps -- the chosen trigger
|
||||
* is either the Host bridge (preferred) or on-board VGA controller.
|
||||
*
|
||||
@@ -1229,7 +1230,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
|
||||
static void asus_hides_smbus_lpc(struct pci_dev *dev)
|
||||
{
|
||||
u16 val;
|
||||
-
|
||||
+
|
||||
if (likely(!asus_hides_smbus))
|
||||
return;
|
||||
|
||||
@@ -1859,7 +1860,9 @@ static void __devinit fixup_rev1_53c810(
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
|
||||
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
|
||||
|
||||
+#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
|
||||
/* Enable 1k I/O space granularity on the Intel P64H2 */
|
||||
static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
|
||||
{
|
||||
@@ -2463,6 +2466,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
|
||||
|
||||
#endif /* CONFIG_PCI_IOV */
|
||||
+#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
|
||||
|
||||
static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
|
||||
struct pci_fixup *end)
|
|
@ -0,0 +1,27 @@
|
|||
--- a/drivers/leds/leds-gpio.c
|
||||
+++ b/drivers/leds/leds-gpio.c
|
||||
@@ -44,13 +44,17 @@ static void gpio_led_set(struct led_clas
|
||||
container_of(led_cdev, struct gpio_led_data, cdev);
|
||||
int level;
|
||||
|
||||
- if (value == LED_OFF)
|
||||
- level = 0;
|
||||
- else
|
||||
- level = 1;
|
||||
-
|
||||
- if (led_dat->active_low)
|
||||
- level = !level;
|
||||
+ switch (value) {
|
||||
+ case LED_OFF:
|
||||
+ level = led_dat->active_low ? 1 : 0;
|
||||
+ break;
|
||||
+ case LED_FULL:
|
||||
+ level = led_dat->active_low ? 0 : 1;
|
||||
+ break;
|
||||
+ default:
|
||||
+ level = value;
|
||||
+ break;
|
||||
+ }
|
||||
|
||||
/* Setting GPIOs with I2C/etc requires a task context, and we don't
|
||||
* seem to have a reliable way to know if we're already in one; so
|
|
@ -0,0 +1,31 @@
|
|||
--- a/drivers/watchdog/Kconfig
|
||||
+++ b/drivers/watchdog/Kconfig
|
||||
@@ -713,6 +713,18 @@ config RC32434_WDT
|
||||
To compile this driver as a module, choose M here: the
|
||||
module will be called rc32434_wdt.
|
||||
|
||||
+config ADM5120_WDT
|
||||
+ tristate "Infineon ADM5120 SoC hardware watchdog"
|
||||
+ depends on WATCHDOG && ADM5120
|
||||
+ help
|
||||
+ This is a driver for hardware watchdog integrated in Infineon
|
||||
+ ADM5120 SoC. This watchdog simply watches your kernel to make sure
|
||||
+ it doesn't freeze, and if it does, it reboots your computer after a
|
||||
+ certain amount of time.
|
||||
+
|
||||
+ To compile this driver as a module, choose M here: the module will be
|
||||
+ called adm5120_wdt.
|
||||
+
|
||||
config INDYDOG
|
||||
tristate "Indy/I2 Hardware Watchdog"
|
||||
depends on SGI_HAS_INDYDOG
|
||||
--- a/drivers/watchdog/Makefile
|
||||
+++ b/drivers/watchdog/Makefile
|
||||
@@ -105,6 +105,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
|
||||
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
|
||||
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
|
||||
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
|
||||
+obj-$(CONFIG_ADM5120_WDT) += adm5120_wdt.o
|
||||
|
||||
# PARISC Architecture
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
--- a/arch/mips/adm5120/common/platform.c
|
||||
+++ b/arch/mips/adm5120/common/platform.c
|
||||
@@ -190,7 +190,6 @@ struct amba_pl010_data adm5120_uart0_dat
|
||||
|
||||
struct amba_device adm5120_uart0_device = {
|
||||
.dev = {
|
||||
- .bus_id = "APB:UART0",
|
||||
.platform_data = &adm5120_uart0_data,
|
||||
},
|
||||
.res = {
|
||||
@@ -208,7 +207,6 @@ struct amba_pl010_data adm5120_uart1_dat
|
||||
|
||||
struct amba_device adm5120_uart1_device = {
|
||||
.dev = {
|
||||
- .bus_id = "APB:UART1",
|
||||
.platform_data = &adm5120_uart1_data,
|
||||
},
|
||||
.res = {
|
|
@ -0,0 +1,11 @@
|
|||
--- a/drivers/mtd/maps/adm5120-flash.c
|
||||
+++ b/drivers/mtd/maps/adm5120-flash.c
|
||||
@@ -233,7 +233,7 @@ static int adm5120_flash_initinfo(struct
|
||||
struct flash_desc *fdesc;
|
||||
u32 t = 0;
|
||||
|
||||
- map->name = dev->dev.bus_id;
|
||||
+ map->name = dev_name(&dev->dev);
|
||||
|
||||
if (dev->id > 1) {
|
||||
MAP_ERR(map, "invalid flash id\n");
|
|
@ -0,0 +1,20 @@
|
|||
--- a/drivers/net/adm5120sw.c
|
||||
+++ b/drivers/net/adm5120sw.c
|
||||
@@ -517,7 +517,7 @@ static int adm5120_if_poll(struct napi_s
|
||||
status = sw_int_status() & SWITCH_INTS_POLL;
|
||||
if ((done < limit) && (!status)) {
|
||||
SW_DBG("disable polling mode for %s\n", dev->name);
|
||||
- netif_rx_complete(dev, napi);
|
||||
+ napi_complete(napi);
|
||||
sw_int_unmask(SWITCH_INTS_POLL);
|
||||
return 0;
|
||||
}
|
||||
@@ -548,7 +548,7 @@ static irqreturn_t adm5120_switch_irq(in
|
||||
sw_dump_intr_mask("poll ints", status);
|
||||
SW_DBG("enable polling mode for %s\n", dev->name);
|
||||
sw_int_mask(SWITCH_INTS_POLL);
|
||||
- netif_rx_schedule(dev, &priv->napi);
|
||||
+ napi_schedule(&priv->napi);
|
||||
}
|
||||
#else
|
||||
sw_int_ack(status);
|
|
@ -0,0 +1,216 @@
|
|||
CONFIG_32BIT=y
|
||||
# CONFIG_64BIT is not set
|
||||
CONFIG_ADM5120=y
|
||||
CONFIG_ADM5120_ENET=y
|
||||
CONFIG_ADM5120_MACH_P_334WT=y
|
||||
CONFIG_ADM5120_MACH_P_335=y
|
||||
# CONFIG_ADM5120_OEM_CELLVISION is not set
|
||||
# CONFIG_ADM5120_OEM_COMPEX is not set
|
||||
# CONFIG_ADM5120_OEM_EDIMAX is not set
|
||||
# CONFIG_ADM5120_OEM_INFINEON is not set
|
||||
# CONFIG_ADM5120_OEM_MIKROTIK is not set
|
||||
# CONFIG_ADM5120_OEM_MOTOROLA is not set
|
||||
CONFIG_ADM5120_OEM_ZYXEL=y
|
||||
CONFIG_ADM5120_SOC_BGA=y
|
||||
CONFIG_ADM5120_WDT=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_ARCH_REQUIRE_GPIOLIB=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_ARCH_SUPPORTS_OPROFILE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_BCM47XX is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
CONFIG_BINFMT_MISC=m
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
|
||||
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CEVT_R4K_LIB=y
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2"
|
||||
CONFIG_CPU_BIG_ENDIAN=y
|
||||
# CONFIG_CPU_CAVIUM_OCTEON is not set
|
||||
CONFIG_CPU_HAS_LLSC=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
# CONFIG_CPU_LITTLE_ENDIAN is not set
|
||||
# CONFIG_CPU_LOONGSON2 is not set
|
||||
CONFIG_CPU_MIPS32=y
|
||||
CONFIG_CPU_MIPS32_R1=y
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
CONFIG_CPU_MIPSR1=y
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
# CONFIG_CPU_R10000 is not set
|
||||
# CONFIG_CPU_R3000 is not set
|
||||
# CONFIG_CPU_R4300 is not set
|
||||
# CONFIG_CPU_R4X00 is not set
|
||||
# CONFIG_CPU_R5000 is not set
|
||||
# CONFIG_CPU_R5432 is not set
|
||||
# CONFIG_CPU_R5500 is not set
|
||||
# CONFIG_CPU_R6000 is not set
|
||||
# CONFIG_CPU_R8000 is not set
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
# CONFIG_CPU_RM9000 is not set
|
||||
# CONFIG_CPU_SB1 is not set
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
# CONFIG_CPU_TX39XX is not set
|
||||
# CONFIG_CPU_TX49XX is not set
|
||||
# CONFIG_CPU_VR41XX is not set
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_BLKCIPHER2=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_CSRC_R4K_LIB=y
|
||||
CONFIG_DECOMPRESS_LZMA=y
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_GENERIC_ACL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HID=m
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HZ=250
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
CONFIG_INPUT=m
|
||||
# CONFIG_INPUT_GPIO_BUTTONS is not set
|
||||
# CONFIG_INPUT_YEALINK is not set
|
||||
CONFIG_IRQ_CPU=y
|
||||
# CONFIG_ISDN is not set
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
# CONFIG_LEMOTE_FULONG is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_MACH_TX39XX is not set
|
||||
# CONFIG_MACH_TX49XX is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
CONFIG_MII=m
|
||||
# CONFIG_MIKROTIK_RB532 is not set
|
||||
CONFIG_MIPS=y
|
||||
# CONFIG_MIPS_COBALT is not set
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
CONFIG_MIPS_MACHINE=y
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
# CONFIG_MIPS_MT_SMP is not set
|
||||
# CONFIG_MIPS_MT_SMTC is not set
|
||||
# CONFIG_MIPS_SIM is not set
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MTD_ADM5120=y
|
||||
CONFIG_MTD_BLOCK2MTD=y
|
||||
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_TRXSPLIT=y
|
||||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_NXP_STB220 is not set
|
||||
# CONFIG_NXP_STB225 is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
# CONFIG_PCI_STUB is not set
|
||||
# CONFIG_PCSPKR_PLATFORM is not set
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_PROBE_INITRD_HEADER is not set
|
||||
# CONFIG_PROM_EMU is not set
|
||||
CONFIG_SCHED_OMIT_FRAME_POINTER=y
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
CONFIG_SERIAL_AMBA_PL010=y
|
||||
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
|
||||
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
|
||||
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
|
||||
# CONFIG_SERIAL_AMBA_PL011 is not set
|
||||
CONFIG_SERIO=y
|
||||
# CONFIG_SERIO_AMBAKMI is not set
|
||||
# CONFIG_SERIO_I8042 is not set
|
||||
# CONFIG_SERIO_LIBPS2 is not set
|
||||
# CONFIG_SERIO_PCIPS2 is not set
|
||||
# CONFIG_SERIO_RAW is not set
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP28 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_CRHINE is not set
|
||||
# CONFIG_SIBYTE_CRHONE is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SLAB is not set
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_SLUB=y
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
CONFIG_SWAP_IO_SPACE=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
CONFIG_TICK_ONESHOT=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
CONFIG_USB=m
|
||||
CONFIG_USB_ADM5120_HCD=m
|
||||
CONFIG_USB_DEBUG=y
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
|
||||
CONFIG_USB_OHCI_HCD=m
|
||||
CONFIG_USB_SUPPORT=y
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
|
@ -0,0 +1,263 @@
|
|||
CONFIG_32BIT=y
|
||||
# CONFIG_64BIT is not set
|
||||
CONFIG_ADM5120=y
|
||||
CONFIG_ADM5120_ENET=y
|
||||
CONFIG_ADM5120_MACH_BR_6104K=y
|
||||
CONFIG_ADM5120_MACH_BR_6104KP=y
|
||||
CONFIG_ADM5120_MACH_BR_61X4WG=y
|
||||
CONFIG_ADM5120_MACH_CAS_771=y
|
||||
CONFIG_ADM5120_MACH_EASY5120P_ATA=y
|
||||
CONFIG_ADM5120_MACH_EASY5120_RT=y
|
||||
CONFIG_ADM5120_MACH_EASY5120_WVOIP=y
|
||||
CONFIG_ADM5120_MACH_EASY83000=y
|
||||
CONFIG_ADM5120_MACH_NFS_101=y
|
||||
CONFIG_ADM5120_MACH_NP27G=y
|
||||
CONFIG_ADM5120_MACH_NP28G=y
|
||||
CONFIG_ADM5120_MACH_PMUGW=y
|
||||
CONFIG_ADM5120_MACH_RB_11X=y
|
||||
CONFIG_ADM5120_MACH_RB_133=y
|
||||
CONFIG_ADM5120_MACH_RB_133C=y
|
||||
CONFIG_ADM5120_MACH_RB_150=y
|
||||
CONFIG_ADM5120_MACH_RB_153=y
|
||||
CONFIG_ADM5120_MACH_RB_192=y
|
||||
CONFIG_ADM5120_MACH_WP54=y
|
||||
CONFIG_ADM5120_OEM_CELLVISION=y
|
||||
CONFIG_ADM5120_OEM_COMPEX=y
|
||||
CONFIG_ADM5120_OEM_EDIMAX=y
|
||||
CONFIG_ADM5120_OEM_INFINEON=y
|
||||
CONFIG_ADM5120_OEM_MIKROTIK=y
|
||||
CONFIG_ADM5120_OEM_MOTOROLA=y
|
||||
# CONFIG_ADM5120_OEM_ZYXEL is not set
|
||||
CONFIG_ADM5120_SOC_BGA=y
|
||||
CONFIG_ADM5120_WDT=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_ARCH_REQUIRE_GPIOLIB=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_ARCH_SUPPORTS_OPROFILE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ATA=m
|
||||
# CONFIG_ATA_NONSTANDARD is not set
|
||||
# CONFIG_ATA_PIIX is not set
|
||||
CONFIG_ATA_SFF=y
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_BCM47XX is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
|
||||
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CEVT_R4K_LIB=y
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,yaffs2,jffs2"
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
# CONFIG_CPU_CAVIUM_OCTEON is not set
|
||||
CONFIG_CPU_HAS_LLSC=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
CONFIG_CPU_LITTLE_ENDIAN=y
|
||||
# CONFIG_CPU_LOONGSON2 is not set
|
||||
CONFIG_CPU_MIPS32=y
|
||||
CONFIG_CPU_MIPS32_R1=y
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
CONFIG_CPU_MIPSR1=y
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
# CONFIG_CPU_R10000 is not set
|
||||
# CONFIG_CPU_R3000 is not set
|
||||
# CONFIG_CPU_R4300 is not set
|
||||
# CONFIG_CPU_R4X00 is not set
|
||||
# CONFIG_CPU_R5000 is not set
|
||||
# CONFIG_CPU_R5432 is not set
|
||||
# CONFIG_CPU_R5500 is not set
|
||||
# CONFIG_CPU_R6000 is not set
|
||||
# CONFIG_CPU_R8000 is not set
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
# CONFIG_CPU_RM9000 is not set
|
||||
# CONFIG_CPU_SB1 is not set
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
# CONFIG_CPU_TX39XX is not set
|
||||
# CONFIG_CPU_TX49XX is not set
|
||||
# CONFIG_CPU_VR41XX is not set
|
||||
CONFIG_CRYPTO_AEAD2=y
|
||||
CONFIG_CRYPTO_BLKCIPHER2=y
|
||||
CONFIG_CRYPTO_HASH=m
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_CSRC_R4K_LIB=y
|
||||
CONFIG_DECOMPRESS_LZMA=y
|
||||
CONFIG_DEVPORT=y
|
||||
# CONFIG_DM9000 is not set
|
||||
CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_FIRMWARE_IN_KERNEL=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_GENERIC_ACL=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HAMRADIO is not set
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HID=m
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HOSTAP=m
|
||||
CONFIG_HOSTAP_FIRMWARE=y
|
||||
CONFIG_HOSTAP_PCI=m
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HZ=250
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
CONFIG_INPUT=m
|
||||
# CONFIG_INPUT_GPIO_BUTTONS is not set
|
||||
# CONFIG_INPUT_YEALINK is not set
|
||||
CONFIG_IRQ_CPU=y
|
||||
# CONFIG_ISDN is not set
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_LEDS_GPIO=m
|
||||
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
# CONFIG_LEMOTE_FULONG is not set
|
||||
CONFIG_LIB80211=m
|
||||
CONFIG_LIB80211_CRYPT_CCMP=m
|
||||
CONFIG_LIB80211_CRYPT_TKIP=m
|
||||
CONFIG_LIB80211_CRYPT_WEP=m
|
||||
# CONFIG_MACH_ALCHEMY is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_MACH_TX39XX is not set
|
||||
# CONFIG_MACH_TX49XX is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
CONFIG_MII=m
|
||||
# CONFIG_MIKROTIK_RB532 is not set
|
||||
CONFIG_MIPS=y
|
||||
# CONFIG_MIPS_COBALT is not set
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=5
|
||||
CONFIG_MIPS_MACHINE=y
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
CONFIG_MIPS_MT_DISABLED=y
|
||||
# CONFIG_MIPS_MT_SMP is not set
|
||||
# CONFIG_MIPS_MT_SMTC is not set
|
||||
# CONFIG_MIPS_SIM is not set
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MTD_ADM5120=y
|
||||
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
|
||||
# CONFIG_MTD_CFI_INTELEXT is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_MYLOADER_PARTS=y
|
||||
CONFIG_MTD_NAND=y
|
||||
# CONFIG_MTD_NAND_CAFE is not set
|
||||
CONFIG_MTD_NAND_PLATFORM=y
|
||||
CONFIG_MTD_TRXSPLIT=y
|
||||
# CONFIG_NATSEMI is not set
|
||||
CONFIG_NO_HZ=y
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_NXP_STB220 is not set
|
||||
# CONFIG_NXP_STB225 is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_PATA_RB153_CF=m
|
||||
# CONFIG_PATA_SCH is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
# CONFIG_PCI_STUB is not set
|
||||
# CONFIG_PCSPKR_PLATFORM is not set
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_PROBE_INITRD_HEADER is not set
|
||||
# CONFIG_PROM_EMU is not set
|
||||
CONFIG_SCHED_OMIT_FRAME_POINTER=y
|
||||
CONFIG_SCSI=m
|
||||
# CONFIG_SERIAL_8250 is not set
|
||||
CONFIG_SERIAL_AMBA_PL010=y
|
||||
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
|
||||
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
|
||||
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
|
||||
# CONFIG_SERIAL_AMBA_PL011 is not set
|
||||
CONFIG_SERIO=y
|
||||
# CONFIG_SERIO_AMBAKMI is not set
|
||||
# CONFIG_SERIO_I8042 is not set
|
||||
# CONFIG_SERIO_LIBPS2 is not set
|
||||
# CONFIG_SERIO_PCIPS2 is not set
|
||||
# CONFIG_SERIO_RAW is not set
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
# CONFIG_SGI_IP22 is not set
|
||||
# CONFIG_SGI_IP27 is not set
|
||||
# CONFIG_SGI_IP28 is not set
|
||||
# CONFIG_SGI_IP32 is not set
|
||||
# CONFIG_SIBYTE_BIGSUR is not set
|
||||
# CONFIG_SIBYTE_CARMEL is not set
|
||||
# CONFIG_SIBYTE_CRHINE is not set
|
||||
# CONFIG_SIBYTE_CRHONE is not set
|
||||
# CONFIG_SIBYTE_LITTLESUR is not set
|
||||
# CONFIG_SIBYTE_RHONE is not set
|
||||
# CONFIG_SIBYTE_SENTOSA is not set
|
||||
# CONFIG_SIBYTE_SWARM is not set
|
||||
# CONFIG_SLAB is not set
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_SLUB=y
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_EARLY_PRINTK=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
# CONFIG_TC35815 is not set
|
||||
CONFIG_TICK_ONESHOT=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
CONFIG_USB=m
|
||||
CONFIG_USB_ADM5120_HCD=m
|
||||
CONFIG_USB_EHCI_HCD=m
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
|
||||
CONFIG_USB_OHCI_HCD=m
|
||||
CONFIG_USB_SUPPORT=y
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_YAFFS_9BYTE_TAGS=y
|
||||
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
|
||||
CONFIG_YAFFS_AUTO_YAFFS2=y
|
||||
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
|
||||
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
|
||||
CONFIG_YAFFS_FS=y
|
||||
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
|
||||
CONFIG_YAFFS_YAFFS1=y
|
||||
CONFIG_YAFFS_YAFFS2=y
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
Loading…
Reference in New Issue