mirror of https://github.com/hak5/openwrt.git
rb532: rename patches directory to patches-4.1
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>lede-17.01
parent
74aecc2d45
commit
d106c7d56b
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@ -1,20 +1,20 @@
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--- a/arch/mips/rb532/prom.c
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+++ b/arch/mips/rb532/prom.c
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@@ -67,6 +67,7 @@ static inline unsigned long tag2ul(char
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return simple_strtoul(num, 0, 10);
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return simple_strtoul(num, 0, 10);
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}
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+extern char __image_cmdline[];
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void __init prom_setup_cmdline(void)
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{
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static char cmd_line[COMMAND_LINE_SIZE] __initdata;
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static char cmd_line[COMMAND_LINE_SIZE] __initdata;
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@@ -108,6 +109,9 @@ void __init prom_setup_cmdline(void)
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}
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*(cp++) = ' ';
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}
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*(cp++) = ' ';
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+ strcpy(cp,(__image_cmdline));
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+ cp += strlen(__image_cmdline);
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+
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i = strlen(arcs_cmdline);
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if (i > 0) {
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*(cp++) = ' ';
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i = strlen(arcs_cmdline);
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if (i > 0) {
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*(cp++) = ' ';
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@ -19,7 +19,7 @@
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+
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static int rb532_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(GPIO_RDY);
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return gpio_get_value(GPIO_RDY);
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@@ -254,6 +267,16 @@ static struct platform_device *rb532_dev
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/* NAND definitions */
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#define NAND_CHIP_DELAY 25
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@ -36,12 +36,10 @@
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+
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static void __init rb532_nand_setup(void)
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{
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switch (mips_machtype) {
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switch (mips_machtype) {
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@@ -272,6 +295,7 @@ static void __init rb532_nand_setup(void
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rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
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rb532_nand_data.chip.partitions = rb532_partition_info;
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rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
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rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
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rb532_nand_data.chip.partitions = rb532_partition_info;
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rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
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+ rb532_nand_data.chip.chip_fixup = &rb532_nand_fixup;
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}
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@ -1,11 +1,11 @@
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--- a/arch/mips/rb532/devices.c
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+++ b/arch/mips/rb532/devices.c
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@@ -202,7 +202,7 @@ static struct mtd_partition rb532_partit
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.offset = 0,
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.size = 4 * 1024 * 1024,
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}, {
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.offset = 0,
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.size = 4 * 1024 * 1024,
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}, {
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- .name = "rootfs",
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+ .name = "rootfs_onboard",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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}
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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}
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