mirror of https://github.com/hak5/openwrt.git
multiple SPI driver fixes
- fix platform device registration - fix chipselect, command register defines, add missing clock - make slave select proper - fix multibytes transferts Signed-off-by: Tanguy Bouzéloc <tanguy.bouzeloc@efixo.com> SVN-Revision: 24849lede-17.01
Florian Fainelli
parent
544c8161f2
commit
c6d9ec5173
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@ -318,7 +318,7 @@
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#endif /* BCM63XX_REGS_H_ */
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--- /dev/null
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+++ b/drivers/spi/bcm63xx_spi.c
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@@ -0,0 +1,501 @@
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@@ -0,0 +1,494 @@
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+/*
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+ * Broadcom BCM63xx SPI controller support
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+ *
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@ -370,31 +370,36 @@
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+ /* Data buffers */
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+ const unsigned char *tx_ptr;
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+ unsigned char *rx_ptr;
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+
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+ /* data iomem */
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+ u8 __iomem *tx_io;
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+ const u8 __iomem *rx_io;
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+
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+ int remaining_bytes;
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+
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+ struct clk *clk;
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+ struct platform_device *pdev;
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+};
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+
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+static inline u8 bcm_spi_readb(struct bcm63xx_hsspi *bs,
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+static inline u8 bcm_spi_readb(struct bcm63xx_spi *bs,
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+ unsigned int offset)
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+{
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+ return bcm_readw(bs->regs + bcm63xx_spireg(offset));
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+}
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+
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+static inline u16 bcm_spi_readw(struct bcm63xx_hsspi *bs,
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+static inline u16 bcm_spi_readw(struct bcm63xx_spi *bs,
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+ unsigned int offset)
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+{
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+ return bcm_readw(bs->regs + bcm63xx_spireg(offset));
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+}
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+
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+static inline void bcm_spi_writeb(struct bcm63xx_hsspi *bs,
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+static inline void bcm_spi_writeb(struct bcm63xx_spi *bs,
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+ u8 value, unsigned int offset)
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+{
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+ bcm_writeb(value, bs->regs + bcm63xx_spireg(offset));
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+}
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+
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+static inline void bcm_spi_writew(struct bcm63xx_hsspi *bs,
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+static inline void bcm_spi_writew(struct bcm63xx_spi *bs,
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+ u16 value, unsigned int offset)
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+{
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+ bcm_writew(value, bs->regs + bcm63xx_spireg(offset));
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@ -442,13 +447,13 @@
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+ case 32:
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+ clk_cfg = SPI_CLK_1_563MHZ;
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+ break;
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+ case 128:
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+ case 64:
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+ clk_cfg = SPI_CLK_0_781MHZ;
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+ break;
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+ case 64:
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+ case 128:
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+ default:
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+ /* Set to slowest mode for compatibility */
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+ clk_cfg = SPI_CLK_0_781MHZ;
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+ clk_cfg = SPI_CLK_0_391MHZ;
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+ break;
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+ }
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+
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@ -497,20 +502,13 @@
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+/* Fill the TX FIFO with as many bytes as possible */
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+static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
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+{
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+ u8 tail;
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+ u8 size;
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+
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+ /* Fill the Tx FIFO with as many bytes as possible */
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+ tail = bcm_spi_readb(bs, SPI_MSG_TAIL);
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+
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+ while ((tail < bs->fifo_size) && (bs->remaining_bytes > 0)) {
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+ if (bs->tx_ptr)
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+ bcm_spi_writeb(bs, *bs->tx_ptr++, SPI_MSG_DATA);
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+ else
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+ bcm_spi_writeb(bs, 0, SPI_MSG_DATA);
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+
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+ bs->remaining_bytes--;
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+ tail = bcm_spi_readb(bs, SPI_MSG_TAIL);
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+ }
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+ size = bs->remaining_bytes < bs->fifo_size ? bs->remaining_bytes :
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+ bs->fifo_size;
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+ memcpy_toio(bs->tx_io, bs->tx_ptr, size);
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+ bs->remaining_bytes -= size;
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+}
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+
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+static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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@ -551,6 +549,7 @@
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+ /* Issue the transfer */
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+ cmd = SPI_CMD_START_IMMEDIATE;
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+ cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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+ cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
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+ bcm_spi_writew(bs, cmd, SPI_CMD);
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+ wait_for_completion(&bs->done);
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+
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@ -603,16 +602,8 @@
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+ rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
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+
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+ /* Read out all the data */
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+ if (rx_tail) {
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+ u8 data;
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+ u8 i = 0;
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+
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+ for(i = 0; i < rx_tail; i++) {
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+ data = bcm_spi_readb(bs, SPI_RX_DATA);
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+ if (bs->rx_ptr)
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+ *bs->rx_ptr++ = data;
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+ }
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+ }
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+ if (rx_tail)
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+ memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail);
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+
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+ /* See if there is more data to send */
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+ if (bs->remaining_bytes > 0) {
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@ -708,6 +699,8 @@
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+ master->transfer = bcm63xx_transfer;
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+ bs->speed_hz = pdata->speed_hz;
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+ bs->stopping = 0;
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+ bs->tx_io = (u8*)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
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+ bs->rx_io = (const u8*)(bs->regs + bcm63xx_spireg(SPI_RX_DATA));
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+ spin_lock_init(&bs->lock);
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+
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+ /* Initialize hardware */
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@ -796,7 +789,7 @@
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = bcm63xx_spi_probe,
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+ .remove = bcm63xx_spi_remove,
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+ .remove = __exit_p(bcm63xx_spi_remove),
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+ .suspend = bcm63xx_spi_suspend,
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+ .resume = bcm63xx_spi_resume,
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+};
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