mirror of https://github.com/hak5/openwrt.git
generic: ar8216: add AR8337N switch support
This patch is needed to use the switch inside the Sitecom WLR-8100; it was unusable and detected as Generic-Phy before. since ar8337 is behaving like ar8327 generally do the same thing see: https://forum.openwrt.org/viewtopic.php?pid=214218#p214218 forward-ported to trunk Signed-off-by: Dirk Neukirchen <dirkneukirchen@web.de> Patchwork: http://patchwork.openwrt.org/patch/4469/ [juhosg: merge chip_is_ar83[23]7 statements in ar8xxx_phy_config_init] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 38952lede-17.01
parent
74a353f64f
commit
c378d5e953
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@ -54,6 +54,7 @@ enum {
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AR8XXX_VER_AR8236 = 0x03,
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AR8XXX_VER_AR8236 = 0x03,
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AR8XXX_VER_AR8316 = 0x10,
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AR8XXX_VER_AR8316 = 0x10,
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AR8XXX_VER_AR8327 = 0x12,
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AR8XXX_VER_AR8327 = 0x12,
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AR8XXX_VER_AR8337 = 0x13,
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};
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};
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struct ar8xxx_mib_desc {
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struct ar8xxx_mib_desc {
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@ -260,6 +261,11 @@ static inline bool chip_is_ar8327(struct ar8xxx_priv *priv)
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return priv->chip_ver == AR8XXX_VER_AR8327;
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return priv->chip_ver == AR8XXX_VER_AR8327;
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}
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}
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static inline bool chip_is_ar8337(struct ar8xxx_priv *priv)
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{
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return priv->chip_ver == AR8XXX_VER_AR8337;
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}
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static inline void
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static inline void
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split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
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split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
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{
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{
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@ -397,7 +403,7 @@ ar8xxx_mib_op(struct ar8xxx_priv *priv, u32 op)
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lockdep_assert_held(&priv->mib_lock);
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lockdep_assert_held(&priv->mib_lock);
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if (chip_is_ar8327(priv))
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if (chip_is_ar8327(priv) || chip_is_ar8337(priv))
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mib_func = AR8327_REG_MIB_FUNC;
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mib_func = AR8327_REG_MIB_FUNC;
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else
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else
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mib_func = AR8216_REG_MIB_FUNC;
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mib_func = AR8216_REG_MIB_FUNC;
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@ -441,7 +447,7 @@ ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush)
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lockdep_assert_held(&priv->mib_lock);
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lockdep_assert_held(&priv->mib_lock);
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if (chip_is_ar8327(priv))
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if (chip_is_ar8327(priv) || chip_is_ar8337(priv))
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base = AR8327_REG_PORT_STATS_BASE(port);
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base = AR8327_REG_PORT_STATS_BASE(port);
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else if (chip_is_ar8236(priv) ||
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else if (chip_is_ar8236(priv) ||
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chip_is_ar8316(priv))
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chip_is_ar8316(priv))
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@ -1079,6 +1085,9 @@ ar8327_hw_config_pdata(struct ar8xxx_priv *priv,
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data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg);
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data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg);
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t = ar8327_get_pad_cfg(pdata->pad0_cfg);
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t = ar8327_get_pad_cfg(pdata->pad0_cfg);
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if (chip_is_ar8337(priv))
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t |= AR8337_PAD_MAC06_EXCHANGE_EN;
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priv->write(priv, AR8327_REG_PAD0_MODE, t);
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priv->write(priv, AR8327_REG_PAD0_MODE, t);
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t = ar8327_get_pad_cfg(pdata->pad5_cfg);
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t = ar8327_get_pad_cfg(pdata->pad5_cfg);
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priv->write(priv, AR8327_REG_PAD5_MODE, t);
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priv->write(priv, AR8327_REG_PAD5_MODE, t);
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@ -1582,7 +1591,7 @@ ar8216_set_mirror_regs(struct ar8xxx_priv *priv)
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static void
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static void
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ar8xxx_set_mirror_regs(struct ar8xxx_priv *priv)
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ar8xxx_set_mirror_regs(struct ar8xxx_priv *priv)
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{
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{
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if (chip_is_ar8327(priv)) {
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if (chip_is_ar8327(priv) || chip_is_ar8337(priv)) {
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ar8327_set_mirror_regs(priv);
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ar8327_set_mirror_regs(priv);
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} else {
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} else {
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ar8216_set_mirror_regs(priv);
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ar8216_set_mirror_regs(priv);
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@ -2104,6 +2113,10 @@ ar8xxx_id_chip(struct ar8xxx_priv *priv)
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priv->mii_lo_first = true;
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priv->mii_lo_first = true;
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priv->chip = &ar8327_chip;
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priv->chip = &ar8327_chip;
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break;
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break;
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case AR8XXX_VER_AR8337:
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priv->mii_lo_first = true;
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priv->chip = &ar8327_chip;
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break;
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default:
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default:
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pr_err("ar8216: Unknown Atheros device [ver=%d, rev=%d]\n",
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pr_err("ar8216: Unknown Atheros device [ver=%d, rev=%d]\n",
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priv->chip_ver, priv->chip_rev);
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priv->chip_ver, priv->chip_rev);
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@ -2244,6 +2257,11 @@ ar8xxx_probe_switch(struct ar8xxx_priv *priv)
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swdev->vlans = AR8X16_MAX_VLANS;
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swdev->vlans = AR8X16_MAX_VLANS;
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swdev->ports = AR8327_NUM_PORTS;
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swdev->ports = AR8327_NUM_PORTS;
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swdev->ops = &ar8327_sw_ops;
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swdev->ops = &ar8327_sw_ops;
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} else if (chip_is_ar8337(priv)) {
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swdev->name = "Atheros AR8337";
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swdev->vlans = AR8X16_MAX_VLANS;
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swdev->ports = AR8327_NUM_PORTS;
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swdev->ops = &ar8327_sw_ops;
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} else {
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} else {
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swdev->name = "Atheros AR8216";
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swdev->name = "Atheros AR8216";
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swdev->vlans = AR8216_NUM_VLANS;
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swdev->vlans = AR8216_NUM_VLANS;
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@ -2289,7 +2307,7 @@ ar8xxx_phy_config_init(struct phy_device *phydev)
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if (WARN_ON(!priv))
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if (WARN_ON(!priv))
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return -ENODEV;
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return -ENODEV;
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if (chip_is_ar8327(priv))
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if (chip_is_ar8327(priv) || chip_is_ar8337(priv))
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return 0;
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return 0;
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priv->phy = phydev;
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priv->phy = phydev;
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@ -2375,7 +2393,8 @@ ar8xxx_phy_config_aneg(struct phy_device *phydev)
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static const u32 ar8xxx_phy_ids[] = {
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static const u32 ar8xxx_phy_ids[] = {
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0x004dd033,
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0x004dd033,
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0x004dd034,
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0x004dd034, /* AR8327 */
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0x004dd036, /* AR8337 */
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0x004dd041,
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0x004dd041,
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0x004dd042,
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0x004dd042,
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};
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};
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@ -2463,7 +2482,7 @@ found:
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phydev->advertising = ADVERTISED_100baseT_Full;
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phydev->advertising = ADVERTISED_100baseT_Full;
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}
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}
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if (chip_is_ar8327(priv)) {
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if (chip_is_ar8327(priv) || chip_is_ar8337(priv)) {
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priv->phy = phydev;
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priv->phy = phydev;
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ret = ar8xxx_start(priv);
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ret = ar8xxx_start(priv);
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@ -452,6 +452,8 @@
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#define AR8327_REG_PORT_STATS_BASE(_i) (0x1000 + (_i) * 0x100)
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#define AR8327_REG_PORT_STATS_BASE(_i) (0x1000 + (_i) * 0x100)
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#define AR8337_PAD_MAC06_EXCHANGE_EN BIT(31)
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/* port speed */
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/* port speed */
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enum {
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enum {
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AR8216_PORT_SPEED_10M = 0,
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AR8216_PORT_SPEED_10M = 0,
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