ar71xx: ethernet: reduce tx dma ring size further to improve cache footprint

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 37765
lede-17.01
Felix Fietkau 2013-08-13 10:35:10 +00:00
parent ead5aa354c
commit bbd4d4c8b8
1 changed files with 2 additions and 2 deletions

View File

@ -55,10 +55,10 @@
(ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
#define AG71XX_RX_BUF_SIZE (AG71XX_RX_PKT_SIZE + NET_SKB_PAD + NET_IP_ALIGN)
#define AG71XX_TX_RING_SIZE_DEFAULT 64
#define AG71XX_TX_RING_SIZE_DEFAULT 32
#define AG71XX_RX_RING_SIZE_DEFAULT 128
#define AG71XX_TX_RING_SIZE_MAX 128
#define AG71XX_TX_RING_SIZE_MAX 32
#define AG71XX_RX_RING_SIZE_MAX 128
#ifdef CONFIG_AG71XX_DEBUG