mirror of https://github.com/hak5/openwrt.git
bcm53xx: add xHCI support
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 46080lede-17.01
parent
51042bc517
commit
b3afbe4918
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@ -1557,7 +1557,9 @@ XHCI_AUTOLOAD := $(patsubst $(LINUX_DIR)/drivers/usb/host/%.ko,%,$(XHCI_FILES))
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define KernelPackage/usb3
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TITLE:=Support for USB3 controllers
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DEPENDS:=+TARGET_omap:kmod-usb-phy-omap-usb3
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DEPENDS:= \
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+TARGET_bcm53xx:kmod-usb-bcma \
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+TARGET_omap:kmod-usb-phy-omap-usb3
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KCONFIG:= \
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CONFIG_USB_XHCI_HCD \
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CONFIG_USB_XHCI_PCI \
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@ -0,0 +1,78 @@
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From 5b4fed9fc917cc2bfc5297eeab03aeba5d340618 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Tue, 16 Jun 2015 12:33:46 +0200
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Subject: [PATCH] USB: bcma: make helper creating platform dev more generic
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Having "bool ohci" argument bounded us to two cases only and didn't
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allow re-using this code for XHCI.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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drivers/usb/host/bcma-hcd.c | 24 +++++++++++++-----------
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1 file changed, 13 insertions(+), 11 deletions(-)
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diff --git a/drivers/usb/host/bcma-hcd.c b/drivers/usb/host/bcma-hcd.c
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index 5398e3d..d347282 100644
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--- a/drivers/usb/host/bcma-hcd.c
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -249,7 +249,10 @@ static const struct usb_ehci_pdata ehci_pdata = {
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static const struct usb_ohci_pdata ohci_pdata = {
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};
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-static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, bool ohci, u32 addr)
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+static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
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+ const char *name, u32 addr,
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+ const void *data,
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+ size_t size)
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{
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struct platform_device *hci_dev;
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struct resource hci_res[2];
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@@ -264,8 +267,7 @@ static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, boo
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hci_res[1].start = dev->irq;
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hci_res[1].flags = IORESOURCE_IRQ;
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- hci_dev = platform_device_alloc(ohci ? "ohci-platform" :
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- "ehci-platform" , 0);
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+ hci_dev = platform_device_alloc(name, 0);
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if (!hci_dev)
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return ERR_PTR(-ENOMEM);
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@@ -276,12 +278,8 @@ static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, boo
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ARRAY_SIZE(hci_res));
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if (ret)
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goto err_alloc;
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- if (ohci)
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- ret = platform_device_add_data(hci_dev, &ohci_pdata,
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- sizeof(ohci_pdata));
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- else
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- ret = platform_device_add_data(hci_dev, &ehci_pdata,
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- sizeof(ehci_pdata));
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+ if (data)
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+ ret = platform_device_add_data(hci_dev, data, size);
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if (ret)
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goto err_alloc;
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ret = platform_device_add(hci_dev);
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@@ -334,11 +332,15 @@ static int bcma_hcd_probe(struct bcma_device *dev)
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&& chipinfo->rev == 0)
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ohci_addr = 0x18009000;
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- usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, true, ohci_addr);
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+ usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
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+ ohci_addr, &ohci_pdata,
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+ sizeof(ohci_pdata));
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if (IS_ERR(usb_dev->ohci_dev))
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return PTR_ERR(usb_dev->ohci_dev);
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- usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, false, dev->addr);
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+ usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
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+ dev->addr, &ehci_pdata,
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+ sizeof(ehci_pdata));
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if (IS_ERR(usb_dev->ehci_dev)) {
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err = PTR_ERR(usb_dev->ehci_dev);
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goto err_unregister_ohci_dev;
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--
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1.8.4.5
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@ -0,0 +1,107 @@
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From 4aed231f49954114d5ae23e97789e9aa540a0b70 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Tue, 16 Jun 2015 12:52:07 +0200
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Subject: [PATCH] USB: bcma: use separated function for USB 2.0 initialization
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This will allow adding USB 3.0 (XHCI) support cleanly.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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drivers/usb/host/bcma-hcd.c | 51 +++++++++++++++++++++++++++++++--------------
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1 file changed, 35 insertions(+), 16 deletions(-)
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diff --git a/drivers/usb/host/bcma-hcd.c b/drivers/usb/host/bcma-hcd.c
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index d347282..0b4d0e8 100644
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--- a/drivers/usb/host/bcma-hcd.c
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -34,6 +34,7 @@ MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
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MODULE_LICENSE("GPL");
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struct bcma_hcd_device {
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+ struct bcma_device *core;
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struct platform_device *ehci_dev;
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struct platform_device *ohci_dev;
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};
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@@ -293,27 +294,16 @@ err_alloc:
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return ERR_PTR(ret);
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}
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-static int bcma_hcd_probe(struct bcma_device *dev)
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+static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
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{
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- int err;
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+ struct bcma_device *dev = usb_dev->core;
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+ struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
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u32 ohci_addr;
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- struct bcma_hcd_device *usb_dev;
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- struct bcma_chipinfo *chipinfo;
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-
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- chipinfo = &dev->bus->chipinfo;
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-
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- /* TODO: Probably need checks here; is the core connected? */
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+ int err;
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if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
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return -EOPNOTSUPP;
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- usb_dev = devm_kzalloc(&dev->dev, sizeof(struct bcma_hcd_device),
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- GFP_KERNEL);
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- if (!usb_dev)
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- return -ENOMEM;
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-
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- bcma_hci_platform_power_gpio(dev, true);
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-
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switch (dev->id.id) {
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case BCMA_CORE_NS_USB20:
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bcma_hcd_init_chip_arm(dev);
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@@ -346,7 +336,6 @@ static int bcma_hcd_probe(struct bcma_device *dev)
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goto err_unregister_ohci_dev;
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}
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- bcma_set_drvdata(dev, usb_dev);
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return 0;
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err_unregister_ohci_dev:
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@@ -354,6 +343,36 @@ err_unregister_ohci_dev:
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return err;
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}
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+static int bcma_hcd_probe(struct bcma_device *dev)
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+{
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+ int err;
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+ struct bcma_hcd_device *usb_dev;
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+
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+ /* TODO: Probably need checks here; is the core connected? */
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+
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+ usb_dev = devm_kzalloc(&dev->dev, sizeof(struct bcma_hcd_device),
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+ GFP_KERNEL);
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+ if (!usb_dev)
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+ return -ENOMEM;
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+ usb_dev->core = dev;
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+
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+ bcma_hci_platform_power_gpio(dev, true);
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+
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+ switch (dev->id.id) {
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+ case BCMA_CORE_USB20_HOST:
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+ case BCMA_CORE_NS_USB20:
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+ err = bcma_hcd_usb20_init(usb_dev);
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+ if (err)
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+ return err;
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+ break;
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+ default:
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+ return -ENODEV;
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+ }
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+
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+ bcma_set_drvdata(dev, usb_dev);
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+ return 0;
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+}
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+
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static void bcma_hcd_remove(struct bcma_device *dev)
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{
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struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
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--
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1.8.4.5
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@ -0,0 +1,266 @@
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From 78008c94c253963454a9f6d3d2e0324acef3f20a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Tue, 16 Jun 2015 17:14:26 +0200
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Subject: [PATCH] USB: bcma: add USB 3.0 support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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drivers/usb/host/bcma-hcd.c | 218 ++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 218 insertions(+)
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diff --git a/drivers/usb/host/bcma-hcd.c b/drivers/usb/host/bcma-hcd.c
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index 0b4d0e8..71fa06d 100644
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--- a/drivers/usb/host/bcma-hcd.c
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+++ b/drivers/usb/host/bcma-hcd.c
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@@ -37,6 +37,7 @@ struct bcma_hcd_device {
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struct bcma_device *core;
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struct platform_device *ehci_dev;
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struct platform_device *ohci_dev;
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+ struct platform_device *xhci_dev;
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};
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/* Wait for bitmask in a register to get set or cleared.
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@@ -343,6 +344,217 @@ err_unregister_ohci_dev:
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return err;
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}
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+static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
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+ u32 value, int timeout)
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+{
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+ unsigned long deadline = jiffies + timeout;
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+ u32 val;
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+
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+ do {
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+ val = readl(addr);
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+ if ((val & mask) == value)
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+ return true;
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+ cpu_relax();
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+ udelay(10);
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+ } while (!time_after_eq(jiffies, deadline));
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+
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+ pr_err("Timeout waiting for register %p\n", addr);
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+
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+ return false;
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+}
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+
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+static void bcma_hcd_usb30_phy_init(struct bcma_hcd_device *bcma_hcd)
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+{
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+ struct bcma_device *core = bcma_hcd->core;
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+ struct bcma_bus *bus = core->bus;
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+ struct bcma_chipinfo *chipinfo = &bus->chipinfo;
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+ struct bcma_drv_cc_b *ccb = &bus->drv_cc_b;
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+ struct bcma_device *arm_core;
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+ void __iomem *dmu = NULL;
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+ u32 cru_straps_ctrl;
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+
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+ if (chipinfo->id != BCMA_CHIP_ID_BCM4707 &&
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+ chipinfo->id != BCMA_CHIP_ID_BCM53018)
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+ return;
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+
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+ arm_core = bcma_find_core(bus, BCMA_CORE_ARMCA9);
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+ if (!arm_core)
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+ return;
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+
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+ dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
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+ if (!dmu)
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+ goto out;
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+
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+ /* Check strapping of PCIE/USB3 SEL */
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+ cru_straps_ctrl = ioread32(dmu + 0x2a0);
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+ if ((cru_straps_ctrl & 0x10) == 0)
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+ goto out;
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+
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+ /* Perform USB3 system soft reset */
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+ bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
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+
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+ /* Enable MDIO. Setting MDCDIV as 26 */
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+ iowrite32(0x0000009a, ccb->mii + 0x000);
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+ udelay(2);
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+
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+ switch (chipinfo->id) {
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+ case BCMA_CHIP_ID_BCM4707:
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+ if (chipinfo->rev == 4) {
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+ /* For NS-B0, USB3 PLL Block */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x587e8000, ccb->mii + 0x004);
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+
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+ /* Clear ana_pllSeqStart */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x58061000, ccb->mii + 0x004);
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+
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+ /* CMOS Divider ratio to 25 */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582a6400, ccb->mii + 0x004);
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+
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+ /* Asserting PLL Reset */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582ec000, ccb->mii + 0x004);
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+
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+ /* Deaaserting PLL Reset */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582e8000, ccb->mii + 0x004);
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+
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+ /* Deasserting USB3 system reset */
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+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
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+
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+ /* Set ana_pllSeqStart */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x58069000, ccb->mii + 0x004);
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+
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+ /* RXPMD block */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x587e8020, ccb->mii + 0x004);
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+
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+ /* CDR int loop locking BW to 1 */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x58120049, ccb->mii + 0x004);
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+
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+ /* CDR int loop acquisition BW to 1 */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x580e0049, ccb->mii + 0x004);
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+
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+ /* CDR prop loop BW to 1 */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x580a005c, ccb->mii + 0x004);
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+
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+ /* Waiting MII Mgt interface idle */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ } else {
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+ /* PLL30 block */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x587e8000, ccb->mii + 0x004);
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+
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582a6400, ccb->mii + 0x004);
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+
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x587e80e0, ccb->mii + 0x004);
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+
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x580a009c, ccb->mii + 0x004);
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+
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+ /* Enable SSC */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x587e8040, ccb->mii + 0x004);
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+
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x580a21d3, ccb->mii + 0x004);
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+
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x58061003, ccb->mii + 0x004);
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+
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+ /* Waiting MII Mgt interface idle */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+
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+ /* Deasserting USB3 system reset */
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+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
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+ }
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+ break;
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+ case BCMA_CHIP_ID_BCM53018:
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+ /* USB3 PLL Block */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x587e8000, ccb->mii + 0x004);
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+
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+ /* Assert Ana_Pllseq start */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x58061000, ccb->mii + 0x004);
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+
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+ /* Assert CML Divider ratio to 26 */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582a6400, ccb->mii + 0x004);
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+
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+ /* Asserting PLL Reset */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582ec000, ccb->mii + 0x004);
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+
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+ /* Deaaserting PLL Reset */
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+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
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+ iowrite32(0x582e8000, ccb->mii + 0x004);
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+
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+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+
|
||||
+ /* Deasserting USB3 system reset */
|
||||
+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
|
||||
+
|
||||
+ /* PLL frequency monitor enable */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58069000, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* PIPE Block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8060, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* CMPMAX & CMPMINTH setting */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580af30d, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* DEGLITCH MIN & MAX setting */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x580e6302, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* TXPMD block */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x587e8040, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Enabling SSC */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+ iowrite32(0x58061003, ccb->mii + 0x004);
|
||||
+
|
||||
+ /* Waiting MII Mgt interface idle */
|
||||
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
|
||||
+
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ pr_info("[%s:%d] DONE\n", __FUNCTION__, __LINE__);
|
||||
+out:
|
||||
+ if (dmu)
|
||||
+ iounmap(dmu);
|
||||
+}
|
||||
+
|
||||
+static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
|
||||
+{
|
||||
+ struct bcma_device *core = bcma_hcd->core;
|
||||
+
|
||||
+ bcma_core_enable(core, 0);
|
||||
+
|
||||
+ bcma_hcd_usb30_phy_init(bcma_hcd);
|
||||
+
|
||||
+ bcma_hcd->xhci_dev = bcma_hcd_create_pdev(core, "xhci-hcd", core->addr,
|
||||
+ NULL, 0);
|
||||
+ if (IS_ERR(bcma_hcd->ohci_dev))
|
||||
+ return PTR_ERR(bcma_hcd->ohci_dev);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int bcma_hcd_probe(struct bcma_device *dev)
|
||||
{
|
||||
int err;
|
||||
@@ -365,6 +577,11 @@ static int bcma_hcd_probe(struct bcma_device *dev)
|
||||
if (err)
|
||||
return err;
|
||||
break;
|
||||
+ case BCMA_CORE_NS_USB30:
|
||||
+ err = bcma_hcd_usb30_init(usb_dev);
|
||||
+ if (err)
|
||||
+ return err;
|
||||
+ break;
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
@@ -419,6 +636,7 @@ static int bcma_hcd_resume(struct bcma_device *dev)
|
||||
static const struct bcma_device_id bcma_hcd_table[] = {
|
||||
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
|
||||
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
|
||||
+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
|
||||
BCMA_CORETABLE_END
|
||||
};
|
||||
MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
|
||||
--
|
||||
1.8.4.5
|
||||
|
|
@ -0,0 +1,99 @@
|
|||
From 9cc14ca0aae53c16d10ffea49848ac61a5015562 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
|
||||
Date: Sun, 21 Jun 2015 11:10:49 +0200
|
||||
Subject: [PATCH] xhci: add Broadcom specific fake doorbell
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
This fixes problem with controller seeing devices only in some small
|
||||
percentage of cold boots.
|
||||
|
||||
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
|
||||
---
|
||||
drivers/usb/host/xhci.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 62 insertions(+)
|
||||
|
||||
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
|
||||
index 3bceabe..0737ab2 100644
|
||||
--- a/drivers/usb/host/xhci.c
|
||||
+++ b/drivers/usb/host/xhci.c
|
||||
@@ -122,6 +122,64 @@ int xhci_halt(struct xhci_hcd *xhci)
|
||||
return ret;
|
||||
}
|
||||
|
||||
+#ifdef CONFIG_ARCH_BCM_5301X
|
||||
+int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id)
|
||||
+{
|
||||
+ unsigned int temp1, ret;
|
||||
+
|
||||
+ /* alloc a virt device for slot */
|
||||
+ if (!xhci_alloc_virt_device(xhci, slot_id, 0, GFP_NOIO)) {
|
||||
+ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
|
||||
+ return 1;
|
||||
+ }
|
||||
+
|
||||
+ /* ring fake doorbell for slot_id ep 0 */
|
||||
+ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0);
|
||||
+ mdelay(1);
|
||||
+
|
||||
+ /* read the status register to check if HSE is set or not? */
|
||||
+ temp1 = readl(&xhci->op_regs->status);
|
||||
+ xhci_dbg(xhci, "op reg status = %x\n",temp1);
|
||||
+
|
||||
+ /* clear HSE if set */
|
||||
+ if(temp1 & STS_FATAL) {
|
||||
+ xhci_dbg(xhci, "HSE problem detected\n");
|
||||
+ temp1 &= ~(0x1fff);
|
||||
+ temp1 |= STS_FATAL;
|
||||
+ xhci_dbg(xhci, "temp1=%x\n",temp1);
|
||||
+ writel(temp1, &xhci->op_regs->status);
|
||||
+ mdelay(1);
|
||||
+ temp1 = readl(&xhci->op_regs->status);
|
||||
+ xhci_dbg(xhci, "After clear op reg status=%x\n", temp1);
|
||||
+ }
|
||||
+
|
||||
+ /* Free virt device */
|
||||
+ xhci_free_virt_device(xhci, slot_id);
|
||||
+
|
||||
+ /* Run the controller if needed */
|
||||
+ temp1 = readl(&xhci->op_regs->command);
|
||||
+ if (temp1 & CMD_RUN)
|
||||
+ return 0;
|
||||
+ temp1 |= (CMD_RUN);
|
||||
+
|
||||
+ writel(temp1, &xhci->op_regs->command);
|
||||
+ /*
|
||||
+ * Wait for the HCHalted Status bit to be 0 to indicate the host is running.
|
||||
+ */
|
||||
+ ret = xhci_handshake(xhci, &xhci->op_regs->status,
|
||||
+ STS_HALT, 0, XHCI_MAX_HALT_USEC);
|
||||
+
|
||||
+ if (ret == -ETIMEDOUT) {
|
||||
+ xhci_err(xhci, "Host took too long to start, "
|
||||
+ "waited %u microseconds.\n",
|
||||
+ XHCI_MAX_HALT_USEC);
|
||||
+ return 1;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+#endif /* CONFIG_ARCH_BCM_5301X */
|
||||
+
|
||||
/*
|
||||
* Set the run bit and wait for the host to be running.
|
||||
*/
|
||||
@@ -146,6 +204,10 @@ static int xhci_start(struct xhci_hcd *xhci)
|
||||
xhci_err(xhci, "Host took too long to start, "
|
||||
"waited %u microseconds.\n",
|
||||
XHCI_MAX_HALT_USEC);
|
||||
+#ifdef CONFIG_ARCH_BCM_5301X
|
||||
+ xhci_fake_doorbell(xhci, 1);
|
||||
+#endif /* CONFIG_ARCH_BCM_5301X */
|
||||
+
|
||||
if (!ret)
|
||||
xhci->xhc_state &= ~XHCI_STATE_HALTED;
|
||||
return ret;
|
||||
--
|
||||
1.8.4.5
|
||||
|
Loading…
Reference in New Issue