ar71xx: fix MAC address setup for TL-WDR4900 v2

The MAC address setup of the TL-WDR4900 v2 is different from the
C5/C7. This aligns ar71xx with the setup in ath79:

wlan0 (5GHz) : -2
wlan1 (2.4GHz) : -1
eth1 (LAN) : 0
eth0 (WAN) : 1

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit a9d3084b83)
openwrt-18.06
Adrian Schmutzler 2019-11-14 12:26:05 +01:00
parent 22fe68643f
commit b0d99e32db
1 changed files with 6 additions and 3 deletions

View File

@ -207,19 +207,22 @@ static void __init common_setup(bool pcie_slot)
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
u8 tmpmac2[ETH_ALEN];
ath79_register_m25p80(&archer_c7_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
archer_c7_leds_gpio);
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, mac);
if (pcie_slot) {
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, mac);
ath79_register_pci();
} else {
ath79_init_mac(tmpmac, mac, -1);
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac);
ath79_init_mac(tmpmac2, mac, -2);
ap9x_pci_setup_wmac_led_pin(0, 0);
ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac);
ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac2);
}
mdiobus_register_board_info(archer_c7_mdio0_info,