kernel: bump kernel 4.4 to 4.4.126 for 17.01

* Refreshed patches

Compile-tested: ar71xx, ramips/mt7621, x86/64
Run-tested: ar71xx

Signed-off-by: Stijn Segers <foss@volatilesystems.org>
lede-17.01
Stijn Segers 2018-04-03 20:25:20 +02:00 committed by Hauke Mehrtens
parent 09d95e44fc
commit a9b6077402
33 changed files with 98 additions and 132 deletions

View File

@ -3,10 +3,10 @@
LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .43
LINUX_VERSION-4.4 = .124
LINUX_VERSION-4.4 = .126
LINUX_KERNEL_HASH-3.18.43 = 1236e8123a6ce537d5029232560966feed054ae31776fe8481dd7d18cdd5492c
LINUX_KERNEL_HASH-4.4.124 = 59341c0af64bf0e2ba6f5305bff564286c228755827b8bebd002a9db2abc2129
LINUX_KERNEL_HASH-4.4.126 = e9c8f4c4cda89124e7c53bda979db3f9c12f7c177bee90ddd3ab38d5ae99cd58
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))

View File

@ -47,7 +47,7 @@ Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
@@ -4915,6 +4916,9 @@ void ata_qc_complete(struct ata_queued_c
@@ -4936,6 +4937,9 @@ void ata_qc_complete(struct ata_queued_c
{
struct ata_port *ap = qc->ap;

View File

@ -16,7 +16,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1166,22 +1166,24 @@ static int bcm2835_clock_is_on(struct cl
@@ -1170,22 +1170,24 @@ static int bcm2835_clock_is_on(struct cl
static u32 bcm2835_clock_choose_div(struct clk_hw *hw,
unsigned long rate,
@ -49,7 +49,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
/* clamp to min divider of 1 */
div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS);
@@ -1221,7 +1223,7 @@ static long bcm2835_clock_round_rate(str
@@ -1225,7 +1227,7 @@ static long bcm2835_clock_round_rate(str
unsigned long *parent_rate)
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
@ -58,7 +58,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
return bcm2835_clock_rate_from_divisor(clock, *parent_rate, div);
}
@@ -1290,7 +1292,7 @@ static int bcm2835_clock_set_rate(struct
@@ -1294,7 +1296,7 @@ static int bcm2835_clock_set_rate(struct
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;

View File

@ -24,7 +24,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1218,16 +1218,6 @@ static long bcm2835_clock_rate_from_divi
@@ -1222,16 +1222,6 @@ static long bcm2835_clock_rate_from_divi
return temp;
}
@ -41,7 +41,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
static unsigned long bcm2835_clock_get_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -1299,13 +1289,75 @@ static int bcm2835_clock_set_rate(struct
@@ -1303,13 +1293,75 @@ static int bcm2835_clock_set_rate(struct
return 0;
}
@ -118,7 +118,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
};
static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
@@ -1321,7 +1373,9 @@ static const struct clk_ops bcm2835_vpu_
@@ -1325,7 +1377,9 @@ static const struct clk_ops bcm2835_vpu_
.is_prepared = bcm2835_vpu_clock_is_on,
.recalc_rate = bcm2835_clock_get_rate,
.set_rate = bcm2835_clock_set_rate,
@ -129,7 +129,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
};
static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
@@ -1415,45 +1469,23 @@ static struct clk *bcm2835_register_cloc
@@ -1419,45 +1473,23 @@ static struct clk *bcm2835_register_cloc
{
struct bcm2835_clock *clock;
struct clk_init_data init;

View File

@ -33,7 +33,7 @@ Signed-off-by: Michael Turquette <mturquette@baylibre.com>
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
@@ -1603,6 +1613,9 @@ static int bcm2835_clk_probe(struct plat
@@ -1607,6 +1617,9 @@ static int bcm2835_clk_probe(struct plat
cprman->regs + CM_PERIICTL, CM_GATE_BIT,
0, &cprman->regs_lock);

View File

@ -66,7 +66,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
};
struct bcm2835_pll {
@@ -1198,7 +1202,7 @@ static u32 bcm2835_clock_choose_div(stru
@@ -1202,7 +1206,7 @@ static u32 bcm2835_clock_choose_div(stru
GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1;
u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS;
u64 rem;
@ -75,7 +75,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
rem = do_div(temp, rate);
div = temp;
@@ -1208,11 +1212,23 @@ static u32 bcm2835_clock_choose_div(stru
@@ -1212,11 +1216,23 @@ static u32 bcm2835_clock_choose_div(stru
div += unused_frac_mask + 1;
div &= ~unused_frac_mask;
@ -104,7 +104,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
return div;
}
@@ -1306,9 +1322,26 @@ static int bcm2835_clock_set_rate(struct
@@ -1310,9 +1326,26 @@ static int bcm2835_clock_set_rate(struct
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false);

View File

@ -33,7 +33,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
const char *osc_name;
struct clk_onecell_data onecell;
@@ -1346,7 +1343,7 @@ static int bcm2835_clock_set_rate(struct
@@ -1350,7 +1347,7 @@ static int bcm2835_clock_set_rate(struct
}
static int bcm2835_clock_determine_rate(struct clk_hw *hw,
@ -42,7 +42,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct clk_hw *parent, *best_parent = NULL;
@@ -1404,7 +1401,6 @@ static u8 bcm2835_clock_get_parent(struc
@@ -1408,7 +1405,6 @@ static u8 bcm2835_clock_get_parent(struc
return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
}

View File

@ -58,7 +58,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
/*
* These are fixed clocks. They're probably not all root clocks and it may
* be possible to turn them on and off but until this is mapped out better
@@ -1044,6 +1066,36 @@ static int bcm2835_pll_set_rate(struct c
@@ -1048,6 +1070,36 @@ static int bcm2835_pll_set_rate(struct c
return 0;
}
@ -95,7 +95,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
static const struct clk_ops bcm2835_pll_clk_ops = {
.is_prepared = bcm2835_pll_is_on,
.prepare = bcm2835_pll_on,
@@ -1051,6 +1103,7 @@ static const struct clk_ops bcm2835_pll_
@@ -1055,6 +1107,7 @@ static const struct clk_ops bcm2835_pll_
.recalc_rate = bcm2835_pll_get_rate,
.set_rate = bcm2835_pll_set_rate,
.round_rate = bcm2835_pll_round_rate,
@ -103,7 +103,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
};
struct bcm2835_pll_divider {
@@ -1153,6 +1206,26 @@ static int bcm2835_pll_divider_set_rate(
@@ -1157,6 +1210,26 @@ static int bcm2835_pll_divider_set_rate(
return 0;
}
@ -130,7 +130,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
static const struct clk_ops bcm2835_pll_divider_clk_ops = {
.is_prepared = bcm2835_pll_divider_is_on,
.prepare = bcm2835_pll_divider_on,
@@ -1160,6 +1233,7 @@ static const struct clk_ops bcm2835_pll_
@@ -1164,6 +1237,7 @@ static const struct clk_ops bcm2835_pll_
.recalc_rate = bcm2835_pll_divider_get_rate,
.set_rate = bcm2835_pll_divider_set_rate,
.round_rate = bcm2835_pll_divider_round_rate,
@ -138,7 +138,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
};
/*
@@ -1401,6 +1475,31 @@ static u8 bcm2835_clock_get_parent(struc
@@ -1405,6 +1479,31 @@ static u8 bcm2835_clock_get_parent(struc
return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
}
@ -170,7 +170,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
static const struct clk_ops bcm2835_clock_clk_ops = {
.is_prepared = bcm2835_clock_is_on,
.prepare = bcm2835_clock_on,
@@ -1410,6 +1509,7 @@ static const struct clk_ops bcm2835_cloc
@@ -1414,6 +1513,7 @@ static const struct clk_ops bcm2835_cloc
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
@ -178,7 +178,7 @@ Acked-by: Eric Anholt <eric@anholt.net>
};
static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
@@ -1428,6 +1528,7 @@ static const struct clk_ops bcm2835_vpu_
@@ -1432,6 +1532,7 @@ static const struct clk_ops bcm2835_vpu_
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,

View File

@ -56,7 +56,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
@@ -1660,14 +1679,81 @@ static struct clk *bcm2835_register_cloc
@@ -1664,14 +1683,81 @@ static struct clk *bcm2835_register_cloc
return devm_clk_register(cprman->dev, &clock->hw);
}
@ -139,7 +139,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
if (!cprman)
return -ENOMEM;
@@ -1684,80 +1770,15 @@ static int bcm2835_clk_probe(struct plat
@@ -1688,80 +1774,15 @@ static int bcm2835_clk_probe(struct plat
platform_set_drvdata(pdev, cprman);

View File

@ -473,7 +473,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
@@ -1596,7 +1179,7 @@ bcm2835_register_pll_divider(struct bcm2
@@ -1600,7 +1183,7 @@ bcm2835_register_pll_divider(struct bcm2
memset(&init, 0, sizeof(init));
@ -482,7 +482,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
init.num_parents = 1;
init.name = divider_name;
init.ops = &bcm2835_pll_divider_clk_ops;
@@ -1695,50 +1278,401 @@ struct bcm2835_clk_desc {
@@ -1699,50 +1282,401 @@ struct bcm2835_clk_desc {
const void *data;
};

View File

@ -17,7 +17,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1640,6 +1640,13 @@ static const struct bcm2835_clk_desc clk
@@ -1644,6 +1644,13 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_HSMDIV,
.int_bits = 4,
.frac_bits = 8),

View File

@ -14,7 +14,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1389,6 +1389,22 @@ static const struct bcm2835_clk_desc clk
@@ -1393,6 +1393,22 @@ static const struct bcm2835_clk_desc clk
.load_mask = CM_PLLA_LOADPER,
.hold_mask = CM_PLLA_HOLDPER,
.fixed_divider = 1),
@ -37,7 +37,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
/* PLLB is used for the ARM's clock. */
[BCM2835_PLLB] = REGISTER_PLL(
@@ -1503,6 +1519,22 @@ static const struct bcm2835_clk_desc clk
@@ -1507,6 +1523,22 @@ static const struct bcm2835_clk_desc clk
.load_mask = CM_PLLD_LOADPER,
.hold_mask = CM_PLLD_HOLDPER,
.fixed_divider = 1),

View File

@ -26,7 +26,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
#define CM_EMMCCTL 0x1c0
#define CM_EMMCDIV 0x1c4
@@ -1612,6 +1614,12 @@ static const struct bcm2835_clk_desc clk
@@ -1616,6 +1618,12 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_TSENSDIV,
.int_bits = 5,
.frac_bits = 0),
@ -39,7 +39,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
/* clocks with vpu parent mux */
[BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
@@ -1626,6 +1634,7 @@ static const struct bcm2835_clk_desc clk
@@ -1630,6 +1638,7 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_ISPDIV,
.int_bits = 4,
.frac_bits = 8),
@ -47,7 +47,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
/*
* Secondary SDRAM clock. Used for low-voltage modes when the PLL
* in the SDRAM controller can't be used.
@@ -1657,6 +1666,36 @@ static const struct bcm2835_clk_desc clk
@@ -1661,6 +1670,36 @@ static const struct bcm2835_clk_desc clk
.is_vpu_clock = true),
/* clocks with per parent mux */
@ -84,7 +84,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
/* Arasan EMMC clock */
[BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
@@ -1665,6 +1704,29 @@ static const struct bcm2835_clk_desc clk
@@ -1669,6 +1708,29 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_EMMCDIV,
.int_bits = 4,
.frac_bits = 8),
@ -114,7 +114,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
/* HDMI state machine */
[BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
.name = "hsm",
@@ -1686,12 +1748,26 @@ static const struct bcm2835_clk_desc clk
@@ -1690,12 +1752,26 @@ static const struct bcm2835_clk_desc clk
.int_bits = 12,
.frac_bits = 12,
.is_mash_clock = true),
@ -141,7 +141,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
/* TV encoder clock. Only operating frequency is 108Mhz. */
[BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
.name = "vec",
@@ -1700,6 +1776,20 @@ static const struct bcm2835_clk_desc clk
@@ -1704,6 +1780,20 @@ static const struct bcm2835_clk_desc clk
.int_bits = 4,
.frac_bits = 0),

View File

@ -27,7 +27,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
bool is_vpu_clock;
bool is_mash_clock;
};
@@ -1244,7 +1246,7 @@ static struct clk *bcm2835_register_cloc
@@ -1248,7 +1250,7 @@ static struct clk *bcm2835_register_cloc
init.parent_names = parents;
init.num_parents = data->num_mux_parents;
init.name = data->name;
@ -36,7 +36,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
if (data->is_vpu_clock) {
init.ops = &bcm2835_vpu_clock_clk_ops;
@@ -1663,6 +1665,7 @@ static const struct bcm2835_clk_desc clk
@@ -1667,6 +1669,7 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_VPUDIV,
.int_bits = 12,
.frac_bits = 8,

View File

@ -19,7 +19,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1248,6 +1248,15 @@ static struct clk *bcm2835_register_cloc
@@ -1252,6 +1252,15 @@ static struct clk *bcm2835_register_cloc
init.name = data->name;
init.flags = data->flags | CLK_IGNORE_UNUSED;
@ -35,7 +35,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
if (data->is_vpu_clock) {
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
@@ -1722,13 +1731,15 @@ static const struct bcm2835_clk_desc clk
@@ -1726,13 +1735,15 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_GP1DIV,
.int_bits = 12,
.frac_bits = 12,

View File

@ -22,7 +22,7 @@ Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1022,16 +1022,28 @@ static int bcm2835_clock_set_rate(struct
@@ -1026,16 +1026,28 @@ static int bcm2835_clock_set_rate(struct
return 0;
}
@ -51,7 +51,7 @@ Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain
/*
* Select parent clock that results in the closest but lower rate
*/
@@ -1039,6 +1051,17 @@ static int bcm2835_clock_determine_rate(
@@ -1043,6 +1055,17 @@ static int bcm2835_clock_determine_rate(
parent = clk_hw_get_parent_by_index(hw, i);
if (!parent)
continue;

View File

@ -26,7 +26,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
#include <linux/clk/bcm2835.h>
#include <linux/debugfs.h>
#include <linux/module.h>
@@ -1841,6 +1842,25 @@ static const struct bcm2835_clk_desc clk
@@ -1845,6 +1846,25 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_PERIICTL),
};
@ -52,7 +52,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
static int bcm2835_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1850,6 +1870,7 @@ static int bcm2835_clk_probe(struct plat
@@ -1854,6 +1874,7 @@ static int bcm2835_clk_probe(struct plat
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
size_t i;
@ -60,7 +60,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
cprman = devm_kzalloc(dev,
sizeof(*cprman) + asize * sizeof(*clks),
@@ -1880,6 +1901,10 @@ static int bcm2835_clk_probe(struct plat
@@ -1884,6 +1905,10 @@ static int bcm2835_clk_probe(struct plat
clks[i] = desc->clk_register(cprman, desc->data);
}

View File

@ -16,7 +16,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1211,7 +1211,7 @@ bcm2835_register_pll_divider(struct bcm2
@@ -1215,7 +1215,7 @@ bcm2835_register_pll_divider(struct bcm2
init.num_parents = 1;
init.name = divider_name;
init.ops = &bcm2835_pll_divider_clk_ops;

View File

@ -64,7 +64,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
struct clk_onecell_data onecell;
struct clk *clks[];
@@ -1170,7 +1188,7 @@ static struct clk *bcm2835_register_pll(
@@ -1174,7 +1192,7 @@ static struct clk *bcm2835_register_pll(
memset(&init, 0, sizeof(init));
/* All of the PLLs derive from the external oscillator. */
@ -73,7 +73,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
init.num_parents = 1;
init.name = data->name;
init.ops = &bcm2835_pll_clk_ops;
@@ -1253,17 +1271,21 @@ static struct clk *bcm2835_register_cloc
@@ -1257,17 +1275,21 @@ static struct clk *bcm2835_register_cloc
struct bcm2835_clock *clock;
struct clk_init_data init;
const char *parents[1 << CM_SRC_BITS];
@ -102,7 +102,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
}
memset(&init, 0, sizeof(init));
@@ -1885,8 +1907,18 @@ static int bcm2835_clk_probe(struct plat
@@ -1889,8 +1911,18 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);

View File

@ -11,7 +11,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -936,6 +936,9 @@ static long bcm2835_clock_rate_from_divi
@@ -940,6 +940,9 @@ static long bcm2835_clock_rate_from_divi
const struct bcm2835_clock_data *data = clock->data;
u64 temp;
@ -21,7 +21,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
/*
* The divisor is a 12.12 fixed point field, but only some of
* the bits are populated in any given clock.
@@ -959,7 +962,12 @@ static unsigned long bcm2835_clock_get_r
@@ -963,7 +966,12 @@ static unsigned long bcm2835_clock_get_r
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;
@ -35,7 +35,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
}
@@ -1405,6 +1413,28 @@ static const char *const bcm2835_clock_v
@@ -1409,6 +1417,28 @@ static const char *const bcm2835_clock_v
__VA_ARGS__)
/*
@ -64,7 +64,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
* the real definition of all the pll, pll_dividers and clocks
* these make use of the above REGISTER_* macros
*/
@@ -1849,7 +1879,12 @@ static const struct bcm2835_clk_desc clk
@@ -1853,7 +1883,12 @@ static const struct bcm2835_clk_desc clk
.div_reg = CM_DSI1EDIV,
.int_bits = 4,
.frac_bits = 8),

View File

@ -27,7 +27,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net>
bcm2835_pll_choose_ndiv_and_fdiv(rate, *parent_rate, &ndiv, &fdiv);
return bcm2835_pll_rate_from_divisors(*parent_rate, ndiv, fdiv, 1);
@@ -629,13 +633,6 @@ static int bcm2835_pll_set_rate(struct c
@@ -631,13 +635,6 @@ static int bcm2835_pll_set_rate(struct c
u32 ana[4];
int i;

View File

@ -16,7 +16,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1657,7 +1657,7 @@ static const struct bcm2835_clk_desc clk
@@ -1661,7 +1661,7 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_AUX,
.load_mask = CM_PLLH_LOADAUX,
.hold_mask = 0,

View File

@ -34,7 +34,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
u32 ctl_reg;
u32 div_reg;
@@ -1055,10 +1058,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw)
@@ -1059,10 +1062,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw)
return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0;
}
@ -96,7 +96,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
struct clk_hw *parent, *best_parent = NULL;
bool current_parent_is_pllc;
unsigned long rate, best_rate = 0;
@@ -1086,9 +1139,8 @@ static int bcm2835_clock_determine_rate(
@@ -1090,9 +1143,8 @@ static int bcm2835_clock_determine_rate(
if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc)
continue;
@ -108,7 +108,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
if (rate > best_rate && rate <= req->rate) {
best_parent = parent;
best_prate = prate;
@@ -1308,6 +1360,13 @@ static struct clk *bcm2835_register_cloc
@@ -1312,6 +1364,13 @@ static struct clk *bcm2835_register_cloc
if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
init.flags &= ~CLK_IS_CRITICAL;

View File

@ -19,7 +19,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1920,7 +1920,12 @@ static const struct bcm2835_clk_desc clk
@@ -1924,7 +1924,12 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_VECCTL,
.div_reg = CM_VECDIV,
.int_bits = 4,

View File

@ -18,7 +18,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -1067,7 +1067,7 @@ static unsigned long bcm2835_clock_choos
@@ -1071,7 +1071,7 @@ static unsigned long bcm2835_clock_choos
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
const struct bcm2835_clock_data *data = clock->data;

View File

@ -31,7 +31,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
};
struct bcm2835_clock_data {
@@ -1286,7 +1287,7 @@ bcm2835_register_pll_divider(struct bcm2
@@ -1290,7 +1291,7 @@ bcm2835_register_pll_divider(struct bcm2
init.num_parents = 1;
init.name = divider_name;
init.ops = &bcm2835_pll_divider_clk_ops;
@ -40,7 +40,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL);
if (!divider)
@@ -1525,7 +1526,8 @@ static const struct bcm2835_clk_desc clk
@@ -1529,7 +1530,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLA_CORE,
.load_mask = CM_PLLA_LOADCORE,
.hold_mask = CM_PLLA_HOLDCORE,
@ -50,7 +50,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
.name = "plla_per",
.source_pll = "plla",
@@ -1533,7 +1535,8 @@ static const struct bcm2835_clk_desc clk
@@ -1537,7 +1539,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLA_PER,
.load_mask = CM_PLLA_LOADPER,
.hold_mask = CM_PLLA_HOLDPER,
@ -60,7 +60,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
.name = "plla_dsi0",
.source_pll = "plla",
@@ -1549,7 +1552,8 @@ static const struct bcm2835_clk_desc clk
@@ -1553,7 +1556,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLA_CCP2,
.load_mask = CM_PLLA_LOADCCP2,
.hold_mask = CM_PLLA_HOLDCCP2,
@ -70,7 +70,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
/* PLLB is used for the ARM's clock. */
[BCM2835_PLLB] = REGISTER_PLL(
@@ -1573,7 +1577,8 @@ static const struct bcm2835_clk_desc clk
@@ -1577,7 +1581,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLB_ARM,
.load_mask = CM_PLLB_LOADARM,
.hold_mask = CM_PLLB_HOLDARM,
@ -80,7 +80,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
/*
* PLLC is the core PLL, used to drive the core VPU clock.
@@ -1602,7 +1607,8 @@ static const struct bcm2835_clk_desc clk
@@ -1606,7 +1611,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_CORE0,
.load_mask = CM_PLLC_LOADCORE0,
.hold_mask = CM_PLLC_HOLDCORE0,
@ -90,7 +90,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(
.name = "pllc_core1",
.source_pll = "pllc",
@@ -1610,7 +1616,8 @@ static const struct bcm2835_clk_desc clk
@@ -1614,7 +1620,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_CORE1,
.load_mask = CM_PLLC_LOADCORE1,
.hold_mask = CM_PLLC_HOLDCORE1,
@ -100,7 +100,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(
.name = "pllc_core2",
.source_pll = "pllc",
@@ -1618,7 +1625,8 @@ static const struct bcm2835_clk_desc clk
@@ -1622,7 +1629,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_CORE2,
.load_mask = CM_PLLC_LOADCORE2,
.hold_mask = CM_PLLC_HOLDCORE2,
@ -110,7 +110,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLC_PER] = REGISTER_PLL_DIV(
.name = "pllc_per",
.source_pll = "pllc",
@@ -1626,7 +1634,8 @@ static const struct bcm2835_clk_desc clk
@@ -1630,7 +1638,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLC_PER,
.load_mask = CM_PLLC_LOADPER,
.hold_mask = CM_PLLC_HOLDPER,
@ -120,7 +120,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
/*
* PLLD is the display PLL, used to drive DSI display panels.
@@ -1655,7 +1664,8 @@ static const struct bcm2835_clk_desc clk
@@ -1659,7 +1668,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLD_CORE,
.load_mask = CM_PLLD_LOADCORE,
.hold_mask = CM_PLLD_HOLDCORE,
@ -130,7 +130,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLD_PER] = REGISTER_PLL_DIV(
.name = "plld_per",
.source_pll = "plld",
@@ -1663,7 +1673,8 @@ static const struct bcm2835_clk_desc clk
@@ -1667,7 +1677,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLD_PER,
.load_mask = CM_PLLD_LOADPER,
.hold_mask = CM_PLLD_HOLDPER,
@ -140,7 +140,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
.name = "plld_dsi0",
.source_pll = "plld",
@@ -1708,7 +1719,8 @@ static const struct bcm2835_clk_desc clk
@@ -1712,7 +1723,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_RCAL,
.load_mask = CM_PLLH_LOADRCAL,
.hold_mask = 0,
@ -150,7 +150,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(
.name = "pllh_aux",
.source_pll = "pllh",
@@ -1716,7 +1728,8 @@ static const struct bcm2835_clk_desc clk
@@ -1720,7 +1732,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_AUX,
.load_mask = CM_PLLH_LOADAUX,
.hold_mask = 0,
@ -160,7 +160,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
.name = "pllh_pix",
.source_pll = "pllh",
@@ -1724,7 +1737,8 @@ static const struct bcm2835_clk_desc clk
@@ -1728,7 +1741,8 @@ static const struct bcm2835_clk_desc clk
.a2w_reg = A2W_PLLH_PIX,
.load_mask = CM_PLLH_LOADPIX,
.hold_mask = 0,

View File

@ -1,37 +0,0 @@
From 6f879697d6393aa6918537c4c46e44c8579dd2a1 Mon Sep 17 00:00:00 2001
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Fri, 30 Mar 2018 10:53:44 +0200
Subject: [PATCH] Revert "genirq: Use irqd_get_trigger_type to compare the
trigger type for shared IRQs"
This reverts commit 9d0273bb1c4b645817eccfe5c5975ea29add3300 which is
commit 382bd4de61827dbaaf5fb4fb7b1f4be4a86505e7 upstream.
It causes too many problems with the stable tree, and would require too
many other things to be backported, so just revert it.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
kernel/irq/manage.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1189,10 +1189,8 @@ __setup_irq(unsigned int irq, struct irq
* set the trigger type must match. Also all must
* agree on ONESHOT.
*/
- unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
-
if (!((old->flags & new->flags) & IRQF_SHARED) ||
- (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
+ ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
((old->flags ^ new->flags) & IRQF_ONESHOT))
goto mismatch;

View File

@ -69,7 +69,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/**
* ata_build_rw_tf - Build ATA taskfile for given read/write request
* @tf: Target ATA taskfile
@@ -4781,6 +4794,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
@@ -4802,6 +4815,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
if (tag < 0)
return NULL;
}
@ -79,7 +79,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
qc = __ata_qc_from_tag(ap, tag);
qc->tag = tag;
@@ -5678,6 +5694,9 @@ struct ata_port *ata_port_alloc(struct a
@@ -5698,6 +5714,9 @@ struct ata_port *ata_port_alloc(struct a
ap->stats.unhandled_irq = 1;
ap->stats.idle_irq = 1;
#endif
@ -89,7 +89,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
ata_sff_port_init(ap);
return ap;
@@ -5699,6 +5718,12 @@ static void ata_host_release(struct devi
@@ -5719,6 +5738,12 @@ static void ata_host_release(struct devi
kfree(ap->pmp_link);
kfree(ap->slave_link);
@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
kfree(ap);
host->ports[i] = NULL;
}
@@ -6145,7 +6170,23 @@ int ata_host_register(struct ata_host *h
@@ -6165,7 +6190,23 @@ int ata_host_register(struct ata_host *h
host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
host->ports[i]->local_port_no = i + 1;
}

View File

@ -431,9 +431,9 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
- struct fsl_ifc_regs __iomem *ifc = ctrl->regs;
+ struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
u32 nand_fsr;
int status;
/* Use READ_STATUS command, but wait for the device to be ready */
@@ -826,39 +826,42 @@ static int fsl_ifc_chip_init_tail(struct
@@ -827,39 +827,42 @@ static int fsl_ifc_chip_init_tail(struct
static void fsl_ifc_sram_init(struct fsl_ifc_mtd *priv)
{
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
@ -491,7 +491,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
/* wait for command complete flag or timeout */
wait_event_timeout(ctrl->nand_wait, ctrl->nand_stat,
@@ -868,14 +871,15 @@ static void fsl_ifc_sram_init(struct fsl
@@ -869,14 +872,15 @@ static void fsl_ifc_sram_init(struct fsl
printk(KERN_ERR "fsl-ifc: Failed to Initialise SRAM\n");
/* Restore CSOR and CSOR_ext */
@ -510,7 +510,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
struct nand_chip *chip = &priv->chip;
struct nand_ecclayout *layout;
u32 csor;
@@ -886,7 +890,8 @@ static int fsl_ifc_chip_init(struct fsl_
@@ -887,7 +891,8 @@ static int fsl_ifc_chip_init(struct fsl_
/* fill in nand_chip structure */
/* set up function call table */
@ -520,7 +520,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
chip->read_byte = fsl_ifc_read_byte16;
else
chip->read_byte = fsl_ifc_read_byte;
@@ -900,13 +905,14 @@ static int fsl_ifc_chip_init(struct fsl_
@@ -901,13 +906,14 @@ static int fsl_ifc_chip_init(struct fsl_
chip->bbt_td = &bbt_main_descr;
chip->bbt_md = &bbt_mirror_descr;
@ -537,7 +537,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
chip->read_byte = fsl_ifc_read_byte16;
chip->options |= NAND_BUSWIDTH_16;
} else {
@@ -919,7 +925,7 @@ static int fsl_ifc_chip_init(struct fsl_
@@ -920,7 +926,7 @@ static int fsl_ifc_chip_init(struct fsl_
chip->ecc.read_page = fsl_ifc_read_page;
chip->ecc.write_page = fsl_ifc_write_page;
@ -546,7 +546,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
/* Hardware generates ECC per 512 Bytes */
chip->ecc.size = 512;
@@ -1005,10 +1011,10 @@ static int fsl_ifc_chip_remove(struct fs
@@ -1006,10 +1012,10 @@ static int fsl_ifc_chip_remove(struct fs
return 0;
}
@ -559,7 +559,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
if (!(cspr & CSPR_V))
return 0;
@@ -1022,7 +1028,7 @@ static DEFINE_MUTEX(fsl_ifc_nand_mutex);
@@ -1023,7 +1029,7 @@ static DEFINE_MUTEX(fsl_ifc_nand_mutex);
static int fsl_ifc_nand_probe(struct platform_device *dev)
{
@ -568,7 +568,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
struct fsl_ifc_mtd *priv;
struct resource res;
static const char *part_probe_types[]
@@ -1033,9 +1039,9 @@ static int fsl_ifc_nand_probe(struct pla
@@ -1034,9 +1040,9 @@ static int fsl_ifc_nand_probe(struct pla
struct mtd_part_parser_data ppdata;
ppdata.of_node = dev->dev.of_node;
@ -580,7 +580,7 @@ Signed-off-by: Raghav Dogra <raghav@freescale.com>
/* get, allocate and map the memory resource */
ret = of_address_to_resource(node, 0, &res);
@@ -1046,7 +1052,7 @@ static int fsl_ifc_nand_probe(struct pla
@@ -1047,7 +1053,7 @@ static int fsl_ifc_nand_probe(struct pla
/* find which chip select it is connected to */
for (bank = 0; bank < fsl_ifc_ctrl_dev->banks; bank++) {

View File

@ -204,7 +204,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
}
}
@@ -3670,11 +3672,12 @@ static void quirk_fixed_dma_alias(struct
@@ -3672,11 +3674,12 @@ static void quirk_fixed_dma_alias(struct
id = pci_match_id(fixed_dma_alias_tbl, dev);
if (id) {

View File

@ -242,11 +242,10 @@ Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
#include <linux/mman.h>
#include <linux/nodemask.h>
#include <linux/memblock.h>
@@ -641,59 +640,3 @@ void __set_fixmap(enum fixed_addresses i
flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
@@ -642,62 +641,6 @@ void __set_fixmap(enum fixed_addresses i
}
}
-
-void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
-{
- const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
@ -302,3 +301,7 @@ Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
-
- return dt_virt;
-}
-
#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
int pud_free_pmd_page(pud_t *pud)
{

View File

@ -75,7 +75,7 @@ Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
elbc_fcm_ctrl = fsl_lbc_ctrl_dev->nand;
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -1073,8 +1073,7 @@ static int fsl_ifc_nand_probe(struct pla
@@ -1074,8 +1074,7 @@ static int fsl_ifc_nand_probe(struct pla
ifc_nand_ctrl->addr = NULL;
fsl_ifc_ctrl_dev->nand = ifc_nand_ctrl;

View File

@ -15,7 +15,7 @@
/* initialize internal qc */
/* XXX: Tag 0 is used for drivers with legacy EH as some
@@ -4788,6 +4796,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
@@ -4809,6 +4817,9 @@ struct ata_queued_cmd *ata_qc_new_init(s
if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
return NULL;
@ -25,7 +25,7 @@
/* libsas case */
if (ap->flags & ATA_FLAG_SAS_HOST) {
tag = ata_sas_allocate_tag(ap);
@@ -4833,6 +4844,8 @@ void ata_qc_free(struct ata_queued_cmd *
@@ -4854,6 +4865,8 @@ void ata_qc_free(struct ata_queued_cmd *
qc->tag = ATA_TAG_POISON;
if (ap->flags & ATA_FLAG_SAS_HOST)
ata_sas_free_tag(tag, ap);