mirror of https://github.com/hak5/openwrt.git
ath79: preliminary support for TP-Link WDR3600 / WDR4300 (AR9344)
working: - leds - buttons - lan / wan - usb (hub port 1 + 2) - wifi 5g - sysupgrade - ... not working: - wifi 2g Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>openwrt-19.07
Johann Neuhauser
John Crispin
parent
faf0a460c4
commit
a7e1e919af
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@ -13,6 +13,12 @@ ath79_setup_interfaces()
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ucidef_set_interface_lan "eth0"
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;;
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"tplink,tl-wdr3600"|\
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"tplink,tl-wdr4300")
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ucidef_add_switch "switch0" \
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"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
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;;
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"tplink,tl-wr1043nd-v1")
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ucidef_add_switch "switch0" \
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"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "5@eth0"
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@ -2,6 +2,8 @@
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. /lib/functions/leds.sh
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status_led="$(get_dt_led status)"
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get_status_led() {
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local board=$(board_name)
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local boardname="${board##*,}"
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@ -23,7 +25,7 @@ get_status_led() {
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}
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set_state() {
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get_status_led
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[ -z "$status_led" ] && get_status_led
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case "$1" in
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preinit)
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@ -50,6 +50,10 @@ case "$FIRMWARE" in
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"avm,fritz300e")
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ath9k_eeprom_extract_reverse "urloader" 5441 1088
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;;
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"tplink,tl-wdr3600"|\
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"tplink,tl-wdr4300")
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ath9k_eeprom_extract "art" 20480 1088
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;;
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"ubnt,unifi")
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ath9k_eeprom_extract "art" 4096 2048
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;;
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@ -0,0 +1,32 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar934x.dtsi"
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/ {
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compatible = "qca,ar9344";
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};
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&apb {
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pcie: pcie-controller@180c0000 {
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compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0x0>;
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reg = <0x180c0000 0x1000>, /* CRP */
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<0x180f0000 0x100>, /* CTRL */
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<0x14000000 0x1000>; /* CFG */
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reg-names = "crp_base", "ctrl_base", "cfg_base";
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ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
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0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 1>;
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interrupt-map = <0 0 0 0 &pcie 0>;
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status = "disabled";
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};
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};
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@ -0,0 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ar9344_tl-wdr4300.dtsi"
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/ {
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model = "TP-Link WDR3600";
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compatible = "tplink,tl-wdr3600";
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};
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@ -0,0 +1,9 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ar9344_tl-wdr4300.dtsi"
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/ {
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model = "TP-Link WDR4300";
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compatible = "tplink,tl-wdr4300";
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};
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@ -0,0 +1,240 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "ar9344.dtsi"
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/ {
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model = "TP-Link WDR4300";
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compatible = "tplink,tl-wdr4300";
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aliases {
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led-status = &system;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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leds {
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compatible = "gpio-leds";
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usb1 {
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label = "tp-link:green:usb1";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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default-state = "off";
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trigger-sources = <&hub_port1>;
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linux,default-trigger = "usbport";
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};
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usb2 {
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label = "tp-link:green:usb2";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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default-state = "off";
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trigger-sources = <&hub_port2>;
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linux,default-trigger = "usbport";
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};
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wlan2g {
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label = "tp-link:green:wlan2g";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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default-state = "off";
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linux,default-trigger = "phy0tpt";
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};
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system: system {
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label = "tp-link:green:system";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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qss {
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label = "tp-link:green:qss";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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ath9k-leds {
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compatible = "gpio-leds";
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wlan5g {
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label = "tp-link:green:wlan5g";
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gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
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default-state = "off";
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linux,default-trigger = "phy1tpt";
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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button@0 {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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button@1 {
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label = "wifi";
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linux,code = <KEY_RFKILL>;
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linux,input-type = <EV_SW>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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gpio_usb1_power {
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gpio-export,name = "tp-link:power:usb1";
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gpio-export,output = <1>;
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gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
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};
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gpio_usb2_power {
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gpio-export,name = "tp-link:power:usb2";
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gpio-export,output = <1>;
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gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
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};
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gpio_ext_lna0 {
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gpio-export,name = "tp-link:ext:lna0";
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gpio-export,output = <1>;
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gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
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};
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gpio_ext_lna1 {
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gpio-export,name = "tp-link:ext:lna1";
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gpio-export,output = <1>;
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gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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&uart {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&spi {
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num-cs = <1>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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label = "u-boot";
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reg = <0x000000 0x020000>;
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read-only;
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};
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partition@20000 {
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label = "firmware";
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reg = <0x020000 0x7d0000>;
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};
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partition@7f0000 {
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label = "art";
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reg = <0x7f0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&usb {
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status = "okay";
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port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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hub_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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hub_port2: port@2 {
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reg = <2>;
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#trigger-source-cells = <0>;
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&pcie {
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status = "okay";
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ath9k: wifi@168c,0033 {
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compatible = "pci168c,0033";
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reg = <0x0000 0 0 0 0>;
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mtd-mac-address = <&uboot 0x1fc00>;
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qca,no-eeprom;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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qca,ar8327-initvals = <
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0x04 0x07600000 /* PORT0 PAD MODE CTRL */
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0x10 0x80000080 /* POWER_ON_STRIP */
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0x50 0xc737c737 /* LED_CTRL0 */
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0x54 0x00000000 /* LED_CTRL1 */
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0x58 0x00000000 /* LED_CTRL2 */
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0x5c 0x0030c300 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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/* default for ar934x, except for 1000M */
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pll-data = <0x06000000 0x00000101 0x00001616>;
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mtd-mac-address = <&uboot 0x1fc00>;
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mtd-mac-address-increment = <(-2)>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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@ -0,0 +1,219 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/clock/ath79-clk.h>
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#include "ath79.dtsi"
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/ {
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compatible = "qca,ar9340";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips74Kc";
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clocks = <&pll ATH79_CLK_CPU>;
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reg = <0>;
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};
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ref: ref {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-output-names = "ref";
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};
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};
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ahb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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apb: apb {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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ddr_ctrl: memory-controller@18000000 {
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compatible = "qca,ar9340-ddr-controller",
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"qca,ar7240-ddr-controller";
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reg = <0x18000000 0x12c>;
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#qca,ddr-wb-channel-cells = <1>;
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};
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uart: uart@18020000 {
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compatible = "ns16550a";
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reg = <0x18020000 0x2c>;
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interrupts = <3>;
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clocks = <&pll ATH79_CLK_REF>;
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clock-names = "uart";
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reg-io-width = <4>;
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reg-shift = <2>;
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no-loopback-test;
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status = "disabled";
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};
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gpio: gpio@18040000 {
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compatible = "qca,ar9340-gpio";
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reg = <0x18040000 0x2c>;
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interrupts = <2>;
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ngpios = <23>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pinmux: pinmux@1804002c {
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compatible = "pinctrl-single";
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reg = <0x1804002c 0x44>;
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#size-cells = <0>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x1>;
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#pinctrl-cells = <2>;
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jtag_disable_pins: pinmux_jtag_disable_pins {
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pinctrl-single,bits = <0x40 0x2 0x2>;
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};
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};
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pll: pll-controller@18050000 {
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compatible = "qca,ar9340-pll", "syscon";
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reg = <0x18050000 0x4c>;
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#clock-cells = <1>;
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clocks = <&ref>;
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clock-names = "ref";
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clock-output-names = "cpu", "ddr", "ahb";
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};
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wdt: wdt@18060008 {
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compatible = "qca,ar9340-wdt", "qca,ar7130-wdt";
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reg = <0x18060008 0x8>;
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interrupts = <4>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "wdt";
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};
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rst: reset-controller@1806001c {
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compatible = "qca,ar9340-reset", "qca,ar7100-reset";
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reg = <0x1806001c 0x4>;
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#reset-cells = <1>;
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};
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gmac: gmac@18070000 {
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compatible = "qca,ar9340-gmac", "qca,ar9330-gmac";
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reg = <0x18070000 0x14>;
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};
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};
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usb: usb@1b000000 {
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compatible = "generic-ehci";
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reg = <0x1b000000 0x1d8>;
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interrupts = <3>;
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resets = <&rst 5>;
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reset-names = "usb-host";
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has-transaction-translator;
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caps-offset = <0x100>;
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phy-names = "usb-phy";
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phys = <&usb_phy>;
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status = "disabled";
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};
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spi: spi@1f000000 {
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compatible = "qca,ar9340-spi", "qca,ar7100-spi";
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reg = <0x1f000000 0x1c>;
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clocks = <&pll ATH79_CLK_AHB>;
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clock-names = "ahb";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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usb_phy: usb-phy {
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compatible = "qca,ar9340-usb-phy", "qca,ar7200-usb-phy";
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reset-names = "usb-phy", "usb-suspend-override";
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resets = <&rst 4>, <&rst 3>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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&cpuintc {
|
||||
qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
|
||||
qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
|
||||
<&ddr_ctrl 0>, <&ddr_ctrl 1>;
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
resets = <&rst 22>;
|
||||
reset-names = "mdio";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
compatible = "qca,ar9340-eth", "syscon";
|
||||
|
||||
pll-data = <0x16000000 0x00000101 0x00001616>;
|
||||
pll-reg = <0x4 0x2c 17>;
|
||||
pll-handle = <&pll>;
|
||||
|
||||
resets = <&rst 8>, <&rst 9>;
|
||||
reset-names = "mac", "phy";
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
resets = <&rst 23>;
|
||||
reset-names = "mdio";
|
||||
builtin-switch;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
compatible = "qca,ar9340-eth", "syscon";
|
||||
|
||||
resets = <&rst 12>, <&rst 13>;
|
||||
reset-names = "mac", "phy";
|
||||
};
|
||||
|
|
@ -625,6 +625,7 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update)
|
|||
ath79_set_pll(ag);
|
||||
} else if (of_device_is_compatible(np, "qca,ar9130-eth")) {
|
||||
} else if (of_device_is_compatible(np, "qca,ar9340-eth")) {
|
||||
ath79_set_pll(ag);
|
||||
} else if (of_device_is_compatible(np, "qca,qca9550-eth")) {
|
||||
} else if (of_device_is_compatible(np, "qca,qca9560-eth")) {
|
||||
}
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@ define Device/tplink
|
|||
KERNEL := kernel-bin | append-dtb | lzma
|
||||
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | tplink-v1-header
|
||||
IMAGES := sysupgrade.bin factory.bin
|
||||
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade
|
||||
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade | append-metadata
|
||||
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
|
||||
endef
|
||||
|
||||
|
|
@ -72,6 +72,12 @@ define Device/tplink-8m
|
|||
IMAGE_SIZE := 7936k
|
||||
endef
|
||||
|
||||
define Device/tplink-8mlzma
|
||||
$(Device/tplink)
|
||||
TPLINK_FLASHLAYOUT := 8Mlzma
|
||||
IMAGE_SIZE := 7936k
|
||||
endef
|
||||
|
||||
define Device/tl_wr1043nd_v1
|
||||
$(Device/tplink-8m)
|
||||
ATH_SOC := ar9132
|
||||
|
|
@ -81,3 +87,21 @@ define Device/tl_wr1043nd_v1
|
|||
SUPPORTED_DEVICES := tplink,tl-wr1043nd-v1 tl-wr1043nd
|
||||
endef
|
||||
#TARGET_DEVICES += tl_wr1043nd_v1
|
||||
|
||||
define Device/tl-wdr3600
|
||||
$(Device/tplink-8mlzma)
|
||||
ATH_SOC := ar9344
|
||||
DEVICE_TITLE := TP-LINK TL-WDR3600
|
||||
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
|
||||
TPLINK_HWID := 0x36000001
|
||||
SUPPORTED_DEVICES := tplink,tl-wdr3600 tl-wdr3600
|
||||
endef
|
||||
TARGET_DEVICES += tl-wdr3600
|
||||
|
||||
define Device/tl-wdr4300
|
||||
$(Device/tl-wdr3600)
|
||||
DEVICE_TITLE := TP-LINK TL-WDR4300
|
||||
TPLINK_HWID := 0x43000001
|
||||
SUPPORTED_DEVICES := tplink,tl-wdr4300 tl-wdr4300
|
||||
endef
|
||||
TARGET_DEVICES += tl-wdr4300
|
||||
|
|
|
|||
Loading…
Reference in New Issue