many more code cleanups for checkpatch.pl, most flagged as errors

SVN-Revision: 13665
lede-17.01
Thomas Langer 2008-12-16 19:39:34 +00:00
parent cb87dfde7b
commit a38b23a894
22 changed files with 856 additions and 911 deletions

View File

@ -70,12 +70,9 @@ unsigned int ifxmips_clocks[] = {CLOCK_167M, CLOCK_133M, CLOCK_111M, CLOCK_83M }
#define DDR_HZ ifxmips_clocks[ifxmips_r32(IFXMIPS_CGU_SYS) & 0x3]
static inline unsigned int
get_input_clock(int pll)
{
switch(pll)
static inline unsigned int get_input_clock(int pll)
{
switch (pll) {
case 0:
if (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & CGU_PLL0_SRC)
return BASIS_INPUT_CRYSTAL_USB;
@ -91,12 +88,13 @@ get_input_clock(int pll)
else
return BASIC_INPUT_CLOCK_FREQUENCY_2;
case 2:
switch(CGU_PLL2_SRC)
{
switch (CGU_PLL2_SRC) {
case 0:
return cgu_get_pll0_fdiv();
case 1:
return CGU_PLL2_PHASE_DIVIDER_ENABLE ? BASIC_INPUT_CLOCK_FREQUENCY_1 : BASIC_INPUT_CLOCK_FREQUENCY_2;
return CGU_PLL2_PHASE_DIVIDER_ENABLE ?
BASIC_INPUT_CLOCK_FREQUENCY_1 :
BASIC_INPUT_CLOCK_FREQUENCY_2;
case 2:
return BASIS_INPUT_CRYSTAL_USB;
}
@ -105,8 +103,7 @@ get_input_clock(int pll)
}
}
static inline unsigned int
cal_dsm(int pll, unsigned int num, unsigned int den)
static inline unsigned int cal_dsm(int pll, unsigned int num, unsigned int den)
{
u64 res, clock = get_input_clock(pll);
@ -115,8 +112,8 @@ cal_dsm(int pll, unsigned int num, unsigned int den)
return res;
}
static inline unsigned int
mash_dsm(int pll, unsigned int M, unsigned int N, unsigned int K)
static inline unsigned int mash_dsm(int pll, unsigned int M, unsigned int N,
unsigned int K)
{
unsigned int num = ((N + 1) << 10) + K;
unsigned int den = (M + 1) << 10;
@ -124,8 +121,8 @@ mash_dsm(int pll, unsigned int M, unsigned int N, unsigned int K)
return cal_dsm(pll, num, den);
}
static inline unsigned int
ssff_dsm_1(int pll, unsigned int M, unsigned int N, unsigned int K)
static inline unsigned int ssff_dsm_1(int pll, unsigned int M, unsigned int N,
unsigned int K)
{
unsigned int num = ((N + 1) << 11) + K + 512;
unsigned int den = (M + 1) << 11;
@ -133,8 +130,8 @@ ssff_dsm_1(int pll, unsigned int M, unsigned int N, unsigned int K)
return cal_dsm(pll, num, den);
}
static inline unsigned int
ssff_dsm_2(int pll, unsigned int M, unsigned int N, unsigned int K)
static inline unsigned int ssff_dsm_2(int pll, unsigned int M, unsigned int N,
unsigned int K)
{
unsigned int num = K >= 512 ?
((N + 1) << 12) + K - 512 : ((N + 1) << 12) + K + 3584;
@ -143,9 +140,8 @@ ssff_dsm_2(int pll, unsigned int M, unsigned int N, unsigned int K)
return cal_dsm(pll, num, den);
}
static inline unsigned int
dsm(int pll, unsigned int M, unsigned int N, unsigned int K,
unsigned int dsmsel, unsigned int phase_div_en)
static inline unsigned int dsm(int pll, unsigned int M, unsigned int N,
unsigned int K, unsigned int dsmsel, unsigned int phase_div_en)
{
if (!dsmsel)
return mash_dsm(pll, M, N, K);
@ -155,8 +151,7 @@ dsm(int pll, unsigned int M, unsigned int N, unsigned int K,
return ssff_dsm_2(pll, M, N, K);
}
static inline unsigned int
cgu_get_pll0_fosc(void)
static inline unsigned int cgu_get_pll0_fosc(void)
{
if (CGU_PLL0_BYPASS)
return get_input_clock(0);
@ -168,19 +163,16 @@ cgu_get_pll0_fosc(void)
CGU_PLL0_CFG_DSMSEL, CGU_PLL0_PHASE_DIVIDER_ENABLE);
}
static unsigned int
cgu_get_pll0_fdiv(void)
static unsigned int cgu_get_pll0_fdiv(void)
{
register unsigned int div = CGU_PLL2_CFG_INPUT_DIV + 1;
unsigned int div = CGU_PLL2_CFG_INPUT_DIV + 1;
return (cgu_get_pll0_fosc() + (div >> 1)) / div;
}
unsigned int
cgu_get_io_region_clock(void)
{
register unsigned int ret = cgu_get_pll0_fosc();
switch(ifxmips_r32(IFXMIPS_CGU_PLL2_CFG) & CGU_SYS_DDR_SEL)
unsigned int cgu_get_io_region_clock(void)
{
unsigned int ret = cgu_get_pll0_fosc();
switch (ifxmips_r32(IFXMIPS_CGU_PLL2_CFG) & CGU_SYS_DDR_SEL) {
default:
case 0:
return (ret + 1) / 2;
@ -193,10 +185,9 @@ cgu_get_io_region_clock(void)
}
}
unsigned int
cgu_get_fpi_bus_clock(int fpi)
unsigned int cgu_get_fpi_bus_clock(int fpi)
{
register unsigned int ret = cgu_get_io_region_clock();
unsigned int ret = cgu_get_io_region_clock();
if ((fpi == 2) && (ifxmips_r32(IFXMIPS_CGU_SYS) & CGU_SYS_FPI_SEL))
ret >>= 1;
return ret;
@ -204,25 +195,26 @@ cgu_get_fpi_bus_clock(int fpi)
void cgu_setup_pci_clk(int external_clock)
{
//set clock to 33Mhz
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000, IFXMIPS_CGU_IFCCR);
if(external_clock)
{
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~ (1 << 16), IFXMIPS_CGU_IFCCR);
/* set clock to 33Mhz */
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~0xf00000,
IFXMIPS_CGU_IFCCR);
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000,
IFXMIPS_CGU_IFCCR);
if (external_clock) {
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~(1 << 16),
IFXMIPS_CGU_IFCCR);
ifxmips_w32((1 << 30), IFXMIPS_CGU_PCICR);
} else {
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | (1 << 16), IFXMIPS_CGU_IFCCR);
ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | (1 << 16),
IFXMIPS_CGU_IFCCR);
ifxmips_w32((1 << 31) | (1 << 30), IFXMIPS_CGU_PCICR);
}
}
unsigned int
ifxmips_get_cpu_hz(void)
unsigned int ifxmips_get_cpu_hz(void)
{
unsigned int ddr_clock = DDR_HZ;
switch(ifxmips_r32(IFXMIPS_CGU_SYS) & 0xc)
{
switch (ifxmips_r32(IFXMIPS_CGU_SYS) & 0xc) {
case 0:
return CLOCK_333M;
case 4:
@ -232,8 +224,7 @@ ifxmips_get_cpu_hz(void)
}
EXPORT_SYMBOL(ifxmips_get_cpu_hz);
unsigned int
ifxmips_get_fpi_hz(void)
unsigned int ifxmips_get_fpi_hz(void)
{
unsigned int ddr_clock = DDR_HZ;
if (ifxmips_r32(IFXMIPS_CGU_SYS) & 0x40)

View File

@ -37,13 +37,13 @@ extern void ifxmips_enable_irq(unsigned int irq_nr);
extern void ifxmips_disable_irq(unsigned int irq_nr);
u64 *g_desc_list;
_dma_device_info dma_devs[MAX_DMA_DEVICE_NUM];
_dma_channel_info dma_chan[MAX_DMA_CHANNEL_NUM];
struct dma_device_info dma_devs[MAX_DMA_DEVICE_NUM];
struct dma_channel_info dma_chan[MAX_DMA_CHANNEL_NUM];
static const char *global_device_name[MAX_DMA_DEVICE_NUM] =
{ "PPE", "DEU", "SPI", "SDIO", "MCTRL0", "MCTRL1" };
_dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
struct dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
{"PPE", IFXMIPS_DMA_RX, 0, IFXMIPS_DMA_CH0_INT, 0},
{"PPE", IFXMIPS_DMA_TX, 0, IFXMIPS_DMA_CH1_INT, 0},
{"PPE", IFXMIPS_DMA_RX, 1, IFXMIPS_DMA_CH2_INT, 1},
@ -66,7 +66,7 @@ _dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
{"MCTRL1", IFXMIPS_DMA_TX, 1, IFXMIPS_DMA_CH19_INT, 1}
};
_dma_chan_map *chan_map = default_dma_map;
struct dma_chan_map *chan_map = default_dma_map;
volatile u32 g_ifxmips_dma_int_status;
volatile int g_ifxmips_dma_in_process; /* 0=not in process, 1=in process */
@ -87,7 +87,7 @@ void common_buffer_free(u8 *dataptr, void *opt)
kfree(dataptr);
}
void enable_ch_irq(_dma_channel_info *pCh)
void enable_ch_irq(struct dma_channel_info *pCh)
{
int chan_no = (int)(pCh - dma_chan);
unsigned long flag;
@ -100,7 +100,7 @@ void enable_ch_irq(_dma_channel_info *pCh)
ifxmips_enable_irq(pCh->irq);
}
void disable_ch_irq(_dma_channel_info *pCh)
void disable_ch_irq(struct dma_channel_info *pCh)
{
unsigned long flag;
int chan_no = (int) (pCh - dma_chan);
@ -114,7 +114,7 @@ void disable_ch_irq(_dma_channel_info *pCh)
ifxmips_mask_and_ack_irq(pCh->irq);
}
void open_chan(_dma_channel_info *pCh)
void open_chan(struct dma_channel_info *pCh)
{
unsigned long flag;
int chan_no = (int)(pCh - dma_chan);
@ -127,7 +127,7 @@ void open_chan(_dma_channel_info *pCh)
local_irq_restore(flag);
}
void close_chan(_dma_channel_info *pCh)
void close_chan(struct dma_channel_info *pCh)
{
unsigned long flag;
int chan_no = (int) (pCh - dma_chan);
@ -139,7 +139,7 @@ void close_chan(_dma_channel_info *pCh)
local_irq_restore(flag);
}
void reset_chan(_dma_channel_info *pCh)
void reset_chan(struct dma_channel_info *pCh)
{
int chan_no = (int) (pCh - dma_chan);
@ -149,8 +149,8 @@ void reset_chan(_dma_channel_info *pCh)
void rx_chan_intr_handler(int chan_no)
{
_dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev;
_dma_channel_info *pCh = &dma_chan[chan_no];
struct dma_device_info *pDev = (struct dma_device_info *)dma_chan[chan_no].dma_dev;
struct dma_channel_info *pCh = &dma_chan[chan_no];
struct rx_desc *rx_desc_p;
int tmp;
unsigned long flag;
@ -179,8 +179,8 @@ void rx_chan_intr_handler(int chan_no)
inline void tx_chan_intr_handler(int chan_no)
{
_dma_device_info *pDev = (_dma_device_info *)dma_chan[chan_no].dma_dev;
_dma_channel_info *pCh = &dma_chan[chan_no];
struct dma_device_info *pDev = (struct dma_device_info *)dma_chan[chan_no].dma_dev;
struct dma_channel_info *pCh = &dma_chan[chan_no];
int tmp;
unsigned long flag;
@ -242,11 +242,11 @@ void do_dma_tasklet(unsigned long unused)
irqreturn_t dma_interrupt(int irq, void *dev_id)
{
_dma_channel_info *pCh;
struct dma_channel_info *pCh;
int chan_no = 0;
int tmp;
pCh = (_dma_channel_info *)dev_id;
pCh = (struct dma_channel_info *)dev_id;
chan_no = (int)(pCh - dma_chan);
if (chan_no < 0 || chan_no > 19)
BUG();
@ -265,7 +265,7 @@ irqreturn_t dma_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
_dma_device_info *dma_device_reserve(char *dev_name)
struct dma_device_info *dma_device_reserve(char *dev_name)
{
int i;
@ -282,21 +282,21 @@ _dma_device_info *dma_device_reserve(char *dev_name)
}
EXPORT_SYMBOL(dma_device_reserve);
void dma_device_release(_dma_device_info *dev)
void dma_device_release(struct dma_device_info *dev)
{
dev->reserved = 0;
}
EXPORT_SYMBOL(dma_device_release);
void dma_device_register(_dma_device_info *dev)
void dma_device_register(struct dma_device_info *dev)
{
int i, j;
int chan_no = 0;
u8 *buffer;
int byte_offset;
unsigned long flag;
_dma_device_info *pDev;
_dma_channel_info *pCh;
struct dma_device_info *pDev;
struct dma_channel_info *pCh;
struct rx_desc *rx_desc_p;
struct tx_desc *tx_desc_p;
@ -331,7 +331,7 @@ void dma_device_register(_dma_device_info *dev)
for (j = 0; j < pCh->desc_len; j++) {
rx_desc_p = (struct rx_desc *)pCh->desc_base + j;
pDev = (_dma_device_info *)(pCh->dma_dev);
pDev = (struct dma_device_info *)(pCh->dma_dev);
buffer = pDev->buffer_alloc(pCh->packet_size, &byte_offset, (void *)&(pCh->opt[j]));
if (!buffer)
break;
@ -364,11 +364,11 @@ void dma_device_register(_dma_device_info *dev)
}
EXPORT_SYMBOL(dma_device_register);
void dma_device_unregister(_dma_device_info *dev)
void dma_device_unregister(struct dma_device_info *dev)
{
int i, j;
int chan_no;
_dma_channel_info *pCh;
struct dma_channel_info *pCh;
struct rx_desc *rx_desc_p;
struct tx_desc *tx_desc_p;
unsigned long flag;
@ -442,7 +442,7 @@ int dma_device_read(struct dma_device_info *dma_dev, u8 **dataptr, void **opt)
int len;
int byte_offset = 0;
void *p = NULL;
_dma_channel_info *pCh = dma_dev->rx_chan[dma_dev->current_rx_chan];
struct dma_channel_info *pCh = dma_dev->rx_chan[dma_dev->current_rx_chan];
struct rx_desc *rx_desc_p;
/* get the rx data first */
@ -488,13 +488,13 @@ int dma_device_write(struct dma_device_info *dma_dev, u8 *dataptr, int len, void
{
unsigned long flag;
u32 tmp, byte_offset;
_dma_channel_info *pCh;
struct dma_channel_info *pCh;
int chan_no;
struct tx_desc *tx_desc_p;
local_irq_save(flag);
pCh = dma_dev->tx_chan[dma_dev->current_tx_chan];
chan_no = (int)(pCh - (_dma_channel_info *) dma_chan);
chan_no = (int)(pCh - (struct dma_channel_info *) dma_chan);
tx_desc_p = (struct tx_desc *)pCh->desc_base + pCh->prev_desc;
while (tx_desc_p->status.field.OWN == CPU_OWN && tx_desc_p->status.field.C) {
@ -546,13 +546,13 @@ int dma_device_write(struct dma_device_info *dma_dev, u8 *dataptr, int len, void
}
EXPORT_SYMBOL(dma_device_write);
int map_dma_chan(_dma_chan_map *map)
int map_dma_chan(struct dma_chan_map *map)
{
int i, j;
int result;
for (i = 0; i < MAX_DMA_DEVICE_NUM; i++)
strcpy(dma_devs[i].device_name, global_device_name[i]);
dma_devs[i].device_name = &global_device_name[i];
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) {
dma_chan[i].irq = map[i].irq;

View File

@ -51,7 +51,7 @@ static struct timer_list rst_button_timer;
extern struct sock *uevent_sock;
extern u64 uevent_next_seqnum(void);
static unsigned long seen;
static int pressed = 0;
static int pressed;
struct event_t {
struct work_struct wq;
@ -61,26 +61,24 @@ struct event_t {
#endif
#define IFXMIPS_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; }
int
ifxmips_port_reserve_pin(unsigned int port, unsigned int pin)
int ifxmips_port_reserve_pin(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__);
printk(KERN_INFO "%s : call to obseleted function\n", __func__);
return 0;
}
EXPORT_SYMBOL(ifxmips_port_reserve_pin);
int
ifxmips_port_free_pin(unsigned int port, unsigned int pin)
int ifxmips_port_free_pin(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__);
printk(KERN_INFO "%s : call to obseleted function\n", __func__);
return 0;
}
EXPORT_SYMBOL(ifxmips_port_free_pin);
int
ifxmips_port_set_open_drain(unsigned int port, unsigned int pin)
int ifxmips_port_set_open_drain(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OD + (port * 0xC)) | (1 << pin),
@ -89,8 +87,7 @@ ifxmips_port_set_open_drain(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_open_drain);
int
ifxmips_port_clear_open_drain(unsigned int port, unsigned int pin)
int ifxmips_port_clear_open_drain(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OD + (port * 0xC)) & ~(1 << pin),
@ -99,8 +96,7 @@ ifxmips_port_clear_open_drain(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_clear_open_drain);
int
ifxmips_port_set_pudsel(unsigned int port, unsigned int pin)
int ifxmips_port_set_pudsel(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDSEL + (port * 0xC)) | (1 << pin),
@ -109,8 +105,7 @@ ifxmips_port_set_pudsel(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_pudsel);
int
ifxmips_port_clear_pudsel (unsigned int port, unsigned int pin)
int ifxmips_port_clear_pudsel(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDSEL + (port * 0xC)) & ~(1 << pin),
@ -119,8 +114,7 @@ ifxmips_port_clear_pudsel (unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_clear_pudsel);
int
ifxmips_port_set_puden(unsigned int port, unsigned int pin)
int ifxmips_port_set_puden(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDEN + (port * 0xC)) | (1 << pin),
@ -129,8 +123,7 @@ ifxmips_port_set_puden(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_puden);
int
ifxmips_port_clear_puden(unsigned int port, unsigned int pin)
int ifxmips_port_clear_puden(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDEN + (port * 0xC)) & ~(1 << pin),
@ -139,8 +132,7 @@ ifxmips_port_clear_puden(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_clear_puden);
int
ifxmips_port_set_stoff(unsigned int port, unsigned int pin)
int ifxmips_port_set_stoff(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_STOFF + (port * 0xC)) | (1 << pin),
@ -149,8 +141,7 @@ ifxmips_port_set_stoff(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_stoff);
int
ifxmips_port_clear_stoff(unsigned int port, unsigned int pin)
int ifxmips_port_clear_stoff(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_STOFF + (port * 0xC)) & ~(1 << pin),
@ -159,8 +150,7 @@ ifxmips_port_clear_stoff(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_clear_stoff);
int
ifxmips_port_set_dir_out(unsigned int port, unsigned int pin)
int ifxmips_port_set_dir_out(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_DIR + (port * 0xC)) | (1 << pin),
@ -169,8 +159,7 @@ ifxmips_port_set_dir_out(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_dir_out);
int
ifxmips_port_set_dir_in(unsigned int port, unsigned int pin)
int ifxmips_port_set_dir_in(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_DIR + (port * 0xC)) & ~(1 << pin),
@ -179,8 +168,7 @@ ifxmips_port_set_dir_in(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_dir_in);
int
ifxmips_port_set_output(unsigned int port, unsigned int pin)
int ifxmips_port_set_output(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OUT + (port * 0xC)) | (1 << pin),
@ -189,8 +177,7 @@ ifxmips_port_set_output(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_output);
int
ifxmips_port_clear_output(unsigned int port, unsigned int pin)
int ifxmips_port_clear_output(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OUT + (port * 0xC)) & ~(1 << pin),
@ -199,8 +186,7 @@ ifxmips_port_clear_output(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_clear_output);
int
ifxmips_port_get_input(unsigned int port, unsigned int pin)
int ifxmips_port_get_input(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
if (ifxmips_r32(IFXMIPS_GPIO_P0_IN + (port * 0xC)) & (1 << pin))
@ -210,8 +196,7 @@ ifxmips_port_get_input(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_get_input);
int
ifxmips_port_set_altsel0(unsigned int port, unsigned int pin)
int ifxmips_port_set_altsel0(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0xC)) | (1 << pin),
@ -220,8 +205,7 @@ ifxmips_port_set_altsel0(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_altsel0);
int
ifxmips_port_clear_altsel0(unsigned int port, unsigned int pin)
int ifxmips_port_clear_altsel0(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0xC)) & ~(1 << pin),
@ -230,8 +214,7 @@ ifxmips_port_clear_altsel0(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_clear_altsel0);
int
ifxmips_port_set_altsel1(unsigned int port, unsigned int pin)
int ifxmips_port_set_altsel1(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0xC)) | (1 << pin),
@ -240,8 +223,7 @@ ifxmips_port_set_altsel1(unsigned int port, unsigned int pin)
}
EXPORT_SYMBOL(ifxmips_port_set_altsel1);
int
ifxmips_port_clear_altsel1(unsigned int port, unsigned int pin)
int ifxmips_port_clear_altsel1(unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0xC)) & ~(1 << pin),
@ -251,16 +233,14 @@ ifxmips_port_clear_altsel1(unsigned int port, unsigned int pin)
EXPORT_SYMBOL(ifxmips_port_clear_altsel1);
#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN
static inline void
add_msg(struct sk_buff *skb, char *msg)
static inline void add_msg(struct sk_buff *skb, char *msg)
{
char *scratch;
scratch = skb_put(skb, strlen(msg) + 1);
sprintf(scratch, msg);
}
static void
hotplug_button(struct work_struct *wq)
static void hotplug_button(struct work_struct *wq)
{
struct sk_buff *skb;
struct event_t *event;
@ -296,24 +276,21 @@ done:
kfree(event);
}
static void
reset_button_poll(unsigned long unused)
static void reset_button_poll(unsigned long unused)
{
struct event_t *event;
rst_button_timer.expires = jiffies + (HZ / 4);
add_timer(&rst_button_timer);
if (pressed != ifxmips_port_get_input(rst_port, rst_pin))
{
if (pressed != ifxmips_port_get_input(rst_port, rst_pin)) {
if (pressed)
pressed = 0;
else
pressed = 1;
event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
if (!event)
{
printk("Could not alloc hotplug event\n");
event = kzalloc(sizeof(struct event_t), GFP_ATOMIC);
if (!event) {
printk(KERN_INFO "Could not alloc hotplug event\n");
return;
}
event->set = pressed;
@ -325,8 +302,7 @@ reset_button_poll(unsigned long unused)
}
#endif
static int
ifxmips_gpio_probe(struct platform_device *dev)
static int ifxmips_gpio_probe(struct platform_device *dev)
{
int retval = 0;
@ -346,8 +322,7 @@ ifxmips_gpio_probe(struct platform_device *dev)
return retval;
}
static int
ifxmips_gpio_remove(struct platform_device *pdev)
static int ifxmips_gpio_remove(struct platform_device *pdev)
{
#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN
del_timer_sync(&rst_button_timer);
@ -355,8 +330,7 @@ ifxmips_gpio_remove(struct platform_device *pdev)
return 0;
}
static struct
platform_driver ifxmips_gpio_driver = {
static struct platform_driver ifxmips_gpio_driver = {
.probe = ifxmips_gpio_probe,
.remove = ifxmips_gpio_remove,
.driver = {
@ -365,8 +339,7 @@ platform_driver ifxmips_gpio_driver = {
},
};
int __init
ifxmips_gpio_init(void)
int __init ifxmips_gpio_init(void)
{
int ret = platform_driver_register(&ifxmips_gpio_driver);
if (ret)
@ -374,8 +347,7 @@ ifxmips_gpio_init(void)
return ret;
}
void __exit
ifxmips_gpio_exit(void)
void __exit ifxmips_gpio_exit(void)
{
platform_driver_unregister(&ifxmips_gpio_driver);
}

View File

@ -21,21 +21,21 @@
#include <linux/version.h>
#include <asm/ifxmips/ifxmips.h>
void
ifxmips_pmu_enable(unsigned int module)
void ifxmips_pmu_enable(unsigned int module)
{
int err = 1000000;
ifxmips_w32(ifxmips_r32(IFXMIPS_PMU_PWDCR) & ~module, IFXMIPS_PMU_PWDCR);
while (--err && (ifxmips_r32(IFXMIPS_PMU_PWDSR) & module)) {}
ifxmips_w32(ifxmips_r32(IFXMIPS_PMU_PWDCR) & ~module,
IFXMIPS_PMU_PWDCR);
while (--err && (ifxmips_r32(IFXMIPS_PMU_PWDSR) & module))
;
if (!err)
panic("activating PMU module failed!");
}
EXPORT_SYMBOL(ifxmips_pmu_enable);
void
ifxmips_pmu_disable(unsigned int module)
void ifxmips_pmu_disable(unsigned int module)
{
ifxmips_w32(ifxmips_r32(IFXMIPS_PMU_PWDCR) | module, IFXMIPS_PMU_PWDCR);
}

View File

@ -26,11 +26,11 @@
static char buf[1024]; /* for prom_printf() */
/* for voice cpu (MIPS24K) */
unsigned int *prom_cp1_base = NULL;
unsigned int prom_cp1_size = 0;
unsigned int *prom_cp1_base;
unsigned int prom_cp1_size;
/* for Multithreading (APRP) on MIPS34K */
unsigned long physical_memsize = 0L;
unsigned long physical_memsize;
#ifdef IFXMIPS_PROM_ASC0
#define IFXMIPS_ASC_DIFF 0
@ -57,7 +57,8 @@ void prom_putchar(char c)
unsigned long flags;
local_irq_save(flags);
while((asc_r32(IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK) >> ASCFSTAT_TXFFLOFF);
while ((asc_r32(IFXMIPS_ASC_FSTAT) & ASCFSTAT_TXFFLMASK) >> ASCFSTAT_TXFFLOFF)
;
if (c == '\n')
asc_w32('\r', IFXMIPS_ASC_TBUF);
@ -107,8 +108,7 @@ void __init prom_init(void)
if (argc) {
argv = (char **)KSEG1ADDR((unsigned long)argv);
arcs_cmdline[0] = '\0';
for (i = 1; i < argc; i++)
{
for (i = 1; i < argc; i++) {
char *a = (char *)KSEG1ADDR(argv[i]);
if (!argv[i])
continue;
@ -130,18 +130,15 @@ void __init prom_init(void)
"console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit");
}
envp = (char **)KSEG1ADDR((unsigned long)envp);
while(*envp)
{
while (*envp) {
char *e = (char *)KSEG1ADDR(*envp);
if (!strncmp(e, "memsize=", 8))
{
if (!strncmp(e, "memsize=", 8)) {
e += 8;
memsize = simple_strtoul(e, NULL, 10);
}
envp++;
}
memsize *= 1024 * 1024;
/* only on Twinpass/Danube a second CPU is used for Voice */

View File

@ -18,9 +18,9 @@
#include <linux/kernel.h>
#include <linux/pm.h>
#include <asm/reboot.h>
#include <linux/reboot.h>
#include <linux/io.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/ifxmips/ifxmips.h>
static void ifxmips_machine_restart(char *command)
@ -28,22 +28,26 @@ static void ifxmips_machine_restart(char *command)
printk(KERN_NOTICE "System restart\n");
local_irq_disable();
ifxmips_w32(ifxmips_r32(IFXMIPS_RCU_RST) | IFXMIPS_RCU_RST_ALL, IFXMIPS_RCU_RST);
for(;;);
ifxmips_w32(ifxmips_r32(IFXMIPS_RCU_RST) | IFXMIPS_RCU_RST_ALL,
IFXMIPS_RCU_RST);
for (;;)
;
}
static void ifxmips_machine_halt(void)
{
printk(KERN_NOTICE "System halted.\n");
local_irq_disable();
for(;;);
for (;;)
;
}
static void ifxmips_machine_power_off(void)
{
printk(KERN_NOTICE "Please turn off the power now.\n");
local_irq_disable();
for(;;);
for (;;)
;
}
void ifxmips_reboot_setup(void)

View File

@ -19,11 +19,13 @@
#include <linux/init.h>
#include <asm/time.h>
#include <asm/traps.h>
#include <linux/time.h>
#include <linux/cpu.h>
#include <asm/traps.h>
#include <asm/irq.h>
#include <asm/bootinfo.h>
#include <asm/ifxmips/ifxmips.h>
#include <asm/ifxmips/ifxmips_irq.h>
#include <asm/ifxmips/ifxmips_pmu.h>

View File

@ -5,13 +5,14 @@
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/init.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
#include <asm/irq.h>
#include <asm/div64.h>
#include <linux/uaccess.h>
#include <linux/unistd.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/div64.h>
#include <asm/ifxmips/ifxmips.h>
#include <asm/ifxmips/ifxmips_irq.h>
#include <asm/ifxmips/ifxmips_cgu.h>
@ -34,13 +35,17 @@
/*
* Timer Interrupt (IRQ)
*/
#define TIMER_INTERRUPT INT_NUM_IM3_IRL0 + 22 // Must be adjusted when ICU driver is available
/* Must be adjusted when ICU driver is available */
#define TIMER_INTERRUPT (INT_NUM_IM3_IRL0 + 22)
/*
* Bits Operation
*/
#define GET_BITS(x, msb, lsb) (((x) & ((1 << ((msb) + 1)) - 1)) >> (lsb))
#define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
#define GET_BITS(x, msb, lsb) \
(((x) & ((1 << ((msb) + 1)) - 1)) >> (lsb))
#define SET_BITS(x, msb, lsb, value) \
(((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | \
(((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
/*
* GPTU Register Mapping
@ -48,10 +53,10 @@
#define IFXMIPS_GPTU (KSEG1 + 0x1E100A00)
#define IFXMIPS_GPTU_CLC ((volatile u32 *)(IFXMIPS_GPTU + 0x0000))
#define IFXMIPS_GPTU_ID ((volatile u32 *)(IFXMIPS_GPTU + 0x0008))
#define IFXMIPS_GPTU_CON(n, X) ((volatile u32*)(IFXMIPS_GPTU + 0x0010 + ((X) * 4) + ((n) - 1) * 0x0020)) // X must be either A or B
#define IFXMIPS_GPTU_RUN(n, X) ((volatile u32*)(IFXMIPS_GPTU + 0x0018 + ((X) * 4) + ((n) - 1) * 0x0020)) // X must be either A or B
#define IFXMIPS_GPTU_RELOAD(n, X) ((volatile u32*)(IFXMIPS_GPTU + 0x0020 + ((X) * 4) + ((n) - 1) * 0x0020)) // X must be either A or B
#define IFXMIPS_GPTU_COUNT(n, X) ((volatile u32*)(IFXMIPS_GPTU + 0x0028 + ((X) * 4) + ((n) - 1) * 0x0020)) // X must be either A or B
#define IFXMIPS_GPTU_CON(n, X) ((volatile u32 *)(IFXMIPS_GPTU + 0x0010 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */
#define IFXMIPS_GPTU_RUN(n, X) ((volatile u32 *)(IFXMIPS_GPTU + 0x0018 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */
#define IFXMIPS_GPTU_RELOAD(n, X) ((volatile u32 *)(IFXMIPS_GPTU + 0x0020 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */
#define IFXMIPS_GPTU_COUNT(n, X) ((volatile u32 *)(IFXMIPS_GPTU + 0x0028 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */
#define IFXMIPS_GPTU_IRNEN ((volatile u32 *)(IFXMIPS_GPTU + 0x00F4))
#define IFXMIPS_GPTU_IRNICR ((volatile u32 *)(IFXMIPS_GPTU + 0x00F8))
#define IFXMIPS_GPTU_IRNCR ((volatile u32 *)(IFXMIPS_GPTU + 0x00FC))
@ -92,7 +97,7 @@
#define GPTU_CON_SYNC(n, X) (*IFXMIPS_GPTU_CON(n, X) & (1 << 8))
#define GPTU_CON_EDGE(n, X) GET_BITS(*IFXMIPS_GPTU_CON(n, X), 7, 6)
#define GPTU_CON_INV(n, X) (*IFXMIPS_GPTU_CON(n, X) & (1 << 5))
#define GPTU_CON_EXT(n, X) (*IFXMIPS_GPTU_CON(n, A) & (1 << 4)) // Timer/Counter B does not have this bit
#define GPTU_CON_EXT(n, X) (*IFXMIPS_GPTU_CON(n, A) & (1 << 4)) /* Timer/Counter B does not have this bit */
#define GPTU_CON_STP(n, X) (*IFXMIPS_GPTU_CON(n, X) & (1 << 3))
#define GPTU_CON_CNT(n, X) (*IFXMIPS_GPTU_CON(n, X) & (1 << 2))
#define GPTU_CON_DIR(n, X) (*IFXMIPS_GPTU_CON(n, X) & (1 << 1))
@ -165,26 +170,24 @@ static struct miscdevice gptu_miscdev = {
static struct timer_dev timer_dev;
static irqreturn_t
timer_irq_handler(int irq, void *p)
static irqreturn_t timer_irq_handler(int irq, void *p)
{
unsigned int timer;
unsigned int flag;
struct timer_dev_timer *dev_timer = (struct timer_dev_timer *)p;
timer = irq - TIMER_INTERRUPT;
if(timer < timer_dev.number_of_timers && dev_timer == &timer_dev.timer[timer])
{
if (timer < timer_dev.number_of_timers
&& dev_timer == &timer_dev.timer[timer]) {
/* Clear interrupt. */
ifxmips_w32(1 << timer, IFXMIPS_GPTU_IRNCR);
/* Call user hanler or signal. */
flag = dev_timer->flag;
if (!(timer & 0x01) || TIMER_FLAG_MASK_SIZE (flag) == TIMER_FLAG_16BIT)
{ /* 16-bit timer or timer A of 32-bit timer */
switch(TIMER_FLAG_MASK_HANDLE (flag))
{
if (!(timer & 0x01)
|| TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT) {
/* 16-bit timer or timer A of 32-bit timer */
switch (TIMER_FLAG_MASK_HANDLE(flag)) {
case TIMER_FLAG_CALLBACK_IN_IRQ:
case TIMER_FLAG_CALLBACK_IN_HB:
if (dev_timer->arg1)
@ -199,34 +202,41 @@ timer_irq_handler(int irq, void *p)
return IRQ_HANDLED;
}
static inline void
ifxmips_enable_gptu(void)
static inline void ifxmips_enable_gptu(void)
{
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT);
/* Set divider as 1, disable write protection for SPEN, enable module. */
*IFXMIPS_GPTU_CLC =
GPTU_CLC_SMC_SET(0x00) | GPTU_CLC_RMC_SET(0x01) | GPTU_CLC_FSOE_SET(0) |
GPTU_CLC_SBWE_SET(1) | GPTU_CLC_EDIS_SET(0) | GPTU_CLC_SPEN_SET(0) | GPTU_CLC_DISR_SET(0);
GPTU_CLC_SMC_SET(0x00) |
GPTU_CLC_RMC_SET(0x01) |
GPTU_CLC_FSOE_SET(0) |
GPTU_CLC_SBWE_SET(1) |
GPTU_CLC_EDIS_SET(0) |
GPTU_CLC_SPEN_SET(0) |
GPTU_CLC_DISR_SET(0);
}
static inline void
ifxmips_disable_gptu(void)
static inline void ifxmips_disable_gptu(void)
{
ifxmips_w32(0x00, IFXMIPS_GPTU_IRNEN);
ifxmips_w32(0xfff, IFXMIPS_GPTU_IRNCR);
/* Set divider as 0, enable write protection for SPEN, disable module. */
*IFXMIPS_GPTU_CLC =
GPTU_CLC_SMC_SET (0x00) | GPTU_CLC_RMC_SET (0x00) | GPTU_CLC_FSOE_SET (0) |
GPTU_CLC_SBWE_SET (0) | GPTU_CLC_EDIS_SET (0) | GPTU_CLC_SPEN_SET (0) | GPTU_CLC_DISR_SET (1);
GPTU_CLC_SMC_SET(0x00) |
GPTU_CLC_RMC_SET(0x00) |
GPTU_CLC_FSOE_SET(0) |
GPTU_CLC_SBWE_SET(0) |
GPTU_CLC_EDIS_SET(0) |
GPTU_CLC_SPEN_SET(0) |
GPTU_CLC_DISR_SET(1);
ifxmips_pmu_disable(IFXMIPS_PMU_PWDCR_GPT);
}
int
ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value,
unsigned long arg1, unsigned long arg2)
int ifxmips_request_timer(unsigned int timer, unsigned int flag,
unsigned long value, unsigned long arg1, unsigned long arg2)
{
int ret = 0;
unsigned int con_reg, irnen_reg;
@ -235,7 +245,8 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
if (timer >= FIRST_TIMER + timer_dev.number_of_timers)
return -EINVAL;
printk(KERN_INFO "request_timer(%d, 0x%08X, %lu)...", (u32)timer, (u32)flag, value);
printk(KERN_INFO "request_timer(%d, 0x%08X, %lu)...",
timer, flag, value);
if (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT)
value &= 0xFFFF;
@ -250,7 +261,8 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
if (timer < FIRST_TIMER) {
unsigned int mask;
unsigned int shift;
unsigned int offset = TIMER2A;/* This takes care of TIMER1B which is the only choice for Voice TAPI system */
/* This takes care of TIMER1B which is the only choice for Voice TAPI system */
unsigned int offset = TIMER2A;
/*
* Pick up a free timer.
@ -258,8 +270,7 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
if (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT) {
mask = 1 << offset;
shift = 1;
}
else {
} else {
mask = 3 << offset;
shift = 2;
}
@ -274,11 +285,9 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
printk("failed![%d]\n", __LINE__);
mutex_unlock(&timer_dev.gptu_mutex);
return -EINVAL;
}
else
} else
ret = timer;
}
else {
} else {
register unsigned int mask;
/*
@ -286,11 +295,11 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
*/
mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer;
if ((timer_dev.occupation & mask)) {
printk("failed![%d] mask %#x, timer_dev.occupation %#x\n", __LINE__, mask, timer_dev.occupation);
printk("failed![%d] mask %#x, timer_dev.occupation %#x\n",
__LINE__, mask, timer_dev.occupation);
mutex_unlock(&timer_dev.gptu_mutex);
return -EBUSY;
}
else {
} else {
timer_dev.occupation |= mask;
ret = 0;
}
@ -380,8 +389,7 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
enable_irq(timer_dev.timer[timer - FIRST_TIMER].irq);
timer_dev.timer[timer - FIRST_TIMER].f_irq_on = 1;
}
}
else
} else
irnen_reg = 0;
/*
@ -391,16 +399,16 @@ ifxmips_request_timer(unsigned int timer, unsigned int flag, unsigned long value
X = timer & 0x01;
*IFXMIPS_GPTU_CON(n, X) = con_reg;
*IFXMIPS_GPTU_RELOAD(n, X) = value;
// printk("reload value = %d\n", (u32)value);
/* printk("reload value = %d\n", (u32)value); */
*IFXMIPS_GPTU_IRNEN |= irnen_reg;
mutex_unlock(&timer_dev.gptu_mutex);
printk("successful!\n");
return ret;
}
EXPORT_SYMBOL(ifxmips_request_timer);
int
ifxmips_free_timer(unsigned int timer)
int ifxmips_free_timer(unsigned int timer)
{
unsigned int flag;
unsigned int mask;
@ -419,8 +427,7 @@ ifxmips_free_timer(unsigned int timer)
timer &= ~0x01;
mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer;
if(((timer_dev.occupation & mask) ^ mask))
{
if (((timer_dev.occupation & mask) ^ mask)) {
mutex_unlock(&timer_dev.gptu_mutex);
return -EINVAL;
}
@ -440,8 +447,7 @@ ifxmips_free_timer(unsigned int timer)
}
timer_dev.occupation &= ~mask;
if(!timer_dev.occupation && timer_dev.f_gptu_on)
{
if (!timer_dev.occupation && timer_dev.f_gptu_on) {
ifxmips_disable_gptu();
timer_dev.f_gptu_on = 0;
}
@ -450,9 +456,9 @@ ifxmips_free_timer(unsigned int timer)
return 0;
}
EXPORT_SYMBOL(ifxmips_free_timer);
int
ifxmips_start_timer(unsigned int timer, int is_resume)
int ifxmips_start_timer(unsigned int timer, int is_resume)
{
unsigned int flag;
unsigned int mask;
@ -472,8 +478,7 @@ ifxmips_start_timer(unsigned int timer, int is_resume)
mask = (TIMER_FLAG_MASK_SIZE(flag) ==
TIMER_FLAG_16BIT ? 1 : 3) << timer;
if(((timer_dev.occupation & mask) ^ mask))
{
if (((timer_dev.occupation & mask) ^ mask)) {
mutex_unlock(&timer_dev.gptu_mutex);
return -EINVAL;
}
@ -487,9 +492,9 @@ ifxmips_start_timer(unsigned int timer, int is_resume)
return 0;
}
EXPORT_SYMBOL(ifxmips_start_timer);
int
ifxmips_stop_timer(unsigned int timer)
int ifxmips_stop_timer(unsigned int timer)
{
unsigned int flag;
unsigned int mask;
@ -509,8 +514,7 @@ ifxmips_stop_timer(unsigned int timer)
timer &= ~0x01;
mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer;
if(((timer_dev.occupation & mask) ^ mask))
{
if (((timer_dev.occupation & mask) ^ mask)) {
mutex_unlock(&timer_dev.gptu_mutex);
return -EINVAL;
}
@ -524,9 +528,9 @@ ifxmips_stop_timer(unsigned int timer)
return 0;
}
EXPORT_SYMBOL(ifxmips_stop_timer);
int
ifxmips_reset_counter_flags(u32 timer, u32 flags)
int ifxmips_reset_counter_flags(u32 timer, u32 flags)
{
unsigned int oflag;
unsigned int mask, con_reg;
@ -545,14 +549,12 @@ ifxmips_reset_counter_flags(u32 timer, u32 flags)
timer &= ~0x01;
mask = (TIMER_FLAG_MASK_SIZE(oflag) == TIMER_FLAG_16BIT ? 1 : 3) << timer;
if(((timer_dev.occupation & mask) ^ mask))
{
if (((timer_dev.occupation & mask) ^ mask)) {
mutex_unlock(&timer_dev.gptu_mutex);
return -EINVAL;
}
switch(TIMER_FLAG_MASK_EDGE (flags))
{
switch (TIMER_FLAG_MASK_EDGE(flags)) {
default:
case TIMER_FLAG_NONE_EDGE:
con_reg = GPTU_CON_EDGE_SET(0x00);
@ -593,10 +595,8 @@ ifxmips_reset_counter_flags(u32 timer, u32 flags)
}
EXPORT_SYMBOL(ifxmips_reset_counter_flags);
inline int
ifxmips_get_count_value(unsigned int timer, unsigned long *value)
int ifxmips_get_count_value(unsigned int timer, unsigned long *value)
{
unsigned int flag;
unsigned int mask;
int n, X;
@ -615,8 +615,7 @@ ifxmips_get_count_value(unsigned int timer, unsigned long *value)
timer &= ~0x01;
mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer;
if (((timer_dev.occupation & mask) ^ mask))
{
if (((timer_dev.occupation & mask) ^ mask)) {
mutex_unlock(&timer_dev.gptu_mutex);
return -EINVAL;
}
@ -630,9 +629,9 @@ ifxmips_get_count_value(unsigned int timer, unsigned long *value)
return 0;
}
EXPORT_SYMBOL(ifxmips_get_count_value);
u32
ifxmips_cal_divider(unsigned long freq)
u32 ifxmips_cal_divider(unsigned long freq)
{
u64 module_freq, fpi = cgu_get_fpi_bus_clock(2);
u32 clock_divider = 1;
@ -640,9 +639,9 @@ ifxmips_cal_divider(unsigned long freq)
do_div(module_freq, clock_divider * freq);
return module_freq;
}
EXPORT_SYMBOL(ifxmips_cal_divider);
int
ifxmips_set_timer (unsigned int timer, unsigned int freq, int is_cyclic,
int ifxmips_set_timer(unsigned int timer, unsigned int freq, int is_cyclic,
int is_ext_src, unsigned int handle_flag, unsigned long arg1,
unsigned long arg2)
{
@ -658,19 +657,21 @@ ifxmips_set_timer (unsigned int timer, unsigned int freq, int is_cyclic,
| TIMER_FLAG_TIMER | TIMER_FLAG_DOWN
| TIMER_FLAG_MASK_HANDLE(handle_flag);
printk(KERN_INFO "set_timer(%d, %d), divider = %lu\n", timer, freq, divider);
printk(KERN_INFO "ifxmips_set_timer(%d, %d), divider = %lu\n",
timer, freq, divider);
return ifxmips_request_timer(timer, flag, divider, arg1, arg2);
}
EXPORT_SYMBOL(ifxmips_set_timer);
int
ifxmips_set_counter(unsigned int timer, unsigned int flag, u32 reload, unsigned long arg1, unsigned long arg2)
int ifxmips_set_counter(unsigned int timer, unsigned int flag, u32 reload,
unsigned long arg1, unsigned long arg2)
{
printk(KERN_INFO "set_counter(%d, %#x, %d)\n", timer, flag, reload);
printk(KERN_INFO "ifxmips_set_counter(%d, %#x, %d)\n", timer, flag, reload);
return ifxmips_request_timer(timer, flag, reload, arg1, arg2);
}
EXPORT_SYMBOL(ifxmips_set_counter);
static int
gptu_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
static int gptu_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
unsigned long arg)
{
int ret;
@ -757,19 +758,17 @@ gptu_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
return ret;
}
static int
gptu_open(struct inode *inode, struct file *file)
static int gptu_open(struct inode *inode, struct file *file)
{
return 0;
}
static int
gptu_release(struct inode *inode, struct file *file)
static int gptu_release(struct inode *inode, struct file *file)
{
return 0;
}
int __init
ifxmips_gptu_init(void)
int __init ifxmips_gptu_init(void)
{
int ret;
unsigned int i;
@ -788,19 +787,16 @@ ifxmips_gptu_init(void)
printk(KERN_INFO "gptu: totally %d 16-bit timers/counters\n", timer_dev.number_of_timers);
ret = misc_register(&gptu_miscdev);
if(ret)
{
if (ret) {
printk(KERN_ERR "gptu: can't misc_register, get error %d\n", -ret);
return ret;
} else {
printk(KERN_INFO "gptu: misc_register on minor %d\n", gptu_miscdev.minor);
}
for(i = 0; i < timer_dev.number_of_timers; i++)
{
for (i = 0; i < timer_dev.number_of_timers; i++) {
ret = request_irq(TIMER_INTERRUPT + i, timer_irq_handler, IRQF_TIMER, gptu_miscdev.name, &timer_dev.timer[i]);
if(ret)
{
if (ret) {
for (; i >= 0; i--)
free_irq(TIMER_INTERRUPT + i, &timer_dev.timer[i]);
misc_deregister(&gptu_miscdev);
@ -816,13 +812,11 @@ ifxmips_gptu_init(void)
return 0;
}
void __exit
ifxmips_gptu_exit(void)
void __exit ifxmips_gptu_exit(void)
{
unsigned int i;
for(i = 0; i < timer_dev.number_of_timers; i++)
{
for (i = 0; i < timer_dev.number_of_timers; i++) {
if (timer_dev.timer[i].f_irq_on)
disable_irq(timer_dev.timer[i].irq);
free_irq(timer_dev.timer[i].irq, &timer_dev.timer[i]);
@ -831,14 +825,5 @@ ifxmips_gptu_exit(void)
misc_deregister(&gptu_miscdev);
}
EXPORT_SYMBOL(ifxmips_request_timer);
EXPORT_SYMBOL(ifxmips_free_timer);
EXPORT_SYMBOL(ifxmips_start_timer);
EXPORT_SYMBOL(ifxmips_stop_timer);
EXPORT_SYMBOL(ifxmips_get_count_value);
EXPORT_SYMBOL(ifxmips_cal_divider);
EXPORT_SYMBOL(ifxmips_set_timer);
EXPORT_SYMBOL(ifxmips_set_counter);
module_init(ifxmips_gptu_init);
module_exit(ifxmips_gptu_exit);

View File

@ -1251,24 +1251,13 @@ static int ssc_session(char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
else
eff_size = tx_len;
//4 bytes alignment, required by driver
/* change by TaiCheng */
//if (in_irq()){
if (1) {
/* 4 bytes alignment, required by driver */
ssc_tx_buf = kmalloc(sizeof(char) *
((eff_size + 3) & (~3)),
GFP_ATOMIC);
ssc_rx_buf = kmalloc(sizeof(char) *
((eff_size + 3) & (~3)),
GFP_ATOMIC);
} else {
ssc_tx_buf = kmalloc(sizeof(char) *
((eff_size + 3) & (~3)),
GFP_KERNEL);
ssc_rx_buf = kmalloc(sizeof(char) *
((eff_size + 3) & (~3)),
GFP_KERNEL);
}
if (ssc_tx_buf == NULL || ssc_rx_buf == NULL) {
printk("no memory for size of %d\n", eff_size);
ret = -ENOMEM;

View File

@ -37,8 +37,11 @@
#define DRVNAME "ifxmips_led"
#if 1
#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_FALLING
//#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING
#else
#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING
#endif
#define IFXMIPS_LED_SPEED IFXMIPS_LED_8HZ
@ -79,9 +82,11 @@ void ifxmips_led_blink_clear (unsigned int led)
}
EXPORT_SYMBOL(ifxmips_led_blink_clear);
void ifxmips_ledapi_set(struct led_classdev *led_cdev, enum led_brightness value)
static void ifxmips_ledapi_set(struct led_classdev *led_cdev,
enum led_brightness value)
{
struct ifxmips_led *led_dev = container_of(led_cdev, struct ifxmips_led, cdev);
struct ifxmips_led *led_dev =
container_of(led_cdev, struct ifxmips_led, cdev);
if (value)
ifxmips_led_set(1 << led_dev->bit);
@ -115,28 +120,36 @@ static int ifxmips_led_probe(struct platform_device *dev)
ifxmips_w32(0, IFXMIPS_LED_CON1);
/* setup the clock edge that the shift register is triggered on */
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & ~IFXMIPS_LED_EDGE_MASK, IFXMIPS_LED_CON0);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_CLK_EDGE, IFXMIPS_LED_CON0);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) & ~IFXMIPS_LED_EDGE_MASK,
IFXMIPS_LED_CON0);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_CLK_EDGE,
IFXMIPS_LED_CON0);
/* per default leds 15-0 are set */
ifxmips_w32(IFXMIPS_LED_GROUP1 | IFXMIPS_LED_GROUP0, IFXMIPS_LED_CON1);
/* leds are update periodically by the FPID */
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_UPD_MASK, IFXMIPS_LED_CON1);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_UPD_SRC_FPI, IFXMIPS_LED_CON1);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_UPD_MASK,
IFXMIPS_LED_CON1);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_UPD_SRC_FPI,
IFXMIPS_LED_CON1);
/* set led update speed */
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_MASK, IFXMIPS_LED_CON1);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_SPEED, IFXMIPS_LED_CON1);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) & ~IFXMIPS_LED_MASK,
IFXMIPS_LED_CON1);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON1) | IFXMIPS_LED_SPEED,
IFXMIPS_LED_CON1);
/* adsl 0 and 1 leds are updated by the arc */
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC, IFXMIPS_LED_CON0);
ifxmips_w32(ifxmips_r32(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC,
IFXMIPS_LED_CON0);
/* per default, the leds are turned on */
ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
for (i = 0; i < IFXMIPS_MAX_LED; i++) {
struct ifxmips_led *tmp = kzalloc(sizeof(struct ifxmips_led), GFP_KERNEL);
struct ifxmips_led *tmp =
kzalloc(sizeof(struct ifxmips_led), GFP_KERNEL);
tmp->cdev.brightness_set = ifxmips_ledapi_set;
tmp->cdev.name = kmalloc(sizeof("ifxmips:led:00"), GFP_KERNEL);
sprintf((char *)tmp->cdev.name, "ifxmips:led:%02d", i);
@ -166,7 +179,8 @@ int __init ifxmips_led_init (void)
{
int ret = platform_driver_register(&ifxmips_led_driver);
if (ret)
printk(KERN_INFO "ifxmips_led: Error registering platfom driver!");
printk(KERN_INFO
"ifxmips_led: Error registering platfom driver!");
return ret;
}

View File

@ -55,7 +55,8 @@ void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data)
((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
phy_data;
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST);
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
;
ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
}
EXPORT_SYMBOL(ifxmips_write_mdio);
@ -66,9 +67,11 @@ unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg)
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
;
ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) ;
while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
;
val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
return val;
}

View File

@ -23,36 +23,35 @@
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/platform_device.h>
#include <asm/uaccess.h>
#include <asm-mips/ifxmips/ifxmips_cgu.h>
#include <asm-mips/ifxmips/ifxmips.h>
#include <linux/uaccess.h>
#include <asm/ifxmips/ifxmips_cgu.h>
#include <asm/ifxmips/ifxmips.h>
#define IFXMIPS_WDT_PW1 0x00BE0000
#define IFXMIPS_WDT_PW2 0x00DC0000
#ifndef CONFIG_WATCHDOG_NOWAYOUT
static int wdt_ok_to_close = 0;
static int wdt_ok_to_close;
#endif
int wdt_timeout = 30;
static int wdt_timeout = 30;
int
ifxmips_wdt_enable(unsigned int timeout)
int ifxmips_wdt_enable(unsigned int timeout)
{
u32 fpi;
fpi = cgu_get_io_region_clock();
ifxmips_w32(IFXMIPS_WDT_PW1, IFXMIPS_BIU_WDT_CR);
ifxmips_w32(IFXMIPS_WDT_PW2 |
(0x3 << 26) | // PWL
(0x3 << 24) | // CLKDIV
(0x1 << 31) | // enable
((timeout * (fpi / 0x40000)) + 0x1000), // reload
(0x3 << 26) | /* PWL */
(0x3 << 24) | /* CLKDIV */
(0x1 << 31) | /* enable */
((timeout * (fpi / 0x40000)) + 0x1000), /* reload */
IFXMIPS_BIU_WDT_CR);
return 0;
}
void
ifxmips_wdt_disable(void)
void ifxmips_wdt_disable(void)
{
#ifndef CONFIG_WATCHDOG_NOWAYOUT
wdt_ok_to_close = 0;
@ -61,9 +60,8 @@ ifxmips_wdt_disable(void)
ifxmips_w32(IFXMIPS_WDT_PW2, IFXMIPS_BIU_WDT_CR);
}
static ssize_t
ifxmips_wdt_write(struct file *file, const char __user *data, size_t len,
loff_t *ppos)
static ssize_t ifxmips_wdt_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
size_t i;
@ -71,8 +69,7 @@ ifxmips_wdt_write(struct file *file, const char __user *data, size_t len,
return 0;
#ifndef CONFIG_WATCHDOG_NOWAYOUT
for(i = 0; i != len; i++)
{
for (i = 0; i != len; i++) {
char c;
if (get_user(c, data + i))
return -EFAULT;
@ -89,14 +86,12 @@ static struct watchdog_info ident = {
.identity = "ifxmips Watchdog",
};
static int
ifxmips_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
unsigned long arg)
static int ifxmips_wdt_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg)
{
int ret = -ENOTTY;
switch(cmd)
{
switch (cmd) {
case WDIOC_GETSUPPORT:
ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
sizeof(ident)) ? -EFAULT : 0;
@ -118,8 +113,7 @@ ifxmips_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
return ret;
}
static int
ifxmips_wdt_open(struct inode *inode, struct file *file)
static int ifxmips_wdt_open(struct inode *inode, struct file *file)
{
ifxmips_wdt_enable(wdt_timeout);
return nonseekable_open(inode, file);
@ -132,7 +126,8 @@ static int ifxmips_wdt_release(struct inode *inode, struct file *file)
ifxmips_wdt_disable();
else
#endif
printk("ifxmips_wdt: watchdog closed without warning, rebooting system\n");
printk(KERN_ERR "ifxmips_wdt: watchdog closed without warning,"
" rebooting system\n");
return 0;
}
@ -150,20 +145,18 @@ static struct miscdevice ifxmips_wdt_miscdev = {
.fops = &ifxmips_wdt_fops,
};
static int
ifxmips_wdt_probe(struct platform_device *dev)
static int ifxmips_wdt_probe(struct platform_device *dev)
{
int err;
err = misc_register(&ifxmips_wdt_miscdev);
if (err)
printk("ifxmips_wdt: error creating device\n");
printk(KERN_INFO "ifxmips_wdt: error creating device\n");
else
printk("ifxmips_wdt: loaded\n");
printk(KERN_INFO "ifxmips_wdt: loaded\n");
return err;
}
static int
ifxmips_wdt_remove(struct platform_device *dev)
static int ifxmips_wdt_remove(struct platform_device *dev)
{
ifxmips_wdt_disable();
misc_deregister(&ifxmips_wdt_miscdev);
@ -180,8 +173,7 @@ static struct platform_driver ifxmips_wdt_driver = {
},
};
static int __init
init_ifxmips_wdt(void)
static int __init init_ifxmips_wdt(void)
{
int ret = platform_driver_register(&ifxmips_wdt_driver);
if (ret)
@ -189,8 +181,7 @@ init_ifxmips_wdt(void)
return ret;
}
static void __exit
exit_ifxmips_wdt(void)
static void __exit exit_ifxmips_wdt(void)
{
platform_driver_unregister(&ifxmips_wdt_driver);
}

View File

@ -56,16 +56,16 @@ enum attr_t{
#define IFXMIPS_DMA_RX -1
#define IFXMIPS_DMA_TX 1
typedef struct dma_chan_map {
struct dma_chan_map {
const char *dev_name;
enum attr_t dir;
int pri;
int irq;
int rel_chan_no;
} _dma_chan_map;
};
#ifdef CONFIG_CPU_LITTLE_ENDIAN
typedef struct rx_desc{
struct rx_desc {
u32 data_length:16;
volatile u32 reserved:7;
volatile u32 byte_offset:2;
@ -74,11 +74,10 @@ typedef struct rx_desc{
volatile u32 Res:1;
volatile u32 C:1;
volatile u32 OWN:1;
volatile u32 Data_Pointer;
/* fix me:should be 28 bits here, 32 bits just for host simulation purpose */
}_rx_desc;
volatile u32 Data_Pointer; /* fixme: should be 28 bits here */
};
typedef struct tx_desc{
struct tx_desc {
volatile u32 data_length:16;
volatile u32 reserved1:7;
volatile u32 byte_offset:5;
@ -87,13 +86,11 @@ typedef struct tx_desc{
volatile u32 C:1;
volatile u32 OWN:1;
volatile u32 Data_Pointer; /* fixme: should be 28 bits here */
}_tx_desc;
};
#else /* BIG */
typedef struct rx_desc{
union
{
struct
{
struct rx_desc {
union {
struct {
volatile u32 OWN:1;
volatile u32 C:1;
volatile u32 SoP:1;
@ -106,13 +103,11 @@ typedef struct rx_desc{
volatile u32 word;
} status;
volatile u32 Data_Pointer;
}_rx_desc;
};
typedef struct tx_desc{
union
{
struct
{
struct tx_desc {
union {
struct {
volatile u32 OWN:1;
volatile u32 C:1;
volatile u32 SoP:1;
@ -124,10 +119,10 @@ typedef struct tx_desc{
volatile u32 word;
} status;
volatile u32 Data_Pointer;
}_tx_desc;
#endif //ENDIAN
};
#endif /* ENDIAN */
typedef struct dma_channel_info{
struct dma_channel_info {
/* relative channel number */
int rel_chan_no;
/* class for this channel for QoS */
@ -150,7 +145,7 @@ typedef struct dma_channel_info{
int burst_len;
/* on or off of this channel */
int control;
/**optional information for the upper layer devices*/
/* optional information for the upper layer devices */
#if defined(CONFIG_IFXMIPS_ETHERNET_D2) || defined(CONFIG_IFXMIPS_PPA)
void *opt[64];
#else
@ -164,11 +159,11 @@ typedef struct dma_channel_info{
void (*reset)(struct dma_channel_info *pCh);
void (*enable_irq)(struct dma_channel_info *pCh);
void (*disable_irq)(struct dma_channel_info *pCh);
}_dma_channel_info;
};
typedef struct dma_device_info{
struct dma_device_info {
/* device name of this peripheral */
char device_name[15];
const char *device_name;
int reserved;
int tx_burst_len;
int rx_burst_len;
@ -179,25 +174,22 @@ typedef struct dma_device_info{
int num_rx_chan;
int max_rx_chan_num;
int max_tx_chan_num;
_dma_channel_info* tx_chan[20];
_dma_channel_info* rx_chan[20];
struct dma_channel_info *tx_chan[20];
struct dma_channel_info *rx_chan[20];
/*functions, optional*/
u8 *(*buffer_alloc)(int len, int *offset, void **opt);
void (*buffer_free)(u8 *dataptr, void *opt);
int (*intr_handler)(struct dma_device_info *info, int status);
void *priv; /* used by peripheral driver only */
}_dma_device_info;
_dma_device_info* dma_device_reserve(char* dev_name);
void dma_device_release(_dma_device_info* dev);
void dma_device_register(_dma_device_info* info);
void dma_device_unregister(_dma_device_info* info);
};
struct dma_device_info *dma_device_reserve(char *dev_name);
void dma_device_release(struct dma_device_info *dev);
void dma_device_register(struct dma_device_info *info);
void dma_device_unregister(struct dma_device_info *info);
int dma_device_read(struct dma_device_info *info, u8 **dataptr, void **opt);
int dma_device_write(struct dma_device_info *info, u8 *dataptr, int len,
void *opt);
int dma_device_write(struct dma_device_info* info, u8* dataptr, int len, void* opt);
#endif

View File

@ -141,21 +141,15 @@ struct gptu_ioctl_param {
*/
typedef void (*timer_callback)(unsigned long arg);
#if defined(__KERNEL__)
extern int ifxmips_request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long);
xtern int ifxmips_request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long);
extern int ifxmips_free_timer(unsigned int);
extern int ifxmips_start_timer(unsigned int, int);
extern int ifxmips_stop_timer(unsigned int);
extern int ifxmips_reset_counter_flags(u32 timer, u32 flags);
extern int ifxmips_get_count_value(unsigned int, unsigned long *);
extern u32 ifxmips_cal_divider(unsigned long);
extern int ifxmips_set_timer(unsigned int, unsigned int, int, int, unsigned int, unsigned long, unsigned long);
extern int ifxmips_set_counter(unsigned int timer, unsigned int flag,
u32 reload, unsigned long arg1, unsigned long arg2);
extern u32 cal_divider(unsigned long);
extern int set_timer(unsigned int, unsigned int, int, int, unsigned int, unsigned long, unsigned long);
extern int set_counter (unsigned int timer, unsigned int flag, u32 reload, unsigned long arg1, unsigned long arg2);
// extern int set_counter(unsigned int, int, int, int, unsigned int, unsigned int, unsigned long, unsigned long);
#endif // defined(__KERNEL__)
#endif // __DANUBE_GPTU_DEV_H__2005_07_26__10_19__
#endif /* __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ */

View File

@ -28,7 +28,8 @@
#define GPIO_TO_PORT(x) ((x > 15) ? (1) : (0))
#define GPIO_TO_GPIO(x) ((x > 15) ? (x-16) : (x))
static inline int gpio_direction_input(unsigned gpio) {
static inline int gpio_direction_input(unsigned gpio)
{
ifxmips_port_set_open_drain(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
ifxmips_port_clear_altsel0(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
ifxmips_port_clear_altsel1(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
@ -36,7 +37,8 @@ static inline int gpio_direction_input(unsigned gpio) {
return 0;
}
static inline int gpio_direction_output(unsigned gpio, int value) {
static inline int gpio_direction_output(unsigned gpio, int value)
{
ifxmips_port_clear_open_drain(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
ifxmips_port_clear_altsel0(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
ifxmips_port_clear_altsel1(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
@ -44,43 +46,53 @@ static inline int gpio_direction_output(unsigned gpio, int value) {
return 0;
}
static inline int gpio_get_value(unsigned gpio) {
static inline int gpio_get_value(unsigned gpio)
{
ifxmips_port_get_input(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
return 0;
}
static inline void gpio_set_value(unsigned gpio, int value) {
static inline void gpio_set_value(unsigned gpio, int value)
{
if (value)
ifxmips_port_set_output(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
else
ifxmips_port_clear_output(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio));
ifxmips_port_clear_output(GPIO_TO_PORT(gpio),
GPIO_TO_GPIO(gpio));
}
static inline int gpio_request(unsigned gpio, const char *label) {
static inline int gpio_request(unsigned gpio, const char *label)
{
return 0;
}
static inline void gpio_free(unsigned gpio) {
static inline void gpio_free(unsigned gpio)
{
}
static inline int gpio_to_irq(unsigned gpio) {
static inline int gpio_to_irq(unsigned gpio)
{
return 0;
}
static inline int irq_to_gpio(unsigned irq) {
static inline int irq_to_gpio(unsigned irq)
{
return 0;
}
static inline int gpio_cansleep(unsigned gpio) {
static inline int gpio_cansleep(unsigned gpio)
{
return 0;
}
static inline int gpio_get_value_cansleep(unsigned gpio) {
static inline int gpio_get_value_cansleep(unsigned gpio)
{
might_sleep();
return gpio_get_value(gpio);
}
static inline void gpio_set_value_cansleep(unsigned gpio, int value) {
static inline void gpio_set_value_cansleep(unsigned gpio, int value)
{
might_sleep();
gpio_set_value(gpio, value);
}

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@ -26,4 +26,3 @@
#include_next <irq.h>
#endif