mirror of https://github.com/hak5/openwrt.git
kernel: fix DMA error when BCM4331 is connected to BCM4706
The BCM4331 supports a PCIe max request size of 512 bytes and uses that, but the PCIe controller in the BCM4706 just supports 128 Bytes and that causes a DMA error for packages bigger than 126 bytes. This fixes the problem by setting the BCM4331 also to 128 Bytes. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 37709lede-17.01
parent
9257d556c2
commit
9d4145efe5
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@ -0,0 +1,84 @@
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brcmsmac: use bcma PCIe up and down functions
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replace the calls to bcma_core_pci_extend_L1timer() by calls to the
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newly introduced bcma_core_pci_ip() and bcma_core_pci_down()
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
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+++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
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@@ -679,27 +679,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en
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return mode == BCMA_CLKMODE_FAST;
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}
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-void ai_pci_up(struct si_pub *sih)
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-{
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- struct si_info *sii;
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-
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- sii = container_of(sih, struct si_info, pub);
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-
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- if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
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- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true);
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-}
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-
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-/* Unconfigure and/or apply various WARs when going down */
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-void ai_pci_down(struct si_pub *sih)
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-{
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- struct si_info *sii;
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-
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- sii = container_of(sih, struct si_info, pub);
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-
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- if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
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- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false);
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-}
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-
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/* Enable BT-COEX & Ex-PA for 4313 */
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void ai_epa_4313war(struct si_pub *sih)
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{
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--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
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+++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
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@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st
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extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode);
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extern bool ai_deviceremoved(struct si_pub *sih);
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-extern void ai_pci_down(struct si_pub *sih);
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-extern void ai_pci_up(struct si_pub *sih);
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-
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/* Enable Ex-PA for 4313 */
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extern void ai_epa_4313war(struct si_pub *sih);
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--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
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+++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
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@@ -4667,7 +4667,7 @@ static int brcms_b_attach(struct brcms_c
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brcms_c_coredisable(wlc_hw);
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/* Match driver "down" state */
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- ai_pci_down(wlc_hw->sih);
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+ bcma_core_pci_down(wlc_hw->d11core->bus);
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/* turn off pll and xtal to match driver "down" state */
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brcms_b_xtal(wlc_hw, OFF);
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@@ -5010,12 +5010,12 @@ static int brcms_b_up_prep(struct brcms_
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*/
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if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
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/* put SB PCI in down state again */
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- ai_pci_down(wlc_hw->sih);
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+ bcma_core_pci_down(wlc_hw->d11core->bus);
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brcms_b_xtal(wlc_hw, OFF);
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return -ENOMEDIUM;
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}
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- ai_pci_up(wlc_hw->sih);
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+ bcma_core_pci_up(wlc_hw->d11core->bus);
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/* reset the d11 core */
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brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
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@@ -5212,7 +5212,7 @@ static int brcms_b_down_finish(struct br
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/* turn off primary xtal and pll */
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if (!wlc_hw->noreset) {
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- ai_pci_down(wlc_hw->sih);
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+ bcma_core_pci_down(wlc_hw->d11core->bus);
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brcms_b_xtal(wlc_hw, OFF);
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}
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}
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@ -0,0 +1,36 @@
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b43: call PCIe up and down functions
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Tell the PCIe host core when the wifi is activated.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/net/wireless/b43/main.c
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+++ b/drivers/net/wireless/b43/main.c
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@@ -4670,6 +4670,19 @@ static void b43_wireless_core_exit(struc
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN,
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B43_MACCTL_PSM_JMP0);
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+ switch (dev->dev->bus_type) {
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+#ifdef CPTCFG_B43_BCMA
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+ case B43_BUS_BCMA:
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+ bcma_core_pci_down(dev->dev->bdev->bus);
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+ break;
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+#endif
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+#ifdef CPTCFG_B43_SSB
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+ case B43_BUS_SSB:
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+ /* TODO */
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+ break;
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+#endif
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+ }
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+
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b43_dma_free(dev);
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b43_pio_free(dev);
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b43_chip_exit(dev);
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@@ -4709,6 +4722,7 @@ static int b43_wireless_core_init(struct
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case B43_BUS_BCMA:
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bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci[0],
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dev->dev->bdev, true);
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+ bcma_core_pci_up(dev->dev->bdev->bus);
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break;
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#endif
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#ifdef CPTCFG_B43_SSB
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@ -0,0 +1,167 @@
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bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
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called by b43 and brcmsmac
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/bcma/driver_pci.c
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+++ b/drivers/bcma/driver_pci.c
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@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
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pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
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}
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-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
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+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
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{
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u32 v;
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int i;
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@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
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}
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}
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-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
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+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
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{
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int max_retries = 10;
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u16 ret = 0;
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@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
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return ret;
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}
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-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
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+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
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u8 address, u16 data)
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{
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int max_retries = 10;
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@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
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pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
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}
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+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
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+ u8 address, u16 data)
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+{
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+ bcma_pcie_mdio_write(pc, device, address, data);
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+ return bcma_pcie_mdio_read(pc, device, address);
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+}
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+
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/**************************************************
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* Workarounds.
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**************************************************/
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@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
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}
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}
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+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
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+{
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+ u16 data;
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+
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+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
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+ data = up ? 0x74 : 0x7C;
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
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+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
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+ data = up ? 0x75 : 0x7D;
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
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+ }
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+}
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+
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/**************************************************
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* Init.
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**************************************************/
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@@ -262,7 +288,7 @@ out:
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}
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EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
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-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
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+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
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{
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u32 w;
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@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
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bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
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bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
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}
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-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
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+
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+void bcma_core_pci_up(struct bcma_bus *bus)
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+{
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+ struct bcma_drv_pci *pc;
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+
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+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
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+ return;
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+
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+ pc = &bus->drv_pci[0];
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+
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+ bcma_core_pci_power_save(pc, true);
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+
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+ bcma_core_pci_extend_L1timer(pc, true);
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+
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+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
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+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
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+ pcie_set_readrq(bus->host_pci, 128);
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+ }
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+}
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+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
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+
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+void bcma_core_pci_down(struct bcma_bus *bus)
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+{
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+ struct bcma_drv_pci *pc;
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+
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+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
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+ return;
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+
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+ pc = &bus->drv_pci[0];
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+
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+ bcma_core_pci_extend_L1timer(pc, false);
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+
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+ bcma_core_pci_power_save(pc, false);
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+}
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+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
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--- a/include/linux/bcma/bcma_driver_pci.h
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+++ b/include/linux/bcma/bcma_driver_pci.h
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@@ -181,10 +181,31 @@ struct pci_dev;
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#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
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+#define BCMA_CORE_PCI_
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+
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+/* MDIO devices (SERDES modules) */
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+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
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+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
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+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
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+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
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+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
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+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
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+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
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+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
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+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
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+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
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+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
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+
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/* PCIE Root Capability Register bits (Host mode only) */
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#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
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struct bcma_drv_pci;
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+struct bcma_bus;
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#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
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struct bcma_drv_pci_host {
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@@ -219,7 +240,8 @@ struct bcma_drv_pci {
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extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
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extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
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struct bcma_device *core, bool enable);
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-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
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+extern void bcma_core_pci_up(struct bcma_bus *bus);
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+extern void bcma_core_pci_down(struct bcma_bus *bus);
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extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
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extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
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@ -0,0 +1,167 @@
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bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
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called by b43 and brcmsmac
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/bcma/driver_pci.c
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+++ b/drivers/bcma/driver_pci.c
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@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
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pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
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}
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-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
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+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
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{
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u32 v;
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int i;
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@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
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}
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}
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-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
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+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
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{
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int max_retries = 10;
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u16 ret = 0;
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@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
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return ret;
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}
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-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
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+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
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u8 address, u16 data)
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{
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int max_retries = 10;
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@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
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pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
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}
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+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
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+ u8 address, u16 data)
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+{
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+ bcma_pcie_mdio_write(pc, device, address, data);
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+ return bcma_pcie_mdio_read(pc, device, address);
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+}
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+
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/**************************************************
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* Workarounds.
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**************************************************/
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@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
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}
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}
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+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
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+{
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+ u16 data;
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+
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+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
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+ data = up ? 0x74 : 0x7C;
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
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+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
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+ data = up ? 0x75 : 0x7D;
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
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+ }
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+}
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+
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/**************************************************
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* Init.
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**************************************************/
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@@ -262,7 +288,7 @@ out:
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}
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EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
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-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
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+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
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{
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u32 w;
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@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
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bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
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bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
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}
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-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
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+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
|
@ -0,0 +1,167 @@
|
|||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
|
@ -0,0 +1,167 @@
|
|||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
|
@ -0,0 +1,167 @@
|
|||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
Loading…
Reference in New Issue