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kernel: bump 4.14 to 4.14.161 

Refreshed all patches.

Compile-tested on: ipq40xx, ramips
Runtime-tested on: ipq40xx

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
master
Hauke Mehrtens 2020-01-02 20:27:55 +01:00
parent 32e4eaef1b
commit 9a417fbd0d
15 changed files with 108 additions and 108 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/kernel-version.mk
View File

@ -7,11 +7,11 @@ ifdef CONFIG_TESTING_KERNEL
endif
LINUX_VERSION-4.9 = .207
LINUX_VERSION-4.14 = .160
LINUX_VERSION-4.14 = .161
LINUX_VERSION-4.19 = .91
LINUX_KERNEL_HASH-4.9.207 = ca86637e7b5bec65eeb7da695824e0e8aca5ba52eb742885f0b7241977400124
LINUX_KERNEL_HASH-4.14.160 = c60326bad1bcdede514ca8a0bb96843fa7578ef00829cced6218b888b2efa92c
LINUX_KERNEL_HASH-4.14.161 = 9d23629f50e6c7313c4f1277455137b7727a6117df931c4c4fb7fab7e98f81c9
LINUX_KERNEL_HASH-4.19.91 = f403c3dee12ded0af1889c78871abf7a531a978ba423f1ca772de702a92c3447
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))

2
target/linux/generic/pending-4.14/130-add-linux-spidev-compatible-si3210.patch
View File

@ -8,7 +8,7 @@ Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -669,6 +669,7 @@ static const struct of_device_id spidev_
@@ -672,6 +672,7 @@ static const struct of_device_id spidev_
{ .compatible = "lineartechnology,ltc2488" },
{ .compatible = "ge,achc" },
{ .compatible = "semtech,sx1301" },

16
target/linux/generic/pending-4.14/630-packet_socket_type.patch
View File

@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#define PACKET_FANOUT_LB 1
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -1829,6 +1829,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1830,6 +1830,7 @@ static int packet_rcv_spkt(struct sk_buf
{
struct sock *sk;
struct sockaddr_pkt *spkt;
@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* When we registered the protocol we saved the socket in the data
@@ -1836,6 +1837,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1837,6 +1838,7 @@ static int packet_rcv_spkt(struct sk_buf
*/
sk = pt->af_packet_priv;
@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* Yank back the headers [hope the device set this
@@ -1848,7 +1850,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1849,7 +1851,7 @@ static int packet_rcv_spkt(struct sk_buf
* so that this procedure is noop.
*/
@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
goto out;
if (!net_eq(dev_net(dev), sock_net(sk)))
@@ -2075,12 +2077,12 @@ static int packet_rcv(struct sk_buff *sk
@@ -2076,12 +2078,12 @@ static int packet_rcv(struct sk_buff *sk
unsigned int snaplen, res;
bool is_drop_n_account = false;
@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -2206,12 +2208,12 @@ static int tpacket_rcv(struct sk_buff *s
@@ -2207,12 +2209,12 @@ static int tpacket_rcv(struct sk_buff *s
BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -3294,6 +3296,7 @@ static int packet_create(struct net *net
@@ -3295,6 +3297,7 @@ static int packet_create(struct net *net
mutex_init(&po->pg_vec_lock);
po->rollover = NULL;
po->prot_hook.func = packet_rcv;
@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (sock->type == SOCK_PACKET)
po->prot_hook.func = packet_rcv_spkt;
@@ -3907,6 +3910,16 @@ packet_setsockopt(struct socket *sock, i
@@ -3908,6 +3911,16 @@ packet_setsockopt(struct socket *sock, i
po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
return 0;
}
@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
default:
return -ENOPROTOOPT;
}
@@ -3959,6 +3972,13 @@ static int packet_getsockopt(struct sock
@@ -3960,6 +3973,13 @@ static int packet_getsockopt(struct sock
case PACKET_VNET_HDR:
val = po->has_vnet_hdr;
break;

32
target/linux/layerscape/patches-4.14/819-sdhc-support-layerscape.patch
View File

@ -265,7 +265,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
u32 val;
sdhci_reset(host, mask);
@@ -622,6 +713,12 @@ static void esdhc_reset(struct sdhci_hos
@@ -619,6 +710,12 @@ static void esdhc_reset(struct sdhci_hos
val = sdhci_readl(host, ESDHC_TBCTL);
val &= ~ESDHC_TB_EN;
sdhci_writel(host, val, ESDHC_TBCTL);
@ -278,7 +278,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
}
}
@@ -633,6 +730,7 @@ static void esdhc_reset(struct sdhci_hos
@@ -630,6 +727,7 @@ static void esdhc_reset(struct sdhci_hos
static const struct of_device_id scfg_device_ids[] = {
{ .compatible = "fsl,t1040-scfg", },
{ .compatible = "fsl,ls1012a-scfg", },
@ -286,7 +286,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
{ .compatible = "fsl,ls1046a-scfg", },
{}
};
@@ -695,23 +793,91 @@ static int esdhc_signal_voltage_switch(s
@@ -692,23 +790,91 @@ static int esdhc_signal_voltage_switch(s
}
}
@ -383,7 +383,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
}
#ifdef CONFIG_PM_SLEEP
@@ -760,7 +926,7 @@ static const struct sdhci_ops sdhci_esdh
@@ -757,7 +923,7 @@ static const struct sdhci_ops sdhci_esdh
.adma_workaround = esdhc_of_adma_workaround,
.set_bus_width = esdhc_pltfm_set_bus_width,
.reset = esdhc_reset,
@ -392,7 +392,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
};
static const struct sdhci_ops sdhci_esdhc_le_ops = {
@@ -777,7 +943,7 @@ static const struct sdhci_ops sdhci_esdh
@@ -774,7 +940,7 @@ static const struct sdhci_ops sdhci_esdh
.adma_workaround = esdhc_of_adma_workaround,
.set_bus_width = esdhc_pltfm_set_bus_width,
.reset = esdhc_reset,
@ -401,7 +401,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
};
static const struct sdhci_pltfm_data sdhci_esdhc_be_pdata = {
@@ -803,8 +969,20 @@ static struct soc_device_attribute soc_i
@@ -800,8 +966,20 @@ static struct soc_device_attribute soc_i
{ },
};
@ -422,7 +422,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_esdhc *esdhc;
struct device_node *np;
@@ -824,6 +1002,24 @@ static void esdhc_init(struct platform_d
@@ -821,6 +999,24 @@ static void esdhc_init(struct platform_d
else
esdhc->quirk_incorrect_hostver = false;
@ -447,7 +447,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
np = pdev->dev.of_node;
clk = of_clk_get(np, 0);
if (!IS_ERR(clk)) {
@@ -851,6 +1047,12 @@ static void esdhc_init(struct platform_d
@@ -848,6 +1044,12 @@ static void esdhc_init(struct platform_d
}
}
@ -460,7 +460,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
static int sdhci_esdhc_probe(struct platform_device *pdev)
{
struct sdhci_host *host;
@@ -874,6 +1076,7 @@ static int sdhci_esdhc_probe(struct plat
@@ -871,6 +1073,7 @@ static int sdhci_esdhc_probe(struct plat
host->mmc_host_ops.start_signal_voltage_switch =
esdhc_signal_voltage_switch;
host->mmc_host_ops.execute_tuning = esdhc_execute_tuning;
@ -468,7 +468,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
host->tuning_delay = 1;
esdhc_init(pdev, host);
@@ -882,6 +1085,11 @@ static int sdhci_esdhc_probe(struct plat
@@ -879,6 +1082,11 @@ static int sdhci_esdhc_probe(struct plat
pltfm_host = sdhci_priv(host);
esdhc = sdhci_pltfm_priv(pltfm_host);
@ -480,7 +480,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
if (esdhc->vendor_ver == VENDOR_V_22)
host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
@@ -928,14 +1136,6 @@ static int sdhci_esdhc_probe(struct plat
@@ -925,14 +1133,6 @@ static int sdhci_esdhc_probe(struct plat
return ret;
}
@ -497,7 +497,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
.name = "sdhci-esdhc",
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -2150,7 +2150,7 @@ static void sdhci_send_tuning(struct sdh
@@ -2148,7 +2148,7 @@ static void sdhci_send_tuning(struct sdh
}
@ -506,8 +506,8 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
{
int i;
@@ -2167,13 +2167,13 @@ static void __sdhci_execute_tuning(struc
pr_info("%s: Tuning timeout, falling back to fixed sampling clock\n",
@@ -2165,13 +2165,13 @@ static void __sdhci_execute_tuning(struc
pr_debug("%s: Tuning timeout, falling back to fixed sampling clock\n",
mmc_hostname(host->mmc));
sdhci_abort_tuning(host, opcode);
- return;
@ -522,7 +522,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
break;
}
@@ -2185,6 +2185,7 @@ static void __sdhci_execute_tuning(struc
@@ -2183,6 +2183,7 @@ static void __sdhci_execute_tuning(struc
pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",
mmc_hostname(host->mmc));
sdhci_reset_tuning(host);
@ -530,7 +530,7 @@ Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
}
int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
@@ -2246,7 +2247,7 @@ int sdhci_execute_tuning(struct mmc_host
@@ -2244,7 +2245,7 @@ int sdhci_execute_tuning(struct mmc_host
sdhci_start_tuning(host);

20
target/linux/mediatek/patches-4.14/0143-mmc-mediatek-add-support-of-mt2701-mt2712.patch
View File

@ -26,7 +26,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/* MSDC_IOCON mask */
#define MSDC_IOCON_SDR104CKS (0x1 << 0) /* RW */
@@ -295,6 +298,10 @@ struct msdc_save_para {
@@ -297,6 +300,10 @@ struct msdc_save_para {
u32 emmc50_cfg0;
};
@ -37,7 +37,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
struct msdc_tune_para {
u32 iocon;
u32 pad_tune;
@@ -309,6 +316,7 @@ struct msdc_delay_phase {
@@ -311,6 +318,7 @@ struct msdc_delay_phase {
struct msdc_host {
struct device *dev;
@ -45,7 +45,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
struct mmc_host *mmc; /* mmc structure */
int cmd_rsp;
@@ -350,6 +358,31 @@ struct msdc_host {
@@ -352,6 +360,31 @@ struct msdc_host {
struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */
};
@ -77,7 +77,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
static void sdr_set_bits(void __iomem *reg, u32 bs)
{
u32 val = readl(reg);
@@ -509,7 +542,12 @@ static void msdc_set_timeout(struct msdc
@@ -511,7 +544,12 @@ static void msdc_set_timeout(struct msdc
timeout = (ns + clk_ns - 1) / clk_ns + clks;
/* in 1048576 sclk cycle unit */
timeout = (timeout + (0x1 << 20) - 1) >> 20;
@ -91,7 +91,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/*DDR mode will double the clk cycles for data timeout */
timeout = mode >= 2 ? timeout * 2 : timeout;
timeout = timeout > 1 ? timeout - 1 : 0;
@@ -548,7 +586,11 @@ static void msdc_set_mclk(struct msdc_ho
@@ -550,7 +588,11 @@ static void msdc_set_mclk(struct msdc_ho
flags = readl(host->base + MSDC_INTEN);
sdr_clr_bits(host->base + MSDC_INTEN, flags);
@ -104,7 +104,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
if (timing == MMC_TIMING_UHS_DDR50 ||
timing == MMC_TIMING_MMC_DDR52 ||
timing == MMC_TIMING_MMC_HS400) {
@@ -568,8 +610,12 @@ static void msdc_set_mclk(struct msdc_ho
@@ -570,8 +612,12 @@ static void msdc_set_mclk(struct msdc_ho
if (timing == MMC_TIMING_MMC_HS400 &&
hz >= (host->src_clk_freq >> 1)) {
@ -119,7 +119,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
sclk = host->src_clk_freq >> 1;
div = 0; /* div is ignore when bit18 is set */
}
@@ -587,8 +633,15 @@ static void msdc_set_mclk(struct msdc_ho
@@ -589,8 +635,15 @@ static void msdc_set_mclk(struct msdc_ho
sclk = (host->src_clk_freq >> 2) / div;
}
}
@ -137,7 +137,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN);
while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB))
cpu_relax();
@@ -1617,12 +1670,17 @@ static int msdc_drv_probe(struct platfor
@@ -1620,12 +1673,17 @@ static int msdc_drv_probe(struct platfor
struct mmc_host *mmc;
struct msdc_host *host;
struct resource *res;
@ -155,7 +155,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/* Allocate MMC host for this device */
mmc = mmc_alloc_host(sizeof(struct msdc_host), &pdev->dev);
if (!mmc)
@@ -1686,11 +1744,15 @@ static int msdc_drv_probe(struct platfor
@@ -1689,11 +1747,15 @@ static int msdc_drv_probe(struct platfor
msdc_of_property_parse(pdev, host);
host->dev = &pdev->dev;
@ -172,7 +172,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23;
/* MMC core transfer sizes tunable parameters */
@@ -1839,12 +1901,6 @@ static const struct dev_pm_ops msdc_dev_
@@ -1842,12 +1904,6 @@ static const struct dev_pm_ops msdc_dev_
SET_RUNTIME_PM_OPS(msdc_runtime_suspend, msdc_runtime_resume, NULL)
};

8
target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch
View File

@ -17,7 +17,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -300,6 +300,7 @@ struct msdc_save_para {
@@ -302,6 +302,7 @@ struct msdc_save_para {
struct mtk_mmc_compatible {
u8 clk_div_bits;
@ -25,7 +25,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
struct msdc_tune_para {
@@ -360,18 +361,22 @@ struct msdc_host {
@@ -362,18 +363,22 @@ struct msdc_host {
static const struct mtk_mmc_compatible mt8135_compat = {
.clk_div_bits = 8,
@ -48,7 +48,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct of_device_id msdc_of_ids[] = {
@@ -666,7 +671,8 @@ static void msdc_set_mclk(struct msdc_ho
@@ -668,7 +673,8 @@ static void msdc_set_mclk(struct msdc_ho
host->base + PAD_CMD_TUNE);
}
@ -58,7 +58,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
sdr_set_field(host->base + PAD_CMD_TUNE,
MSDC_PAD_TUNE_CMDRRDLY,
host->hs400_cmd_int_delay);
@@ -1594,7 +1600,8 @@ static int msdc_execute_tuning(struct mm
@@ -1597,7 +1603,8 @@ static int msdc_execute_tuning(struct mm
struct msdc_host *host = mmc_priv(mmc);
int ret;

38
target/linux/mediatek/patches-4.14/0153-mmc-mediatek-add-pad_tune0-support.patch
View File

@ -23,7 +23,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
#define PAD_DS_TUNE 0x188
#define PAD_CMD_TUNE 0x18c
#define EMMC50_CFG0 0x208
@@ -301,6 +302,7 @@ struct msdc_save_para {
@@ -303,6 +304,7 @@ struct msdc_save_para {
struct mtk_mmc_compatible {
u8 clk_div_bits;
bool hs400_tune; /* only used for MT8173 */
@ -31,7 +31,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
struct msdc_tune_para {
@@ -362,21 +364,25 @@ struct msdc_host {
@@ -364,21 +366,25 @@ struct msdc_host {
static const struct mtk_mmc_compatible mt8135_compat = {
.clk_div_bits = 8,
.hs400_tune = false,
@ -57,7 +57,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct of_device_id msdc_of_ids[] = {
@@ -581,6 +587,7 @@ static void msdc_set_mclk(struct msdc_ho
@@ -583,6 +589,7 @@ static void msdc_set_mclk(struct msdc_ho
u32 flags;
u32 div;
u32 sclk;
@ -65,7 +65,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
if (!hz) {
dev_dbg(host->dev, "set mclk to 0\n");
@@ -663,10 +670,10 @@ static void msdc_set_mclk(struct msdc_ho
@@ -665,10 +672,10 @@ static void msdc_set_mclk(struct msdc_ho
*/
if (host->sclk <= 52000000) {
writel(host->def_tune_para.iocon, host->base + MSDC_IOCON);
@ -78,7 +78,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
writel(host->saved_tune_para.pad_cmd_tune,
host->base + PAD_CMD_TUNE);
}
@@ -1224,6 +1231,7 @@ static irqreturn_t msdc_irq(int irq, voi
@@ -1226,6 +1233,7 @@ static irqreturn_t msdc_irq(int irq, voi
static void msdc_init_hw(struct msdc_host *host)
{
u32 val;
@ -86,7 +86,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/* Configure to MMC/SD mode, clock free running */
sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN);
@@ -1239,7 +1247,7 @@ static void msdc_init_hw(struct msdc_hos
@@ -1241,7 +1249,7 @@ static void msdc_init_hw(struct msdc_hos
val = readl(host->base + MSDC_INT);
writel(val, host->base + MSDC_INT);
@ -95,7 +95,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
writel(0, host->base + MSDC_IOCON);
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
writel(0x403c0046, host->base + MSDC_PATCH_BIT);
@@ -1259,7 +1267,7 @@ static void msdc_init_hw(struct msdc_hos
@@ -1261,7 +1269,7 @@ static void msdc_init_hw(struct msdc_hos
sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);
host->def_tune_para.iocon = readl(host->base + MSDC_IOCON);
@ -104,7 +104,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dev_dbg(host->dev, "init hardware done!");
}
@@ -1402,18 +1410,19 @@ static int msdc_tune_response(struct mmc
@@ -1404,18 +1412,19 @@ static int msdc_tune_response(struct mmc
struct msdc_delay_phase internal_delay_phase;
u8 final_delay, final_maxlen;
u32 internal_delay = 0;
@ -126,7 +126,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
MSDC_PAD_TUNE_CMDRDLY, i);
/*
* Using the same parameters, it may sometimes pass the test,
@@ -1437,7 +1446,7 @@ static int msdc_tune_response(struct mmc
@@ -1439,7 +1448,7 @@ static int msdc_tune_response(struct mmc
sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
for (i = 0; i < PAD_DELAY_MAX; i++) {
@ -135,7 +135,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
MSDC_PAD_TUNE_CMDRDLY, i);
/*
* Using the same parameters, it may sometimes pass the test,
@@ -1462,12 +1471,12 @@ skip_fall:
@@ -1464,12 +1473,12 @@ skip_fall:
final_maxlen = final_fall_delay.maxlen;
if (final_maxlen == final_rise_delay.maxlen) {
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
@ -150,7 +150,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
final_fall_delay.final_phase);
final_delay = final_fall_delay.final_phase;
}
@@ -1475,7 +1484,7 @@ skip_fall:
@@ -1477,7 +1486,7 @@ skip_fall:
goto skip_internal;
for (i = 0; i < PAD_DELAY_MAX; i++) {
@ -159,7 +159,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
MSDC_PAD_TUNE_CMDRRDLY, i);
mmc_send_tuning(mmc, opcode, &cmd_err);
if (!cmd_err)
@@ -1483,7 +1492,7 @@ skip_fall:
@@ -1485,7 +1494,7 @@ skip_fall:
}
dev_dbg(host->dev, "Final internal delay: 0x%x\n", internal_delay);
internal_delay_phase = get_best_delay(host, internal_delay);
@ -168,7 +168,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
internal_delay_phase.final_phase);
skip_internal:
dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay);
@@ -1545,12 +1554,13 @@ static int msdc_tune_data(struct mmc_hos
@@ -1548,12 +1557,13 @@ static int msdc_tune_data(struct mmc_hos
u32 rise_delay = 0, fall_delay = 0;
struct msdc_delay_phase final_rise_delay, final_fall_delay = { 0,};
u8 final_delay, final_maxlen;
@ -183,7 +183,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
MSDC_PAD_TUNE_DATRRDLY, i);
ret = mmc_send_tuning(mmc, opcode, NULL);
if (!ret)
@@ -1565,7 +1575,7 @@ static int msdc_tune_data(struct mmc_hos
@@ -1568,7 +1578,7 @@ static int msdc_tune_data(struct mmc_hos
sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
for (i = 0; i < PAD_DELAY_MAX; i++) {
@ -192,7 +192,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
MSDC_PAD_TUNE_DATRRDLY, i);
ret = mmc_send_tuning(mmc, opcode, NULL);
if (!ret)
@@ -1578,14 +1588,14 @@ skip_fall:
@@ -1581,14 +1591,14 @@ skip_fall:
if (final_maxlen == final_rise_delay.maxlen) {
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
@ -209,7 +209,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
MSDC_PAD_TUNE_DATRRDLY,
final_fall_delay.final_phase);
final_delay = final_fall_delay.final_phase;
@@ -1599,6 +1609,7 @@ static int msdc_execute_tuning(struct mm
@@ -1602,6 +1612,7 @@ static int msdc_execute_tuning(struct mm
{
struct msdc_host *host = mmc_priv(mmc);
int ret;
@ -217,7 +217,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
if (host->hs400_mode &&
host->dev_comp->hs400_tune)
@@ -1616,7 +1627,7 @@ static int msdc_execute_tuning(struct mm
@@ -1619,7 +1630,7 @@ static int msdc_execute_tuning(struct mm
}
host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON);
@ -226,7 +226,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
host->saved_tune_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
return ret;
}
@@ -1857,10 +1868,12 @@ static int msdc_drv_remove(struct platfo
@@ -1860,10 +1871,12 @@ static int msdc_drv_remove(struct platfo
#ifdef CONFIG_PM
static void msdc_save_reg(struct msdc_host *host)
{
@ -240,7 +240,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT);
host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1);
host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
@@ -1870,10 +1883,12 @@ static void msdc_save_reg(struct msdc_ho
@@ -1873,10 +1886,12 @@ static void msdc_save_reg(struct msdc_ho
static void msdc_restore_reg(struct msdc_host *host)
{

24
target/linux/mediatek/patches-4.14/0154-mmc-mediatek-add-async-fifo-and-data-tune-support.patch
View File

@ -23,9 +23,9 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
#define MSDC_PAD_TUNE 0xec
#define MSDC_PAD_TUNE0 0xf0
#define PAD_DS_TUNE 0x188
@@ -216,11 +217,20 @@
#define MSDC_PATCH_BIT_SPCPUSH (0x1 << 29) /* RW */
#define MSDC_PATCH_BIT_DECRCTMO (0x1 << 30) /* RW */
@@ -218,11 +219,20 @@
#define MSDC_PATCH_BIT1_CMDTA (0x7 << 3) /* RW */
+#define MSDC_PATCH_BIT2_CFGRESP (0x1 << 15) /* RW */
+#define MSDC_PATCH_BIT2_CFGCRCSTS (0x1 << 28) /* RW */
@ -44,7 +44,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
#define PAD_DS_TUNE_DLY1 (0x1f << 2) /* RW */
#define PAD_DS_TUNE_DLY2 (0x1f << 7) /* RW */
@@ -294,6 +304,7 @@ struct msdc_save_para {
@@ -296,6 +306,7 @@ struct msdc_save_para {
u32 pad_tune;
u32 patch_bit0;
u32 patch_bit1;
@ -52,7 +52,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
u32 pad_ds_tune;
u32 pad_cmd_tune;
u32 emmc50_cfg0;
@@ -303,6 +314,8 @@ struct mtk_mmc_compatible {
@@ -305,6 +316,8 @@ struct mtk_mmc_compatible {
u8 clk_div_bits;
bool hs400_tune; /* only used for MT8173 */
u32 pad_tune_reg;
@ -61,7 +61,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
struct msdc_tune_para {
@@ -365,24 +378,32 @@ static const struct mtk_mmc_compatible m
@@ -367,24 +380,32 @@ static const struct mtk_mmc_compatible m
.clk_div_bits = 8,
.hs400_tune = false,
.pad_tune_reg = MSDC_PAD_TUNE,
@ -94,7 +94,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct of_device_id msdc_of_ids[] = {
@@ -1252,8 +1273,29 @@ static void msdc_init_hw(struct msdc_hos
@@ -1254,8 +1275,29 @@ static void msdc_init_hw(struct msdc_hos
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
writel(0x403c0046, host->base + MSDC_PATCH_BIT);
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
@ -125,7 +125,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/* Configure to enable SDIO mode.
* it's must otherwise sdio cmd5 failed
@@ -1268,6 +1310,8 @@ static void msdc_init_hw(struct msdc_hos
@@ -1270,6 +1312,8 @@ static void msdc_init_hw(struct msdc_hos
host->def_tune_para.iocon = readl(host->base + MSDC_IOCON);
host->def_tune_para.pad_tune = readl(host->base + tune_reg);
@ -134,7 +134,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
dev_dbg(host->dev, "init hardware done!");
}
@@ -1480,7 +1524,7 @@ skip_fall:
@@ -1482,7 +1526,7 @@ skip_fall:
final_fall_delay.final_phase);
final_delay = final_fall_delay.final_phase;
}
@ -143,7 +143,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
goto skip_internal;
for (i = 0; i < PAD_DELAY_MAX; i++) {
@@ -1638,6 +1682,8 @@ static int msdc_prepare_hs400_tuning(str
@@ -1641,6 +1685,8 @@ static int msdc_prepare_hs400_tuning(str
host->hs400_mode = true;
writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE);
@ -152,7 +152,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
return 0;
}
@@ -1876,6 +1922,7 @@ static void msdc_save_reg(struct msdc_ho
@@ -1879,6 +1925,7 @@ static void msdc_save_reg(struct msdc_ho
host->save_para.pad_tune = readl(host->base + tune_reg);
host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT);
host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1);
@ -160,7 +160,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0);
@@ -1891,6 +1938,7 @@ static void msdc_restore_reg(struct msdc
@@ -1894,6 +1941,7 @@ static void msdc_restore_reg(struct msdc
writel(host->save_para.pad_tune, host->base + tune_reg);
writel(host->save_para.patch_bit0, host->base + MSDC_PATCH_BIT);
writel(host->save_para.patch_bit1, host->base + MSDC_PATCH_BIT1);

12
target/linux/mediatek/patches-4.14/0155-mmc-mediatek-add-busy_check-support.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -316,6 +316,7 @@ struct mtk_mmc_compatible {
@@ -318,6 +318,7 @@ struct mtk_mmc_compatible {
u32 pad_tune_reg;
bool async_fifo;
bool data_tune;
@ -24,7 +24,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
struct msdc_tune_para {
@@ -380,6 +381,7 @@ static const struct mtk_mmc_compatible m
@@ -382,6 +383,7 @@ static const struct mtk_mmc_compatible m
.pad_tune_reg = MSDC_PAD_TUNE,
.async_fifo = false,
.data_tune = false,
@ -32,7 +32,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct mtk_mmc_compatible mt8173_compat = {
@@ -388,6 +390,7 @@ static const struct mtk_mmc_compatible m
@@ -390,6 +392,7 @@ static const struct mtk_mmc_compatible m
.pad_tune_reg = MSDC_PAD_TUNE,
.async_fifo = false,
.data_tune = false,
@ -40,7 +40,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct mtk_mmc_compatible mt2701_compat = {
@@ -396,6 +399,7 @@ static const struct mtk_mmc_compatible m
@@ -398,6 +401,7 @@ static const struct mtk_mmc_compatible m
.pad_tune_reg = MSDC_PAD_TUNE0,
.async_fifo = true,
.data_tune = true,
@ -48,7 +48,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct mtk_mmc_compatible mt2712_compat = {
@@ -404,6 +408,7 @@ static const struct mtk_mmc_compatible m
@@ -406,6 +410,7 @@ static const struct mtk_mmc_compatible m
.pad_tune_reg = MSDC_PAD_TUNE0,
.async_fifo = true,
.data_tune = true,
@ -56,7 +56,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct of_device_id msdc_of_ids[] = {
@@ -1275,6 +1280,8 @@ static void msdc_init_hw(struct msdc_hos
@@ -1277,6 +1282,8 @@ static void msdc_init_hw(struct msdc_hos
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);

26
target/linux/mediatek/patches-4.14/0156-mmc-mediatek-add-stop_clk-fix-and-enhance_rx-support.patch
View File

@ -42,16 +42,16 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/* MSDC_DMA_CTRL mask */
#define MSDC_DMA_CTRL_START (0x1 << 0) /* W */
#define MSDC_DMA_CTRL_STOP (0x1 << 1) /* W */
@@ -217,6 +222,8 @@
#define MSDC_PATCH_BIT_SPCPUSH (0x1 << 29) /* RW */
#define MSDC_PATCH_BIT_DECRCTMO (0x1 << 30) /* RW */
@@ -219,6 +224,8 @@
#define MSDC_PATCH_BIT1_CMDTA (0x7 << 3) /* RW */
+#define MSDC_PATCH_BIT1_STOP_DLY (0xf << 8) /* RW */
+
#define MSDC_PATCH_BIT2_CFGRESP (0x1 << 15) /* RW */
#define MSDC_PATCH_BIT2_CFGCRCSTS (0x1 << 28) /* RW */
#define MSDC_PB2_RESPWAIT (0x3 << 2) /* RW */
@@ -242,6 +249,9 @@
@@ -244,6 +251,9 @@
#define EMMC50_CFG_CRCSTS_EDGE (0x1 << 3) /* RW */
#define EMMC50_CFG_CFCSTS_SEL (0x1 << 4) /* RW */
@ -61,7 +61,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
#define REQ_CMD_EIO (0x1 << 0)
#define REQ_CMD_TMO (0x1 << 1)
#define REQ_DAT_ERR (0x1 << 2)
@@ -308,6 +318,7 @@ struct msdc_save_para {
@@ -310,6 +320,7 @@ struct msdc_save_para {
u32 pad_ds_tune;
u32 pad_cmd_tune;
u32 emmc50_cfg0;
@ -69,7 +69,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
struct mtk_mmc_compatible {
@@ -317,6 +328,8 @@ struct mtk_mmc_compatible {
@@ -319,6 +330,8 @@ struct mtk_mmc_compatible {
bool async_fifo;
bool data_tune;
bool busy_check;
@ -78,7 +78,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
struct msdc_tune_para {
@@ -382,6 +395,8 @@ static const struct mtk_mmc_compatible m
@@ -384,6 +397,8 @@ static const struct mtk_mmc_compatible m
.async_fifo = false,
.data_tune = false,
.busy_check = false,
@ -87,7 +87,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct mtk_mmc_compatible mt8173_compat = {
@@ -391,6 +406,8 @@ static const struct mtk_mmc_compatible m
@@ -393,6 +408,8 @@ static const struct mtk_mmc_compatible m
.async_fifo = false,
.data_tune = false,
.busy_check = false,
@ -96,7 +96,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct mtk_mmc_compatible mt2701_compat = {
@@ -400,6 +417,8 @@ static const struct mtk_mmc_compatible m
@@ -402,6 +419,8 @@ static const struct mtk_mmc_compatible m
.async_fifo = true,
.data_tune = true,
.busy_check = false,
@ -105,7 +105,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct mtk_mmc_compatible mt2712_compat = {
@@ -409,6 +428,8 @@ static const struct mtk_mmc_compatible m
@@ -411,6 +430,8 @@ static const struct mtk_mmc_compatible m
.async_fifo = true,
.data_tune = true,
.busy_check = true,
@ -114,7 +114,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
};
static const struct of_device_id msdc_of_ids[] = {
@@ -1280,15 +1301,31 @@ static void msdc_init_hw(struct msdc_hos
@@ -1282,15 +1303,31 @@ static void msdc_init_hw(struct msdc_hos
sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
@ -150,7 +150,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
/* use async fifo, then no need tune internal delay */
sdr_clr_bits(host->base + MSDC_PATCH_BIT2,
MSDC_PATCH_BIT2_CFGRESP);
@@ -1933,6 +1970,7 @@ static void msdc_save_reg(struct msdc_ho
@@ -1936,6 +1973,7 @@ static void msdc_save_reg(struct msdc_ho
host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0);
@ -158,7 +158,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
}
static void msdc_restore_reg(struct msdc_host *host)
@@ -1949,6 +1987,7 @@ static void msdc_restore_reg(struct msdc
@@ -1952,6 +1990,7 @@ static void msdc_restore_reg(struct msdc
writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE);
writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE);
writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0);

12
target/linux/mediatek/patches-4.14/0157-mmc-mediatek-add-support-of-source_cg-clock.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -372,6 +372,7 @@ struct msdc_host {
@@ -374,6 +374,7 @@ struct msdc_host {
struct clk *src_clk; /* msdc source clock */
struct clk *h_clk; /* msdc h_clk */
@ -23,7 +23,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
u32 mclk; /* mmc subsystem clock frequency */
u32 src_clk_freq; /* source clock frequency */
u32 sclk; /* SD/MS bus clock frequency */
@@ -616,6 +617,7 @@ static void msdc_set_timeout(struct msdc
@@ -618,6 +619,7 @@ static void msdc_set_timeout(struct msdc
static void msdc_gate_clock(struct msdc_host *host)
{
@ -31,7 +31,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
clk_disable_unprepare(host->src_clk);
clk_disable_unprepare(host->h_clk);
}
@@ -624,6 +626,7 @@ static void msdc_ungate_clock(struct msd
@@ -626,6 +628,7 @@ static void msdc_ungate_clock(struct msd
{
clk_prepare_enable(host->h_clk);
clk_prepare_enable(host->src_clk);
@ -39,7 +39,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB))
cpu_relax();
}
@@ -692,6 +695,15 @@ static void msdc_set_mclk(struct msdc_ho
@@ -694,6 +697,15 @@ static void msdc_set_mclk(struct msdc_ho
sclk = (host->src_clk_freq >> 2) / div;
}
}
@ -55,7 +55,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
if (host->dev_comp->clk_div_bits == 8)
sdr_set_field(host->base + MSDC_CFG,
MSDC_CFG_CKMOD | MSDC_CFG_CKDIV,
@@ -700,10 +712,14 @@ static void msdc_set_mclk(struct msdc_ho
@@ -702,10 +714,14 @@ static void msdc_set_mclk(struct msdc_ho
sdr_set_field(host->base + MSDC_CFG,
MSDC_CFG_CKMOD_EXTRA | MSDC_CFG_CKDIV_EXTRA,
(mode << 12) | div);
@ -71,7 +71,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
host->sclk = sclk;
host->mclk = hz;
host->timing = timing;
@@ -1822,6 +1838,11 @@ static int msdc_drv_probe(struct platfor
@@ -1825,6 +1841,11 @@ static int msdc_drv_probe(struct platfor
goto host_free;
}

6
target/linux/mediatek/patches-4.14/0158-mmc-mediatek-add-latch-ck-support.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -378,6 +378,7 @@ struct msdc_host {
@@ -380,6 +380,7 @@ struct msdc_host {
u32 sclk; /* SD/MS bus clock frequency */
unsigned char timing;
bool vqmmc_enabled;
@ -24,7 +24,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
u32 hs400_ds_delay;
u32 hs200_cmd_int_delay; /* cmd internal delay for HS200/SDR104 */
u32 hs400_cmd_int_delay; /* cmd internal delay for HS400 */
@@ -1661,6 +1662,8 @@ static int msdc_tune_data(struct mmc_hos
@@ -1664,6 +1665,8 @@ static int msdc_tune_data(struct mmc_hos
u32 tune_reg = host->dev_comp->pad_tune_reg;
int i, ret;
@ -33,7 +33,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
for (i = 0 ; i < PAD_DELAY_MAX; i++) {
@@ -1773,6 +1776,9 @@ static const struct mmc_host_ops mt_msdc
@@ -1776,6 +1779,9 @@ static const struct mmc_host_ops mt_msdc
static void msdc_of_property_parse(struct platform_device *pdev,
struct msdc_host *host)
{

10
target/linux/mediatek/patches-4.14/0159-mmc-mediatek-improve-eMMC-hs400-mode-read-performanc.patch
View File

@ -23,7 +23,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
#define SDC_FIFO_CFG 0x228
/*--------------------------------------------------------------------------*/
@@ -249,6 +250,8 @@
@@ -251,6 +252,8 @@
#define EMMC50_CFG_CRCSTS_EDGE (0x1 << 3) /* RW */
#define EMMC50_CFG_CFCSTS_SEL (0x1 << 4) /* RW */
@ -32,7 +32,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
#define SDC_FIFO_CFG_WRVALIDSEL (0x1 << 24) /* RW */
#define SDC_FIFO_CFG_RDVALIDSEL (0x1 << 25) /* RW */
@@ -318,6 +321,7 @@ struct msdc_save_para {
@@ -320,6 +323,7 @@ struct msdc_save_para {
u32 pad_ds_tune;
u32 pad_cmd_tune;
u32 emmc50_cfg0;
@ -40,7 +40,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
u32 sdc_fifo_cfg;
};
@@ -1747,6 +1751,9 @@ static int msdc_prepare_hs400_tuning(str
@@ -1750,6 +1754,9 @@ static int msdc_prepare_hs400_tuning(str
writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE);
/* hs400 mode must set it to 0 */
sdr_clr_bits(host->base + MSDC_PATCH_BIT2, MSDC_PATCH_BIT2_CFGCRCSTS);
@ -50,7 +50,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
return 0;
}
@@ -1997,6 +2004,7 @@ static void msdc_save_reg(struct msdc_ho
@@ -2000,6 +2007,7 @@ static void msdc_save_reg(struct msdc_ho
host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0);
@ -58,7 +58,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
host->save_para.sdc_fifo_cfg = readl(host->base + SDC_FIFO_CFG);
}
@@ -2014,6 +2022,7 @@ static void msdc_restore_reg(struct msdc
@@ -2017,6 +2025,7 @@ static void msdc_restore_reg(struct msdc
writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE);
writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE);
writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0);

2
target/linux/mediatek/patches-4.14/0160-mmc-mediatek-perfer-to-use-rise-edge-latching-for-cm.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -1550,7 +1550,8 @@ static int msdc_tune_response(struct mmc
@@ -1552,7 +1552,8 @@ static int msdc_tune_response(struct mmc
}
final_rise_delay = get_best_delay(host, rise_delay);
/* if rising edge has enough margin, then do not scan falling edge */

2
target/linux/mediatek/patches-4.14/0203-mmc-mediatek-add-support-for-MT7622-SoC.patch
View File

@ -16,7 +16,7 @@ Tested-by: Jumin Li <jumin.li@mediatek.com>
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -438,11 +438,23 @@ static const struct mtk_mmc_compatible m
@@ -440,11 +440,23 @@ static const struct mtk_mmc_compatible m
.enhance_rx = true,
};