mirror of https://github.com/hak5/openwrt.git
Michael Büsch
parent
3bb609d433
commit
9494e946a9
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@ -13,8 +13,8 @@ Index: linux-2.6.28.2/drivers/ssb/Makefile
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Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c
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===================================================================
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c 2009-02-01 19:51:46.000000000 +0100
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@@ -0,0 +1,259 @@
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+++ linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c 2009-02-01 21:16:15.000000000 +0100
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@@ -0,0 +1,378 @@
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+/*
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+ * Sonics Silicon Backplane
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+ * Broadcom ChipCommon Power Management Unit driver
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@ -89,7 +89,7 @@ Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c
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+ u32 crystalfreq)
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+{
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+ struct ssb_bus *bus = cc->dev->bus;
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+ const struct pmu0_plltab_entry *e;
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+ const struct pmu0_plltab_entry *e = NULL;
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+ u32 pmuctl, tmp, pllctl;
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+ unsigned int i;
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+
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@ -97,6 +97,7 @@ Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c
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+ /* The 5354 crystal freq is 25MHz */
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+ crystalfreq = 25000;
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+ }
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+ if (crystalfreq)
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+ e = pmu0_plltab_find_entry(crystalfreq);
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+ if (!e)
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+ e = pmu0_plltab_find_entry(SSB_PMU0_DEFAULT_XTALFREQ);
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@ -111,7 +112,7 @@ Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c
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+ return;
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+ }
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+
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+ ssb_printk(KERN_INFO PFX "Programming PLL to %u.%u MHz\n",
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+ ssb_printk(KERN_INFO PFX "Programming PLL to %u.%03u MHz\n",
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+ (crystalfreq / 1000), (crystalfreq % 1000));
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+
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+ /* First turn the PLL off. */
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@ -208,25 +209,113 @@ Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c
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+ }
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+}
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+
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+struct pmu_res_updown_tab_entry {
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+ u8 resource; /* The resource number */
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+ u16 updown; /* The updown value */
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+};
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+
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+enum pmu_res_depend_tab_task {
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+ PMU_RES_DEP_SET = 1,
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+ PMU_RES_DEP_ADD,
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+ PMU_RES_DEP_REMOVE,
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+};
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+
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+struct pmu_res_depend_tab_entry {
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+ u8 resource; /* The resource number */
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+ u8 task; /* SET | ADD | REMOVE */
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+ u32 depend; /* The depend mask */
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+};
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+
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+static const struct pmu_res_updown_tab_entry pmu_res_updown_tab_4328a0[] = {
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+ { .resource = SSB_PLLRES_4328_EXT_SWITCHER_PWM, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_BB_SWITCHER_PWM, .updown = 0x1F01, },
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+ { .resource = SSB_PLLRES_4328_BB_SWITCHER_BURST, .updown = 0x010F, },
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+ { .resource = SSB_PLLRES_4328_BB_EXT_SWITCHER_BURST, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_ILP_REQUEST, .updown = 0x0202, },
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+ { .resource = SSB_PLLRES_4328_RADIO_SWITCHER_PWM, .updown = 0x0F01, },
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+ { .resource = SSB_PLLRES_4328_RADIO_SWITCHER_BURST, .updown = 0x0F01, },
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+ { .resource = SSB_PLLRES_4328_ROM_SWITCH, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_PA_REF_LDO, .updown = 0x0F01, },
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+ { .resource = SSB_PLLRES_4328_RADIO_LDO, .updown = 0x0F01, },
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+ { .resource = SSB_PLLRES_4328_AFE_LDO, .updown = 0x0F01, },
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+ { .resource = SSB_PLLRES_4328_PLL_LDO, .updown = 0x0F01, },
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+ { .resource = SSB_PLLRES_4328_BG_FILTBYP, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_TX_FILTBYP, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_RX_FILTBYP, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_XTAL_PU, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_XTAL_EN, .updown = 0xA001, },
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+ { .resource = SSB_PLLRES_4328_BB_PLL_FILTBYP, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_RF_PLL_FILTBYP, .updown = 0x0101, },
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+ { .resource = SSB_PLLRES_4328_BB_PLL_PU, .updown = 0x0701, },
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+};
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+
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+static const struct pmu_res_depend_tab_entry pmu_res_depend_tab_4328a0[] = {
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+ {
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+ /* Adjust ILP Request to avoid forcing EXT/BB into burst mode. */
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+ .resource = SSB_PLLRES_4328_ILP_REQUEST,
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+ .task = PMU_RES_DEP_SET,
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+ .depend = ((1 << SSB_PLLRES_4328_EXT_SWITCHER_PWM) |
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+ (1 << SSB_PLLRES_4328_BB_SWITCHER_PWM)),
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+ },
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+};
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+
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+static const struct pmu_res_updown_tab_entry pmu_res_updown_tab_4325a0[] = {
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+ { .resource = SSB_PLLRES_4325_XTAL_PU, .updown = 0x1501, },
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+};
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+
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+static const struct pmu_res_depend_tab_entry pmu_res_depend_tab_4325a0[] = {
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+ {
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+ /* Adjust HT-Available dependencies. */
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+ .resource = SSB_PLLRES_4325_HT_AVAIL,
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+ .task = PMU_RES_DEP_ADD,
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+ .depend = ((1 << SSB_PLLRES_4325_RX_PWRSW_PU) |
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+ (1 << SSB_PLLRES_4325_TX_PWRSW_PU) |
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+ (1 << SSB_PLLRES_4325_LOGEN_PWRSW_PU) |
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+ (1 << SSB_PLLRES_4325_AFE_PWRSW_PU)),
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+ },
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+};
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+
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+static void ssb_pmu_resources_init(struct ssb_chipcommon *cc)
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+{
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+ struct ssb_bus *bus = cc->dev->bus;
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+ u32 min_msk = 0, max_msk = 0;
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+ unsigned int i;
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+ const struct pmu_res_updown_tab_entry *updown_tab = NULL;
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+ unsigned int updown_tab_size;
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+ const struct pmu_res_depend_tab_entry *depend_tab = NULL;
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+ unsigned int depend_tab_size;
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+
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+ switch (bus->chip_id) {
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+ case 0x4312:
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+ /* We keep the default settings:
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+ * min_msk = 0xCBB
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+ * max_msk = 0x7FFFF
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+ * updown table size = 0
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+ * depend table size = 0
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+ */
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+ break;
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+ case 0x4325:
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+ //TODO
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+ /* Power OTP down later. */
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+ min_msk = (1 << SSB_PLLRES_4325_CBUCK_BURST) |
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+ (1 << SSB_PLLRES_4325_LNLDO2_PU);
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+ if (chipco_read32(cc, SSB_CHIPCO_CHIPSTAT) &
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+ SSB_CHIPCO_CHST_4325_PMUTOP_2B)
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+ min_msk |= (1 << SSB_PLLRES_4325_CLDO_CBUCK_BURST);
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+ /* The PLL may turn on, if it decides so. */
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+ max_msk = 0xFFFFF;
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+ updown_tab = pmu_res_updown_tab_4325a0;
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+ updown_tab_size = ARRAY_SIZE(pmu_res_updown_tab_4325a0);
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+ depend_tab = pmu_res_depend_tab_4325a0;
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+ depend_tab_size = ARRAY_SIZE(pmu_res_depend_tab_4325a0);
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+ break;
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+ case 0x4328:
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+ //TODO
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+ min_msk = (1 << SSB_PLLRES_4328_EXT_SWITCHER_PWM) |
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+ (1 << SSB_PLLRES_4328_BB_SWITCHER_PWM) |
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+ (1 << SSB_PLLRES_4328_XTAL_EN);
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+ /* The PLL may turn on, if it decides so. */
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+ max_msk = 0xFFFFF;
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+ updown_tab = pmu_res_updown_tab_4328a0;
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+ updown_tab_size = ARRAY_SIZE(pmu_res_updown_tab_4328a0);
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+ depend_tab = pmu_res_depend_tab_4328a0;
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+ depend_tab_size = ARRAY_SIZE(pmu_res_depend_tab_4328a0);
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+ break;
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+ case 0x5354:
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+ /* The PLL may turn on, if it decides so. */
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@ -237,7 +326,37 @@ Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon_pmu.c
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+ "ERROR: PMU resource config unknown for device %04X\n",
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+ bus->chip_id);
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+ }
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+ //TODO table upload
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+
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+ if (updown_tab) {
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+ for (i = 0; i < updown_tab_size; i++) {
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+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_TABSEL,
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+ updown_tab[i].resource);
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+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_UPDNTM,
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+ updown_tab[i].updown);
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+ }
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+ }
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+ if (depend_tab) {
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+ for (i = 0; i < depend_tab_size; i++) {
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+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_TABSEL,
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+ depend_tab[i].resource);
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+ switch (depend_tab[i].task) {
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+ case PMU_RES_DEP_SET:
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+ chipco_write32(cc, SSB_CHIPCO_PMU_RES_DEPMSK,
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+ depend_tab[i].depend);
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+ break;
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+ case PMU_RES_DEP_ADD:
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+ chipco_set32(cc, SSB_CHIPCO_PMU_RES_DEPMSK,
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+ depend_tab[i].depend);
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+ break;
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+ case PMU_RES_DEP_REMOVE:
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+ chipco_mask32(cc, SSB_CHIPCO_PMU_RES_DEPMSK,
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+ ~(depend_tab[i].depend));
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+ break;
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+ default:
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+ SSB_WARN_ON(1);
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+ }
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+ }
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+ }
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+
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+ /* Set the resource masks. */
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+ if (min_msk)
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@ -309,7 +428,7 @@ Index: linux-2.6.28.2/drivers/ssb/driver_chipcommon.c
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Index: linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h
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===================================================================
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--- linux-2.6.28.2.orig/include/linux/ssb/ssb_driver_chipcommon.h 2009-02-01 13:22:59.000000000 +0100
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+++ linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h 2009-02-01 19:17:25.000000000 +0100
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+++ linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h 2009-02-01 21:09:37.000000000 +0100
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@@ -181,6 +181,16 @@
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#define SSB_CHIPCO_PROG_WAITCNT 0x0124
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#define SSB_CHIPCO_FLASH_CFG 0x0128
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@ -327,7 +446,7 @@ Index: linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h
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#define SSB_CHIPCO_UART0_DATA 0x0300
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#define SSB_CHIPCO_UART0_IMR 0x0304
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#define SSB_CHIPCO_UART0_FCR 0x0308
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@@ -197,6 +207,156 @@
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@@ -197,6 +207,172 @@
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#define SSB_CHIPCO_UART1_LSR 0x0414
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#define SSB_CHIPCO_UART1_MSR 0x0418
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#define SSB_CHIPCO_UART1_SCRATCH 0x041C
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@ -481,10 +600,26 @@ Index: linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h
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+#define SSB_PLLRES_5354_BB_PLL_FILTBYP 17
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+#define SSB_PLLRES_5354_RF_PLL_FILTBYP 18
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+#define SSB_PLLRES_5354_BB_PLL_PU 19
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+
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+
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+
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+/** Chip specific Chip-Status register contents. */
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+#define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003
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+#define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
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+#define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
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+#define SSB_CHIPCO_CHST_4325_OTP_SEL 2 /* OTP is powered up, no SPROM */
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+#define SSB_CHIPCO_CHST_4325_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */
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+#define SSB_CHIPCO_CHST_4325_SDIO_USB_MODE 0x00000004
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+#define SSB_CHIPCO_CHST_4325_SDIO_USB_MODE_SHIFT 2
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+#define SSB_CHIPCO_CHST_4325_RCAL_VALID 0x00000008
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+#define SSB_CHIPCO_CHST_4325_RCAL_VALID_SHIFT 3
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+#define SSB_CHIPCO_CHST_4325_RCAL_VALUE 0x000001F0
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+#define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4
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+#define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */
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@@ -353,11 +513,20 @@
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@@ -353,11 +529,20 @@
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struct ssb_device;
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struct ssb_serial_port;
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@ -505,7 +640,7 @@ Index: linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h
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};
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static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
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@@ -365,6 +534,17 @@ static inline bool ssb_chipco_available(
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@@ -365,6 +550,17 @@ static inline bool ssb_chipco_available(
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return (cc->dev != NULL);
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}
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@ -523,7 +658,7 @@ Index: linux-2.6.28.2/include/linux/ssb/ssb_driver_chipcommon.h
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extern void ssb_chipcommon_init(struct ssb_chipcommon *cc);
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extern void ssb_chipco_suspend(struct ssb_chipcommon *cc);
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@@ -406,4 +586,8 @@ extern int ssb_chipco_serial_init(struct
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@@ -406,4 +602,8 @@ extern int ssb_chipco_serial_init(struct
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struct ssb_serial_port *ports);
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#endif /* CONFIG_SSB_SERIAL */
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