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linux/brcm47xx: sync yhe BCM4710 fix with the upcoming upstream patch. 

SVN-Revision: 24116
lede-17.01
Alexandros C. Couloumbis 2010-11-23 16:41:34 +00:00
parent 6a3cc2583b
commit 8f94a9a224
2 changed files with 37 additions and 32 deletions
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63
target/linux/brcm47xx/patches-2.6.37/017-MIPS-BCM47xx-bmips4kc_fix.patch
View File

@ -1,47 +1,52 @@
From 1ff5904f725e9816b5ff2b5ade1d6326558d8e01 Mon Sep 17 00:00:00 2001
From: Kevin Cernekee <cernekee@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>
Date: Mon, 22 Nov 2010 21:41:28 -0800
Subject: [PATCH 7/7] MIPS: Fix regression on BCM4710 processor detection
BCM4710 uses the BMIPS32 core (like BCM6345), not the MIPS 4Kc core as
was previously believed.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
arch/mips/include/asm/cpu.h | 4 ++--
arch/mips/kernel/cpu-probe.c | 7 ++-----
2 files changed, 4 insertions(+), 7 deletions(-)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -111,7 +111,7 @@
@@ -111,8 +111,8 @@
* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
*/
-#define PRID_IMP_BMIPS4KC 0x4000
+#define PRID_IMP_BCM4710 0x4000
#define PRID_IMP_BMIPS32 0x8000
-#define PRID_IMP_BMIPS32 0x8000
+#define PRID_IMP_BMIPS32_REV4 0x4000
+#define PRID_IMP_BMIPS32_REV8 0x8000
#define PRID_IMP_BMIPS3300 0x9000
#define PRID_IMP_BMIPS3300_ALT 0x9100
@@ -226,8 +226,8 @@ enum cpu_type_enum {
* MIPS32 class processors
*/
CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
- CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
- CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC,
+ CPU_ALCHEMY, CPU_PR4450, CPU_BCM4710, CPU_BMIPS32, CPU_BMIPS3300,
+ CPU_BMIPS4350, CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC,
/*
* MIPS64 class processors
#define PRID_IMP_BMIPS3300_BUG 0x0000
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -933,9 +933,9 @@ static inline void cpu_probe_broadcom(st
@@ -905,7 +905,8 @@ static inline void cpu_probe_broadcom(st
{
decode_configs(c);
switch (c->processor_id & 0xff00) {
- case PRID_IMP_BMIPS32:
+ case PRID_IMP_BMIPS32_REV4:
+ case PRID_IMP_BMIPS32_REV8:
c->cputype = CPU_BMIPS32;
__cpu_name[cpu] = "Broadcom BMIPS32";
break;
@@ -933,10 +934,6 @@ static inline void cpu_probe_broadcom(st
__cpu_name[cpu] = "Broadcom BMIPS5000";
c->options |= MIPS_CPU_ULRI;
break;
- case PRID_IMP_BMIPS4KC:
- c->cputype = CPU_4KC;
- __cpu_name[cpu] = "MIPS 4Kc";
+ case PRID_IMP_BCM4710:
+ c->cputype = CPU_BCM4710;
+ __cpu_name[cpu] = "Broadcom BCM4710";
break;
- break;
}
}
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -338,6 +338,7 @@ static void __cpuinit build_tlb_write_en
case CPU_4KSC:
case CPU_20KC:
case CPU_25KF:
+ case CPU_BCM4710:
case CPU_BMIPS32:
case CPU_BMIPS3300:
case CPU_BMIPS4350:

6
target/linux/brcm47xx/patches-2.6.37/150-cpu_fixes.patch
View File

@ -319,7 +319,7 @@
+ /* Check if special workarounds are required */
+#ifdef CONFIG_BCM47XX
+ if (current_cpu_data.cputype == CPU_BCM4710 && (current_cpu_data.processor_id & 0xff) == 0) {
+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
+ printk("Enabling BCM4710A0 cache workarounds.\n");
+ bcm4710 = 1;
+ } else
@ -345,7 +345,7 @@
}
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -873,6 +873,9 @@ static void __cpuinit build_r4000_tlb_re
@@ -872,6 +872,9 @@ static void __cpuinit build_r4000_tlb_re
/* No need for uasm_i_nop */
}
@ -355,7 +355,7 @@
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
#else
@@ -1323,6 +1326,9 @@ build_r4000_tlbchange_handler_head(u32 *
@@ -1322,6 +1325,9 @@ build_r4000_tlbchange_handler_head(u32 *
struct uasm_reloc **r, unsigned int pte,
unsigned int ptr)
{