hak5
/
openwrt
mirror of https://github.com/hak5/openwrt.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

ramips: rt305x: rename SYSTEM_CONFIG_* defines to RT305X_SYSCFG_* 

SVN-Revision: 30889
lede-17.01
Gabor Juhos 2012-03-11 19:05:57 +00:00
parent acb4ad86e5
commit 8cf8ee8f9d
3 changed files with 14 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
View File

@ -61,15 +61,15 @@
#define CHIP_ID_ID_SHIFT 8
#define CHIP_ID_REV_MASK 0xff
#define SYSTEM_CONFIG_CPUCLK_SHIFT 18
#define SYSTEM_CONFIG_CPUCLK_MASK 0x1
#define SYSTEM_CONFIG_CPUCLK_320 0x0
#define SYSTEM_CONFIG_CPUCLK_384 0x1
#define SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT 2
#define SYSTEM_CONFIG_SRAM_CS0_MODE_MASK 0x3
#define SYSTEM_CONFIG_SRAM_CS0_MODE_NORMAL 0
#define SYSTEM_CONFIG_SRAM_CS0_MODE_WDT 1
#define SYSTEM_CONFIG_SRAM_CS0_MODE_BTCOEX 2
#define RT305X_SYSCFG_CPUCLK_SHIFT 18
#define RT305X_SYSCFG_CPUCLK_MASK 0x1
#define RT305X_SYSCFG_CPUCLK_LOW 0x0
#define RT305X_SYSCFG_CPUCLK_HIGH 0x1
#define RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT 2
#define RT305X_SYSCFG_SRAM_CS0_MODE_MASK 0x3
#define RT305X_SYSCFG_SRAM_CS0_MODE_NORMAL 0
#define RT305X_SYSCFG_SRAM_CS0_MODE_WDT 1
#define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX 2
#define RT305X_GPIO_MODE_I2C BIT(0)
#define RT305X_GPIO_MODE_SPI BIT(1)

6
target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c
View File

@ -33,13 +33,13 @@ void __init rt305x_clocks_init(void)
u32 t;
t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
t = ((t >> RT305X_SYSCFG_CPUCLK_SHIFT) & RT305X_SYSCFG_CPUCLK_MASK);
switch (t) {
case SYSTEM_CONFIG_CPUCLK_320:
case RT305X_SYSCFG_CPUCLK_LOW:
rt305x_cpu_clk.rate = 320000000;
break;
case SYSTEM_CONFIG_CPUCLK_384:
case RT305X_SYSCFG_CPUCLK_HIGH:
rt305x_cpu_clk.rate = 384000000;
break;
}

4
target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
View File

@ -229,8 +229,8 @@ void __init rt305x_register_wdt(void)
/* enable WDT reset output on pin SRAM_CS_N */
t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
t |= SYSTEM_CONFIG_SRAM_CS0_MODE_WDT <<
SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT;
t |= RT305X_SYSCFG_SRAM_CS0_MODE_WDT <<
RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT;
rt305x_sysc_wr(t, SYSC_REG_SYSTEM_CONFIG);
platform_device_register(&rt305x_wdt_device);