mirror of https://github.com/hak5/openwrt.git
brcm47xx: add fix "Data bus error" on CardBus ssb SoCs
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 45308lede-17.01
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1d2abb6f16
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@ -0,0 +1,35 @@
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From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Wed, 8 Apr 2015 06:58:11 +0200
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Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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If SoC has a CardBus we can set resources of device at slot 1 only. It's
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impossigle to set bridge resources as it simply overwrites device 1
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configuration and usually results in Data bus error-s.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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---
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drivers/ssb/driver_pcicore.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
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index 15a7ee3..c603d19 100644
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--- a/drivers/ssb/driver_pcicore.c
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+++ b/drivers/ssb/driver_pcicore.c
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@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struct ssb_pcicore *pc,
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SSB_WARN_ON(!pc->hostmode);
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if (unlikely(len != 1 && len != 2 && len != 4))
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goto out;
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+ /* CardBus SoCs allow configuring dev 1 resources only */
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+ if (extpci_core->cardbusmode && dev != 1 &&
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+ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5)
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+ goto out;
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addr = get_cfgspace_addr(pc, bus, dev, func, off);
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if (unlikely(!addr))
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goto out;
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--
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1.8.4.5
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@ -1,6 +1,6 @@
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--- a/drivers/ssb/driver_pcicore.c
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+++ b/drivers/ssb/driver_pcicore.c
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@@ -375,7 +375,7 @@ static void ssb_pcicore_init_hostmode(st
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@@ -388,7 +388,7 @@ static void ssb_pcicore_init_hostmode(st
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set_io_port_base(ssb_pcicore_controller.io_map_base);
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/* Give some time to the PCI controller to configure itself with the new
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* values. Not waiting at this point causes crashes of the machine. */
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