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ar71xx: move AP94 specific PCI init code into a separate file 

SVN-Revision: 18819
lede-17.01
Gabor Juhos 2009-12-18 12:57:05 +00:00
parent 1f114b0dbd
commit 70d31d46a8
9 changed files with 208 additions and 262 deletions
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1
target/linux/ar71xx/config-2.6.30
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@ -3,6 +3,7 @@ CONFIG_32BIT=y
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y

1
target/linux/ar71xx/config-2.6.31
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@ -5,6 +5,7 @@ CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y

1
target/linux/ar71xx/config-2.6.32
View File

@ -5,6 +5,7 @@ CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y

5
target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig
View File

@ -19,6 +19,7 @@ config AR71XX_MACH_DIR_615_C1
config AR71XX_MACH_DIR_825_B1
bool "D-Link DIR-825 rev. B1 board support"
select AR71XX_DEV_M25P80
select AR71XX_DEV_AP94_PCI if PCI
default y
config AR71XX_MACH_PB42
@ -62,6 +63,7 @@ config AR71XX_MACH_RB_4XX
config AR71XX_MACH_WNDR3700
bool "NETGEAR WNDR3700 board support"
select AR71XX_DEV_M25P80
select AR71XX_DEV_AP94_PCI if PCI
default y
config AR71XX_MACH_WNR2000
@ -109,4 +111,7 @@ endmenu
config AR71XX_DEV_M25P80
def_bool n
config AR71XX_DEV_AP94_PCI
def_bool n
endif

1
target/linux/ar71xx/files/arch/mips/ar71xx/Makefile
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@ -13,6 +13,7 @@ obj-y := prom.o irq.o setup.o devices.o gpio.o ar71xx.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_AR71XX_DEV_AP94_PCI) += dev-ap94-pci.o
obj-$(CONFIG_AR71XX_DEV_M25P80) += dev-m25p80.o
obj-$(CONFIG_AR71XX_MACH_AP81) += mach-ap81.o

153
target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.c Normal file
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@ -0,0 +1,153 @@
/*
* Atheros AP94 reference board PCI initialization
*
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <linux/delay.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "dev-ap94-pci.h"
static struct ath9k_platform_data ap94_wmac0_data;
static struct ath9k_platform_data ap94_wmac1_data;
static char ap94_wmac0_mac[6];
static char ap94_wmac1_mac[6];
static int ap94_pci_fixup_enabled;
static struct ar71xx_pci_irq ap94_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}
};
static int ap94_pci_plat_dev_init(struct pci_dev *dev)
{
switch(PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &ap94_wmac0_data;
break;
case 18:
dev->dev.platform_data = &ap94_wmac1_data;
break;
}
return 0;
}
static void ap94_pci_fixup(struct pci_dev *dev)
{
void __iomem *mem;
u16 *cal_data;
u16 cmd;
u32 bar0;
u32 val;
if (!ap94_pci_fixup_enabled)
return;
switch (PCI_SLOT(dev->devfn)) {
case 17:
cal_data = ap94_wmac0_data.eeprom_data;
break;
case 18:
cal_data = ap94_wmac1_data.eeprom_data;
break;
default:
return;
}
if (*cal_data != 0xa55a) {
printk(KERN_ERR "PCI: no calibration data found for %s\n",
pci_name(dev));
return;
}
mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
if (!mem) {
printk(KERN_ERR "PCI: ioremap error for device %s\n",
pci_name(dev));
return;
}
printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
/* Setup the PCI device to allow access to the internal registers */
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config_word(dev, PCI_COMMAND, cmd);
/* set pointer to first reg address */
cal_data += 3;
while (*cal_data != 0xffff) {
u32 reg;
reg = *cal_data++;
val = *cal_data++;
val |= (*cal_data++) << 16;
__raw_writel(val, mem + reg);
udelay(100);
}
pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
dev->vendor = val & 0xffff;
dev->device = (val >> 16) & 0xffff;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
dev->revision = val & 0xff;
dev->class = val >> 8; /* upper 3 bytes */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
iounmap(mem);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap94_pci_fixup);
void __init ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1)
{
if (cal_data0)
memcpy(ap94_wmac0_data.eeprom_data, cal_data0,
sizeof(ap94_wmac0_data.eeprom_data));
if (cal_data1)
memcpy(ap94_wmac1_data.eeprom_data, cal_data1,
sizeof(ap94_wmac1_data.eeprom_data));
if (mac_addr0) {
memcpy(ap94_wmac0_mac, mac_addr0, sizeof(ap94_wmac0_mac));
ap94_wmac0_data.macaddr = ap94_wmac0_mac;
}
if (mac_addr1) {
memcpy(ap94_wmac1_mac, mac_addr1, sizeof(ap94_wmac1_mac));
ap94_wmac1_data.macaddr = ap94_wmac1_mac;
}
ar71xx_pci_plat_dev_init = ap94_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(ap94_pci_irqs), ap94_pci_irqs);
ap94_pci_fixup_enabled = 1;
}

27
target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap94-pci.h Normal file
View File

@ -0,0 +1,27 @@
/*
* Atheros AP94 reference board PCI initialization
*
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _AR71XX_DEV_AP94_PCI_H
#define _AR71XX_DEV_AP94_PCI_H
#include <linux/spi/flash.h>
#if defined(CONFIG_AR71XX_DEV_AP94_PCI)
void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1) __init;
#else
static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
u8 *cal_data1, u8 *mac_addr1)
{
}
#endif
#endif /* _AR71XX_DEV_AP94_PCI_H */

133
target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-825-b1.c
View File

@ -14,17 +14,15 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <linux/delay.h>
#include <linux/rtl8366_smi.h>
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-ap94-pci.h"
#define DIR825B1_GPIO_LED_BLUE_USB 0
#define DIR825B1_GPIO_LED_ORANGE_POWER 1
@ -47,11 +45,6 @@
#define DIR825B1_MAC_LOCATION_0 0x2ffa81b8
#define DIR825B1_MAC_LOCATION_1 0x2ffa8370
static struct ath9k_platform_data dir825b1_wmac0_data;
static struct ath9k_platform_data dir825b1_wmac1_data;
static char dir825b1_wmac0_mac[6];
static char dir825b1_wmac1_mac[6];
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition dir825b1_partitions[] = {
{
@ -143,124 +136,6 @@ static struct platform_device dir825b1_rtl8366_smi_device = {
}
};
#ifdef CONFIG_PCI
static struct ar71xx_pci_irq dir825b1_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}
};
static int dir825b1_pci_plat_dev_init(struct pci_dev *dev)
{
switch(PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &dir825b1_wmac0_data;
break;
case 18:
dev->dev.platform_data = &dir825b1_wmac1_data;
break;
}
return 0;
}
static void dir825b1_pci_fixup(struct pci_dev *dev)
{
void __iomem *mem;
u16 *cal_data;
u16 cmd;
u32 bar0;
u32 val;
if (ar71xx_mach != AR71XX_MACH_DIR_825_B1)
return;
dir825b1_pci_plat_dev_init(dev);
cal_data = dev->dev.platform_data;
if (*cal_data != 0xa55a) {
printk(KERN_ERR "PCI: no calibration data found for %s\n",
pci_name(dev));
return;
}
mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
if (!mem) {
printk(KERN_ERR "PCI: ioremap error for device %s\n",
pci_name(dev));
return;
}
printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
/* Setup the PCI device to allow access to the internal registers */
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config_word(dev, PCI_COMMAND, cmd);
/* set pointer to first reg address */
cal_data += 3;
while (*cal_data != 0xffff) {
u32 reg;
reg = *cal_data++;
val = *cal_data++;
val |= (*cal_data++) << 16;
__raw_writel(val, mem + reg);
udelay(100);
}
pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
dev->vendor = val & 0xffff;
dev->device = (val >> 16) & 0xffff;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
dev->revision = val & 0xff;
dev->class = val >> 8; /* upper 3 bytes */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
iounmap(mem);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
dir825b1_pci_fixup);
static void __init dir825b1_pci_init(void)
{
memcpy(dir825b1_wmac0_data.eeprom_data,
(u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
sizeof(dir825b1_wmac0_data.eeprom_data));
memcpy(dir825b1_wmac1_data.eeprom_data,
(u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
sizeof(dir825b1_wmac1_data.eeprom_data));
memcpy(dir825b1_wmac0_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_0), 6);
dir825b1_wmac0_data.macaddr = dir825b1_wmac0_mac;
memcpy(dir825b1_wmac1_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
dir825b1_wmac1_data.macaddr = dir825b1_wmac1_mac;
ar71xx_pci_plat_dev_init = dir825b1_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(dir825b1_pci_irqs), dir825b1_pci_irqs);
}
#else
static void __init dir825b1_pci_init(void) { }
#endif /* CONFIG_PCI */
static void __init dir825b1_setup(void)
{
u8 mac[6], i;
@ -299,7 +174,11 @@ static void __init dir825b1_setup(void)
ar71xx_add_device_usb();
platform_device_register(&dir825b1_rtl8366_smi_device);
dir825b1_pci_init();
ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
(u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_0),
(u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
(u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_1));
}
MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "D-Link DIR-825 rev. B1", dir825b1_setup);

148
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wndr3700.c
View File

@ -13,17 +13,15 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <linux/delay.h>
#include <linux/rtl8366_smi.h>
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-ap94-pci.h"
#define WNDR3700_GPIO_LED_WPS_ORANGE 0
#define WNDR3700_GPIO_LED_POWER_ORANGE 1
@ -39,6 +37,11 @@
#define WNDR3700_BUTTONS_POLL_INTERVAL 20
#define WNDR3700_WMAC0_MAC_OFFSET 0
#define WNDR3700_WMAC1_MAC_OFFSET 0xc
#define WNDR3700_CALDATA0_OFFSET 0x1000
#define WNDR3700_CALDATA1_OFFSET 0x5000
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition wndr3700_partitions[] = {
{
@ -96,135 +99,6 @@ static struct flash_platform_data wndr3700_flash_data = {
#endif
};
#ifdef CONFIG_PCI
static struct ar71xx_pci_irq wndr3700_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}
};
static struct ath9k_platform_data wndr3700_wmac0_data;
static u8 wndr3700_wmac0_macaddr[6];
static struct ath9k_platform_data wndr3700_wmac1_data;
static u8 wndr3700_wmac1_macaddr[6];
static void wndr3700_pci_fixup(struct pci_dev *dev)
{
void __iomem *mem;
u16 *cal_data;
u16 cmd;
u32 bar0;
u32 val;
if (ar71xx_mach != AR71XX_MACH_WNDR3700)
return;
switch (PCI_SLOT(dev->devfn)) {
case 17:
cal_data = wndr3700_wmac0_data.eeprom_data;
break;
case 18:
cal_data = wndr3700_wmac1_data.eeprom_data;
break;
default:
return;
}
if (*cal_data != 0xa55a) {
printk(KERN_ERR "PCI: no calibration data found for %s\n",
pci_name(dev));
return;
}
mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
if (!mem) {
printk(KERN_ERR "PCI: ioremap error for device %s\n",
pci_name(dev));
return;
}
printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
/* Setup the PCI device to allow access to the internal registers */
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config_word(dev, PCI_COMMAND, cmd);
/* set pointer to first reg address */
cal_data += 3;
while (*cal_data != 0xffff) {
u32 reg;
reg = *cal_data++;
val = *cal_data++;
val |= (*cal_data++) << 16;
__raw_writel(val, mem + reg);
udelay(100);
}
pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
dev->vendor = val & 0xffff;
dev->device = (val >> 16) & 0xffff;
pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
dev->revision = val & 0xff;
dev->class = val >> 8; /* upper 3 bytes */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
iounmap(mem);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
wndr3700_pci_fixup);
static int wndr3700_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 17:
dev->dev.platform_data = &wndr3700_wmac0_data;
break;
case 18:
dev->dev.platform_data = &wndr3700_wmac1_data;
break;
}
return 0;
}
static void __init wndr3700_pci_init(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1fff0000);
memcpy(wndr3700_wmac0_data.eeprom_data, ee + 0x1000,
sizeof(wndr3700_wmac0_data.eeprom_data));
memcpy(wndr3700_wmac0_macaddr, ee, sizeof(wndr3700_wmac0_macaddr));
wndr3700_wmac0_data.macaddr = wndr3700_wmac0_macaddr;
memcpy(wndr3700_wmac1_data.eeprom_data, ee + 0x5000,
sizeof(wndr3700_wmac1_data.eeprom_data));
memcpy(wndr3700_wmac1_macaddr, ee + 12, sizeof(wndr3700_wmac1_macaddr));
wndr3700_wmac1_data.macaddr = wndr3700_wmac1_macaddr;
ar71xx_pci_plat_dev_init = wndr3700_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(wndr3700_pci_irqs), wndr3700_pci_irqs);
}
#else
static inline void wndr3700_pci_init(void) { };
#endif /* CONFIG_PCI */
static struct gpio_led wndr3700_leds_gpio[] __initdata = {
{
.name = "wndr3700:green:power",
@ -282,9 +156,9 @@ static struct platform_device wndr3700_rtl8366_smi_device = {
static void __init wndr3700_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ar71xx_set_mac_base(mac);
ar71xx_set_mac_base(art);
ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
ar71xx_eth0_data.mii_bus_dev = &wndr3700_rtl8366_smi_device.dev;
@ -314,7 +188,11 @@ static void __init wndr3700_setup(void)
platform_device_register(&wndr3700_rtl8366_smi_device);
platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0);
wndr3700_pci_init();
ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET,
art + WNDR3700_WMAC0_MAC_OFFSET,
art + WNDR3700_CALDATA1_OFFSET,
art + WNDR3700_WMAC1_MAC_OFFSET);
}
MIPS_MACHINE(AR71XX_MACH_WNDR3700, "NETGEAR WNDR3700", wndr3700_setup);