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imx6: update patches 

Changes include PCI fixes and various upstream pending patches.

Signed-off-by: Luka Perkov <luka@openwrt.org>

SVN-Revision: 38624
lede-17.01
Luka Perkov 2013-10-30 23:31:26 +00:00
parent 8effe85ada
commit 672a8cd6ba
19 changed files with 220 additions and 152 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
target/linux/imx6/patches-3.10/0029-pfuze100-allow-misprogrammed-id.patch
View File

@ -1,20 +0,0 @@
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -308,9 +308,14 @@ static int pfuze_identify(struct pfuze_c
if (ret)
return ret;
- if (value & 0x0f) {
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
- return -ENODEV;
+ switch (value & 0xf) {
+ case 0x0:
+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
+ case 0x8:
+ break;
+ default:
+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
+ return -ENODEV;
}
ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);

32
target/linux/imx6/patches-3.10/0029-regulator-pfuze100-allow-misprogrammed-ID.patch Normal file
View File

@ -0,0 +1,32 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] regulator: pfuze100: allow misprogrammed ID
prior to week 08 of 2013 Freescale misprogrammed between 1 and 3% of
PFUZE1000 parts with a ID=0x8 instead of the expected ID=0x0
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/regulator/pfuze100-regulator.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -308,9 +308,15 @@ static int pfuze_identify(struct pfuze_c
if (ret)
return ret;
- if (value & 0x0f) {
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
- return -ENODEV;
+ switch (value & 0x0f) {
+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
+ case 0x8:
+ dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
+ case 0x0:
+ break;
+ default:
+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
+ return -ENODEV;
}
ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);

43
target/linux/imx6/patches-3.10/0034-PCI-imx6-add-support-for-legacy-irqs.patch Normal file
View File

@ -0,0 +1,43 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] PCI: imx6: add support for legacy irqs
The i.MX6 supports legacy IRQ's via 155,154,153,152. When devices
are behind a PCIe-to-PCIe switch (at least for the TI XIO2001) the
mapping is reversed from when they are behind a PCIe switch.
This patch still needs some review and clarification before going
upstream.
---
drivers/pci/host/pcie-designware.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -447,7 +447,26 @@ int dw_pcie_map_irq(const struct pci_dev
{
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
- return pp->irq;
+ /* TI XIO2001 PCIe-to-PCI bridge IRQs are flipped it seems */
+ if ( dev->bus && dev->bus->self
+ && (dev->bus->self->vendor == 0x104c)
+ && (dev->bus->self->device == 0x8240)) {
+ switch (pin) {
+ case 1: return pp->irq - 3;
+ case 2: return pp->irq - 2;
+ case 3: return pp->irq - 1;
+ case 4: return pp->irq;
+ default: return -1;
+ }
+ } else {
+ switch (pin) {
+ case 1: return pp->irq;
+ case 2: return pp->irq - 1;
+ case 3: return pp->irq - 2;
+ case 4: return pp->irq - 3;
+ default: return -1;
+ }
+ }
}
static struct hw_pci dw_pci = {

26
target/linux/imx6/patches-3.10/0034-PCI-imx6-swizzle-interrupts.patch
View File

@ -1,26 +0,0 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH 1/5] PCI: imx6: swizzle interrupts
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/pci/host/pcie-designware.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -447,7 +447,13 @@ int dw_pcie_map_irq(const struct pci_dev
{
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
- return pp->irq;
+ switch (pin) {
+ case 1: return pp->irq - 3;
+ case 2: return pp->irq - 2;
+ case 3: return pp->irq - 1;
+ case 4: return pp->irq;
+ default: return -1;
+ }
}
static struct hw_pci dw_pci = {

16
target/linux/imx6/patches-3.12/020-marvell-sky2-macdt.patch → target/linux/imx6/patches-3.10/0050-sky2-allow-mac-to-come-from-dt.patch
View File

@ -1,3 +1,15 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] sky2: allow mac to come from dt
The driver reads the mac address from the device registers which would
need to have been programmed by the bootloader. This patch adds
the ability to pull the mac from devicetree via the aliases/sky2 node.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/net/ethernet/marvell/sky2.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/marvell/sky2.c
+++ b/drivers/net/ethernet/marvell/sky2.c
@@ -44,6 +44,8 @@
@ -17,12 +29,12 @@
if (!dev)
return NULL;
@@ -4802,8 +4805,36 @@
@@ -4802,8 +4805,36 @@ static struct net_device *sky2_init_netd
dev->features |= dev->hw_features;
+ /*
+ * Try to get mac address in the following order:
+ * try to get mac address in the following order:
+ * 1) from device tree data
+ * 2) from internal registers set by bootloader
+ */

8
target/linux/imx6/patches-3.12/0002-ARM-imx6q-Add-pll4_audio_div-to-clock-tree.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -182,7 +182,7 @@ static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "pll2_bus", };
@@ -182,7 +182,7 @@ static const char *periph2_clk2_sels[] =
static const char *periph_sels[] = { "periph_pre", "periph_clk2", };
static const char *periph2_sels[] = { "periph2_pre", "periph2_clk2", };
static const char *axi_sels[] = { "periph", "pll2_pfd2_396m", "periph", "pll3_pfd1_540m", };
@ -23,7 +23,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
static const char *gpu_axi_sels[] = { "axi", "ahb", };
static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m", "pll2_pfd2_396m", };
static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
@@ -196,7 +196,7 @@ static const char *ipu2_di0_sels[] = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di
@@ -196,7 +196,7 @@ static const char *ipu2_di0_sels[] = { "
static const char *ipu2_di1_sels[] = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
static const char *hsi_tx_sels[] = { "pll3_120m", "pll2_pfd2_396m", };
static const char *pcie_axi_sels[] = { "axi", "ahb", };
@ -32,7 +32,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
@@ -205,7 +205,7 @@ static const char *vdo_axi_sels[] = { "axi", "ahb", };
@@ -205,7 +205,7 @@ static const char *vdo_axi_sels[] = { "a
static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
"dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
@ -50,7 +50,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
static struct clk *clk[clk_max];
@@ -359,6 +359,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
@@ -359,6 +359,7 @@ static void __init imx6q_clocks_init(str
clk[twd] = imx_clk_fixed_factor("twd", "arm", 1, 2);
clk[pll4_post_div] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock);

14
target/linux/imx6/patches-3.12/0004-ARM-imx6q-use-common-soc-revision-helpers.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -300,7 +300,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
@@ -300,7 +300,7 @@ static void __init imx6q_clocks_init(str
WARN_ON(!base);
/* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */
@ -25,7 +25,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
post_div_table[1].div = 1;
post_div_table[2].div = 1;
video_div_table[1].div = 1;
@@ -574,7 +574,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
@@ -574,7 +574,8 @@ static void __init imx6q_clocks_init(str
clk_register_clkdev(clk[pll4_post_div], "pll4_post_div", NULL);
clk_register_clkdev(clk[pll4_audio], "pll4_audio", NULL);
@ -37,7 +37,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
}
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -73,7 +73,6 @@ extern void mxc_restart(enum reboot_mode, const char *);
@@ -77,7 +77,6 @@ extern void mxc_restart(enum reboot_mode
extern void mxc_arch_reset_init(void __iomem *);
extern void mxc_arch_reset_init_dt(void);
extern int mx53_revision(void);
@ -47,7 +47,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
extern int mxc_device_init(void);
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -38,16 +38,10 @@
@@ -40,16 +40,10 @@
#include "cpuidle.h"
#include "hardware.h"
@ -65,7 +65,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
switch (rev & 0xff) {
case 0:
@@ -64,6 +58,7 @@ static void __init imx6q_init_revision(void)
@@ -66,6 +60,7 @@ static void __init imx6q_init_revision(v
}
mxc_set_cpu_type(rev >> 16 & 0xff);
@ -73,7 +73,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
}
static void imx6q_restart(enum reboot_mode mode, const char *cmd)
@@ -269,7 +264,7 @@
@@ -269,7 +264,7 @@ static void __init imx6q_init_late(void)
* WAIT mode is broken on TO 1.0 and 1.1, so there is no point
* to run cpuidle on them.
*/
@ -82,7 +82,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6q_cpuidle_init();
if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
@@ -298,7 +293,7 @@
@@ -298,7 +293,7 @@ static void __init imx6q_timer_init(void
of_clk_init(NULL);
clocksource_of_init();
imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",

2
target/linux/imx6/patches-3.12/0005-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch
View File

@ -37,7 +37,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
static struct clk *clk[clk_max];
@@ -342,6 +348,18 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
@@ -342,6 +348,18 @@ static void __init imx6q_clocks_init(str
base + 0xe0, 0, 2, 0, clk_enet_ref_table,
&imx_ccm_lock);

11
target/linux/imx6/patches-3.12/0006-ARM-imx6q-clock-and-Kconfig-update-for-PCIe-support.patch
View File

@ -12,11 +12,9 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/mach-imx/clk-imx6q.c | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index e017915..270f786 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -802,6 +802,8 @@ config SOC_IMX6Q
@@ -801,6 +801,8 @@ config SOC_IMX6Q
select HAVE_IMX_SRC
select HAVE_SMP
select MFD_SYSCON
@ -25,11 +23,9 @@ index e017915..270f786 100644
select PINCTRL
select PINCTRL_IMX6Q
select PL310_ERRATA_588369 if CACHE_PL310
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index e8e5bad..07bc0d8 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -623,6 +623,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
@@ -623,6 +623,10 @@ static void __init imx6q_clocks_init(str
if (ret)
pr_warn("failed to set up CLKO: %d\n", ret);
@ -40,6 +36,3 @@ index e8e5bad..07bc0d8 100644
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
--
1.8.4.1

18
target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
View File

@ -11,7 +11,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -639,6 +639,14 @@
@@ -622,6 +622,14 @@
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
>;
};
@ -26,7 +26,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
ecspi1 {
@@ -811,6 +819,28 @@
@@ -794,6 +802,28 @@
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
@ -55,7 +55,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
hdmi_hdcp {
@@ -1058,6 +1088,13 @@
@@ -1035,6 +1065,13 @@
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
@ -69,7 +69,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
uart2 {
@@ -1076,6 +1113,13 @@
@@ -1053,6 +1090,13 @@
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
>;
};
@ -83,7 +83,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
uart3 {
@@ -1096,6 +1140,13 @@
@@ -1073,6 +1117,13 @@
MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>;
};
@ -97,10 +97,11 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
uart4 {
@@ -1107,6 +1158,15 @@
@@ -1083,6 +1134,15 @@
>;
};
};
+
+ uart5 {
+ pinctrl_uart5_1: uart5grp-1 {
+ fsl,pins = <
@ -109,7 +110,6 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+ >;
+ };
+ };
+
usbotg {
pinctrl_usbotg_1: usbotggrp-1 {
fsl,pins = <

2
target/linux/imx6/patches-3.12/0008-ARM-dts-add-Gateworks-Ventana-support.patch
View File

@ -41,7 +41,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -131,10 +131,19 @@ dtb-$(CONFIG_ARCH_MXC) += \
@@ -133,10 +133,19 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx53-mba53.dtb \
imx53-qsb.dtb \
imx53-smd.dtb \

4
target/linux/imx6/patches-3.12/0009-imx-add-PCI-fixup-for-PEX860X-on-Gateworks-board.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -23,6 +24,7 @@
@@ -26,6 +26,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/opp.h>
@ -23,7 +23,7 @@ Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
#include <linux/phy.h>
#include <linux/reboot.h>
#include <linux/regmap.h>
@@ -78,6 +80,34 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev)
@@ -134,6 +135,34 @@ static int ksz9031rn_phy_fixup(struct ph
return 0;
}

5
target/linux/imx6/patches-3.12/0010-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch
View File

@ -12,8 +12,6 @@ Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index b6bdcd6..e00e9f3 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -241,6 +241,12 @@
@ -39,6 +37,3 @@ index b6bdcd6..e00e9f3 100644
#define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30)
#define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29)
--
1.8.4.1

20
target/linux/imx6/patches-3.12/0021-pfuze100-allow-misprogrammed-id.patch
View File

@ -1,20 +0,0 @@
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -308,9 +308,14 @@ static int pfuze_identify(struct pfuze_c
if (ret)
return ret;
- if (value & 0x0f) {
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
- return -ENODEV;
+ switch (value & 0xf) {
+ case 0x0:
+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
+ case 0x8:
+ break;
+ default:
+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
+ return -ENODEV;
}
ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);

32
target/linux/imx6/patches-3.12/0021-regulator-pfuze100-allow-misprogrammed-ID.patch Normal file
View File

@ -0,0 +1,32 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] regulator: pfuze100: allow misprogrammed ID
prior to week 08 of 2013 Freescale misprogrammed between 1 and 3% of
PFUZE1000 parts with a ID=0x8 instead of the expected ID=0x0
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/regulator/pfuze100-regulator.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -308,9 +308,15 @@ static int pfuze_identify(struct pfuze_c
if (ret)
return ret;
- if (value & 0x0f) {
- dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
- return -ENODEV;
+ switch (value & 0x0f) {
+ /* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
+ case 0x8:
+ dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
+ case 0x0:
+ break;
+ default:
+ dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
+ return -ENODEV;
}
ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);

43
target/linux/imx6/patches-3.12/0034-PCI-imx6-add-support-for-legacy-irqs.patch Normal file
View File

@ -0,0 +1,43 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] PCI: imx6: add support for legacy irqs
The i.MX6 supports legacy IRQ's via 155,154,153,152. When devices
are behind a PCIe-to-PCIe switch (at least for the TI XIO2001) the
mapping is reversed from when they are behind a PCIe switch.
This patch still needs some review and clarification before going
upstream.
---
drivers/pci/host/pcie-designware.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -447,7 +447,26 @@ int dw_pcie_map_irq(const struct pci_dev
{
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
- return pp->irq;
+ /* TI XIO2001 PCIe-to-PCI bridge IRQs are flipped it seems */
+ if ( dev->bus && dev->bus->self
+ && (dev->bus->self->vendor == 0x104c)
+ && (dev->bus->self->device == 0x8240)) {
+ switch (pin) {
+ case 1: return pp->irq - 3;
+ case 2: return pp->irq - 2;
+ case 3: return pp->irq - 1;
+ case 4: return pp->irq;
+ default: return -1;
+ }
+ } else {
+ switch (pin) {
+ case 1: return pp->irq;
+ case 2: return pp->irq - 1;
+ case 3: return pp->irq - 2;
+ case 4: return pp->irq - 3;
+ default: return -1;
+ }
+ }
}
static struct hw_pci dw_pci = {

28
target/linux/imx6/patches-3.12/0034-PCI-imx6-swizzle-interrupts.patch
View File

@ -1,28 +0,0 @@
From 73a0e49b562da9b06e487fb8e051075543495be5 Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Thu, 17 Oct 2013 15:50:48 -0700
Subject: [PATCH 1/5] PCI: imx6: swizzle interrupts
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/pci/host/pcie-designware.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -447,7 +447,13 @@ int dw_pcie_map_irq(const struct pci_dev
{
struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
- return pp->irq;
+ switch (pin) {
+ case 1: return pp->irq - 1;
+ case 2: return pp->irq - 2;
+ case 3: return pp->irq - 3;
+ case 4: return pp->irq;
+ default: return -1;
+ }
}
static struct hw_pci dw_pci = {

12
target/linux/imx6/patches-3.12/0040-i2c-imx-retry-on-NAK.patch
View File

@ -17,22 +17,22 @@ Tested-by: Luka Perkov <luka@openwrt.org>
#define IMX_I2C_BIT_RATE 100000 /* 100kHz */
+#define IMX_I2C_MAX_RETRIES 3 /* number of retries to attempt */
/* IMX I2C registers */
#define IMX_I2C_IADR 0x00 /* i2c slave address */
@@ -198,7 +199,7 @@ static int i2c_imx_acked(struct imx_i2c_
/* IMX I2C registers:
* the I2C register offset is different between SoCs,
@@ -298,7 +299,7 @@ static int i2c_imx_acked(struct imx_i2c_
{
if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) {
dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
- return -EIO; /* No ACK */
+ return -EAGAIN; /* try again */
}
dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
@@ -533,6 +534,7 @@ static int __init i2c_imx_probe(struct p
@@ -633,6 +634,7 @@ static int i2c_imx_probe(struct platform
i2c_imx->adapter.dev.parent = &pdev->dev;
i2c_imx->adapter.nr = pdev->id;
i2c_imx->adapter.dev.of_node = pdev->dev.of_node;
+ i2c_imx->adapter.retries = IMX_I2C_MAX_RETRIES;
i2c_imx->base = base;
pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
/* Get I2C clock */

36
target/linux/imx6/patches-3.10/020-marvell-sky2-macdt.patch → target/linux/imx6/patches-3.12/0050-sky2-allow-mac-to-come-from-dt.patch
View File

@ -1,3 +1,15 @@
From: Tim Harvey <tharvey@gateworks.com>
Subject: [PATCH] sky2: allow mac to come from dt
The driver reads the mac address from the device registers which would
need to have been programmed by the bootloader. This patch adds
the ability to pull the mac from devicetree via the aliases/sky2 node.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
drivers/net/ethernet/marvell/sky2.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/marvell/sky2.c
+++ b/drivers/net/ethernet/marvell/sky2.c
@@ -44,6 +44,8 @@
@ -27,19 +39,19 @@
+ * 2) from internal registers set by bootloader
+ */
+ iap = NULL;
+#ifdef CONFIG_OF
+ struct device_node *np;
+ np = of_find_node_by_path("/aliases");
+ if (np) {
+ const char *path = of_get_property(np, "sky2", NULL);
+ if (path)
+ np = of_find_node_by_path(path);
+ if (np)
+ path = of_get_mac_address(np);
+ if (path)
+ iap = (unsigned char *) path;
+ if (IS_ENABLED(CONFIG_OF)) {
+ struct device_node *np;
+ np = of_find_node_by_path("/aliases");
+ if (np) {
+ const char *path = of_get_property(np, "sky2", NULL);
+ if (path)
+ np = of_find_node_by_path(path);
+ if (np)
+ path = of_get_mac_address(np);
+ if (path)
+ iap = (unsigned char *) path;
+ }
+ }
+#endif
+
+ /*
+ * 2) mac registers set by bootloader