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ramips: rt288x pci code cleanup 

SVN-Revision: 17916
lede-17.01
Gabor Juhos 2009-10-05 18:44:13 +00:00
parent 0e0e945e33
commit 5a37945317
1 changed files with 17 additions and 19 deletions
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36
target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
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@ -42,8 +42,8 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
return 0; return 0;
} }
int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
int size, u32 *val) int where, int size, u32 *val)
{ {
u32 data = 0; u32 data = 0;
@ -60,8 +60,8 @@ int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
int pci_config_write(struct pci_bus *bus, unsigned int devfn, static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val) int where, int size, u32 val)
{ {
u32 data = 0; u32 data = 0;
@ -84,31 +84,29 @@ int pci_config_write(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
struct pci_ops rt2880_pci_ops = { static struct pci_ops rt2880_pci_ops = {
.read = pci_config_read, .read = rt2880_pci_config_read,
.write = pci_config_write, .write = rt2880_pci_config_write,
}; };
static struct resource pci_io_resource = { static struct resource rt2880_pci_io_resource = {
.name = "pci MEM space", .name = "PCI MEM space",
.start = 0x20000000, .start = 0x20000000,
.end = 0x2FFFFFFF, .end = 0x2FFFFFFF,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}; };
static struct resource pci_mem_resource = { static struct resource rt2880_pci_mem_resource = {
.name = "pci IO space", .name = "PCI IO space",
.start = 0x00460000, .start = 0x00460000,
.end = 0x0046FFFF, .end = 0x0046FFFF,
.flags = IORESOURCE_IO, .flags = IORESOURCE_IO,
}; };
struct pci_controller rt2880_controller = { static struct pci_controller rt2880_pci_controller = {
.pci_ops = &rt2880_pci_ops, .pci_ops = &rt2880_pci_ops,
.mem_resource = &pci_io_resource, .mem_resource = &rt2880_pci_io_resource,
.io_resource = &pci_mem_resource, .io_resource = &rt2880_pci_mem_resource,
.mem_offset = 0x00000000UL,
.io_offset = 0x00000000UL,
}; };
void inline read_config(unsigned long bus, unsigned long dev, void inline read_config(unsigned long bus, unsigned long dev,
@ -171,7 +169,7 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
return irq; return irq;
} }
int init_rt2880pci(void) static int __init rt2880_pci_init(void)
{ {
unsigned long val = 0; unsigned long val = 0;
int i; int i;
@ -191,7 +189,7 @@ int init_rt2880pci(void)
write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000); write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val); read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
register_pci_controller(&rt2880_controller); register_pci_controller(&rt2880_pci_controller);
return 0; return 0;
} }
@ -204,4 +202,4 @@ struct pci_fixup pcibios_fixups[] = {
{0} {0}
}; };
arch_initcall(init_rt2880pci); arch_initcall(rt2880_pci_init);