mirror of https://github.com/hak5/openwrt.git
gemini: add ata driver
Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 43885lede-17.01
John Crispin
parent
5a5d558d0f
commit
5789169b1d
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@ -16,6 +16,7 @@ CONFIG_ARM_L1_CACHE_SHIFT=5
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CONFIG_ARM_NR_BANKS=8
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CONFIG_ARM_PATCH_PHYS_VIRT=y
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# CONFIG_ARPD is not set
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CONFIG_ATA=y
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CONFIG_ATAGS=y
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# CONFIG_CACHE_L2X0 is not set
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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@ -129,6 +130,7 @@ CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND3=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xC0000000
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CONFIG_PATA_GEMINI=y
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CONFIG_PCI=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PHYLIB=y
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@ -0,0 +1,234 @@
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/*
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* Support for Gemini PATA
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*
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* Copyright (C) 2009 Janos Laube <janos.dev@gmail.com>
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* Copyright (C) 2010 Frederic Pecourt <opengemini@free.fr>
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* Copyright (C) 2011 Tobias Waldvogel <tobias.waldvogel@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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/* Values of IOMUX
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* 26:24 bits is "IDE IO Select"
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* 111:100 - Reserved
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* 011 - ata0 <-> sata0, sata1; bring out ata1
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* 010 - ata1 <-> sata1, sata0; bring out ata0
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* 001 - ata0 <-> sata0, ata1 <-> sata1; bring out ata1
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* 000 - ata0 <-> sata0, ata1 <-> sata1; bring out ata0
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/libata.h>
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#include <linux/leds.h>
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#include <mach/hardware.h>
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#include <mach/global_reg.h>
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#define DRV_NAME "pata-gemini"
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#define PATA_GEMINI_PORTS 1
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#define PIO_TIMING_REG 0x10
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#define MDMA_TIMING_REG 0x11
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#define UDMA_TIMING0_REG 0x12
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#define UDMA_TIMING1_REG 0x13
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#define CLK_MOD_REG 0x14
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#define CLK_MOD_66M_DEV0_BIT 0
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#define CLK_MOD_66M_DEV1_BIT 1
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#define CLK_MOD_UDMA_DEV0_BIT 4
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#define CLK_MOD_UDMA_DEV1_BIT 5
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#define CLK_MOD_66M_DEV0 (1 << CLK_MOD_66M_DEV0_BIT)
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#define CLK_MOD_66M_DEV1 (1 << CLK_MOD_66M_DEV1_BIT)
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#define CLK_MOD_UDMA_DEV0 (1 << CLK_MOD_UDMA_DEV0_BIT)
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#define CLK_MOD_UDMA_DEV1 (1 << CLK_MOD_UDMA_DEV1_BIT)
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#define SATA_ENABLE_PDEV_MASK 0x01
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#define SATA_ENABLE_PDEV_PM 0x02
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#define SATA_ENABLE_PDEV_ADDED 0x04
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#define SATA_ENABLE_PDEV_REMOVED 0x08
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#define SATA_ENABLE_SDEV_MASK 0x10
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#define SATA_ENABLE_SDEV_PM 0x20
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#define SATA_ENABLE_SDEV_ADDED 0x40
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#define SATA_ENABLE_SDEV_REMOVED 0x80
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MODULE_AUTHOR("Janos Laube <janos.dev@gmail.com>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:" DRV_NAME);
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static unsigned char PIO_TIMING[5] = {
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0xaa, 0xa3, 0xa1, 0x33, 0x31
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};
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static unsigned char TIMING_MW_DMA[4][2] = {
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{ 0x44, 1 }, // 480 4.2
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{ 0x42, 1 }, // 150 13.3
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{ 0x31, 1 }, // 120 16.7
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{ 0x21, 1 }, // 100 20
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};
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static unsigned char TIMING_UDMA[7][2] = {
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{ 0x33, 0 }, //240 16.7
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{ 0x31, 0 }, //160 25
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{ 0x21, 0 }, //120 33.3
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{ 0x21, 1 }, //90 44.4
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{ 0x11, 1 }, //60 66.7
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{ 0x11 | 0x80, 0 }, //40 100
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{ 0x11 | 0x80, 1 }, //30 133
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};
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static struct scsi_host_template pata_gemini_sht = {
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ATA_NCQ_SHT(DRV_NAME),
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.can_queue = 1,
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.sg_tablesize = 128,
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.dma_boundary = 0xffffU,
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};
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static void gemini_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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void __iomem *clk_reg = ap->ioaddr.bmdma_addr + CLK_MOD_REG;
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void __iomem *tim_reg = ap->ioaddr.bmdma_addr + UDMA_TIMING0_REG;
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unsigned short udma = adev->dma_mode;
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unsigned short speed = udma;
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unsigned short devno = adev->devno & 1;
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unsigned short i;
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u8 mod_udma_mask = 1 << (CLK_MOD_UDMA_DEV0_BIT + devno);
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u8 mod_66m_mask = 1 << (CLK_MOD_66M_DEV0_BIT + devno);
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u8 clk_mod;
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u8 timing;
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clk_mod = ioread8(clk_reg);
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clk_mod &= ~mod_udma_mask;
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if (speed & XFER_UDMA_0) {
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i = speed & ~XFER_UDMA_0;
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timing = TIMING_UDMA[i][0];
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clk_mod |= mod_udma_mask;
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if (TIMING_UDMA[i][1])
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clk_mod |= mod_66m_mask;
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} else {
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i = speed & ~XFER_MW_DMA_0;
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timing = TIMING_MW_DMA[i][0];
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clk_mod |= mod_udma_mask;
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if (TIMING_MW_DMA[i][1])
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clk_mod |= mod_66m_mask;
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}
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iowrite8(clk_mod, clk_reg);
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iowrite8(timing, tim_reg + devno);
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return;
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}
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static void gemini_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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void __iomem *pio_reg = ap->ioaddr.bmdma_addr + PIO_TIMING_REG;
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unsigned int pio = adev->pio_mode - XFER_PIO_0;
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iowrite8(PIO_TIMING[pio], pio_reg);
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}
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unsigned int gemini_qc_issue(struct ata_queued_cmd *qc)
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{
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ledtrig_ide_activity();
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return ata_bmdma_qc_issue(qc);
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}
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static struct ata_port_operations pata_gemini_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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.set_dmamode = gemini_set_dmamode,
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.set_piomode = gemini_set_piomode,
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.qc_issue = gemini_qc_issue,
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};
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static struct ata_port_info pata_gemini_portinfo = {
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.flags = 0,
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.udma_mask = ATA_UDMA6,
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.pio_mask = ATA_PIO4,
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.port_ops = &pata_gemini_port_ops,
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};
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static const struct ata_port_info *pata_gemini_ports = &pata_gemini_portinfo;
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static int pata_gemini_probe(struct platform_device *pdev)
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{
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struct ata_host *host;
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struct resource *res;
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unsigned int irq, i;
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void __iomem *mmio_base;
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/* standard bdma init */
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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pr_info(DRV_NAME ": irq %d, io base 0x%08x\n", irq, res->start);
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mmio_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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host = ata_host_alloc_pinfo(&pdev->dev, &pata_gemini_ports, 1);
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if (!host)
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return -ENOMEM;
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for (i = 0; i < host->n_ports; i++) {
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struct ata_port *ap = host->ports[i];
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struct ata_ioports *ioaddr = &ap->ioaddr;
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ioaddr->bmdma_addr = mmio_base;
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ioaddr->cmd_addr = mmio_base + 0x20;
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ioaddr->ctl_addr = mmio_base + 0x36;
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ioaddr->altstatus_addr = ioaddr->ctl_addr;
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ata_sff_std_ports(ioaddr);
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host->ports[i]->cbl = ATA_CBL_SATA;
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}
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return ata_host_activate(host, irq, ata_bmdma_interrupt,
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IRQF_SHARED, &pata_gemini_sht);
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}
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static int pata_gemini_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct ata_host *host = dev_get_drvdata(dev);
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ata_host_detach(host);
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return 0;
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}
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static struct platform_driver pata_gemini_driver = {
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.probe = pata_gemini_probe,
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.remove = pata_gemini_remove,
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.driver.owner = THIS_MODULE,
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.driver.name = DRV_NAME,
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};
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static int __init pata_gemini_module_init(void)
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{
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return platform_driver_probe(&pata_gemini_driver, pata_gemini_probe);
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}
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static void __exit pata_gemini_module_exit(void)
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{
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platform_driver_unregister(&pata_gemini_driver);
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}
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module_init(pata_gemini_module_init);
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module_exit(pata_gemini_module_exit);
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@ -0,0 +1,192 @@
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--- a/arch/arm/mach-gemini/include/mach/global_reg.h
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+++ b/arch/arm/mach-gemini/include/mach/global_reg.h
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@@ -227,7 +227,13 @@
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#define USB0_PLUG_MINIB (1 << 29)
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#define GMAC_GMII (1 << 28)
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#define GMAC_1_ENABLE (1 << 27)
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-/* TODO: define ATA/SATA bits */
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+/* 011 - ata0 <-> sata0, sata1; bring out ata1
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+ * 010 - ata1 <-> sata1, sata0; bring out ata0
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+ * 001 - ata0 <-> sata0, ata1 <-> sata1; bring out ata1
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+ * 000 - ata0 <-> sata0, ata1 <-> sata1; bring out ata0 */
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+#define IDE_IOMUX_MASK (7 << 24)
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+#define IDE_IOMUX_SATA1_SATA0 (2 << 24)
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+#define IDE_IOMUX_SATA0_SATA1 (3 << 24)
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#define USB1_VBUS_ON (1 << 23)
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#define USB0_VBUS_ON (1 << 22)
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#define APB_CLKOUT_ENABLE (1 << 21)
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--- a/arch/arm/mach-gemini/irq.c 2013-02-19 13:38:13.263948000 +0100
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+++ b/arch/arm/mach-gemini/irq.c 2013-02-19 18:24:02.912997292 +0100
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@@ -88,6 +88,9 @@
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irq_set_handler(i, handle_edge_irq);
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mode |= 1 << i;
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level |= 1 << i;
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+ } else if (i >= IRQ_IDE0 && i <= IRQ_IDE1) {
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+ irq_set_handler(i, handle_edge_irq);
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+ mode |= 1 << i;
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} else {
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irq_set_handler(i, handle_level_irq);
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}
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--- a/arch/arm/mach-gemini/common.h
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+++ b/arch/arm/mach-gemini/common.h
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@@ -29,6 +29,7 @@
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extern int platform_register_watchdog(void);
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extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
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extern int platform_register_usb(unsigned int id);
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+extern int platform_register_pata(unsigned int id);
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extern void gemini_restart(char mode, const char *cmd);
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--- a/arch/arm/mach-gemini/devices.c
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+++ b/arch/arm/mach-gemini/devices.c
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@@ -249,3 +249,67 @@
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return platform_device_register(&usb_device[id]);
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}
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+static u64 pata_gemini_dmamask0 = 0xffffffffUL;
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+static u64 pata_gemini_dmamask1 = 0xffffffffUL;
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+
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+static struct resource pata_gemini_resources0[] =
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+{
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+ [0] = {
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+ .start = GEMINI_IDE0_BASE,
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+ .end = GEMINI_IDE0_BASE + 0x40,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = IRQ_IDE0,
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+ .end = IRQ_IDE0,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct resource pata_gemini_resources1[] =
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+{
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+ [0] = {
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+ .start = GEMINI_IDE1_BASE,
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+ .end = GEMINI_IDE1_BASE + 0x40,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .start = IRQ_IDE1,
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+ .end = IRQ_IDE1,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct platform_device pata_gemini_devices[] =
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+{
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+ {
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+ .name = "pata-gemini",
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+ .id = 0,
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+ .dev =
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+ {
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+ .dma_mask = &pata_gemini_dmamask0,
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+ .coherent_dma_mask = 0xffffffff,
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+ },
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+ .num_resources = ARRAY_SIZE(pata_gemini_resources0),
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+ .resource = pata_gemini_resources0,
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+ },
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+ {
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+ .name = "pata-gemini",
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+ .id = 1,
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+ .dev =
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+ {
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+ .dma_mask = &pata_gemini_dmamask1,
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+ .coherent_dma_mask = 0xffffffff,
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+ },
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+ .num_resources = ARRAY_SIZE(pata_gemini_resources1),
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+ .resource = pata_gemini_resources1,
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+ },
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+};
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+
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+int __init platform_register_pata(unsigned int id)
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+{
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+ if (id > 1)
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+ return -EINVAL;
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+
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+ return platform_device_register(&pata_gemini_devices[id]);
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+}
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--- a/arch/arm/mach-gemini/mm.c
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+++ b/arch/arm/mach-gemini/mm.c
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@@ -24,6 +24,11 @@
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.length = SZ_512K,
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.type = MT_DEVICE,
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}, {
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+ .virtual = (unsigned long)IO_ADDRESS(GEMINI_SATA_BASE),
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+ .pfn = __phys_to_pfn(GEMINI_SATA_BASE),
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+ .length = SZ_512K,
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+ .type = MT_DEVICE,
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+ }, {
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.virtual = (unsigned long)IO_ADDRESS(GEMINI_UART_BASE),
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.pfn = __phys_to_pfn(GEMINI_UART_BASE),
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.length = SZ_512K,
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--- a/drivers/ata/Kconfig
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+++ b/drivers/ata/Kconfig
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@@ -433,6 +433,16 @@ config PATA_EFAR
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If unsure, say N.
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+config PATA_GEMINI
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+ tristate "Gemini PATA support (Experimental)"
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+ depends on ARCH_GEMINI
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+ help
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+ This option enables support for the Gemini PATA-Controller.
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+ Note that the Gemini SoC has no native SATA-Controller but an
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+ onboard PATA-SATA bridge.
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+
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+ If unsure, say N.
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+
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config PATA_HPT366
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tristate "HPT 366/368 PATA support"
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depends on PCI
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--- a/drivers/ata/Makefile
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+++ b/drivers/ata/Makefile
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@@ -45,6 +45,7 @@
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obj-$(CONFIG_PATA_CYPRESS) += pata_cypress.o
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obj-$(CONFIG_PATA_EFAR) += pata_efar.o
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obj-$(CONFIG_PATA_EP93XX) += pata_ep93xx.o
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+obj-$(CONFIG_PATA_GEMINI) += pata_gemini.o
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obj-$(CONFIG_PATA_HPT366) += pata_hpt366.o
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obj-$(CONFIG_PATA_HPT37X) += pata_hpt37x.o
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obj-$(CONFIG_PATA_HPT3X2N) += pata_hpt3x2n.o
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--- a/arch/arm/mach-gemini/board-nas4220b.c
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+++ b/arch/arm/mach-gemini/board-nas4220b.c
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@@ -146,11 +146,28 @@
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GLOBAL_MISC_CTRL));
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}
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+static void __init sata_ib4220b_init(void)
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+{
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+ unsigned val;
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+
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+ val = readl((void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
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+ GLOBAL_MISC_CTRL));
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+ val &= ~(IDE_IOMUX_MASK | PFLASH_PADS_DISABLE);
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||||
+ val |= IDE_PADS_ENABLE;
|
||||
+ writel(val, (void __iomem*)(IO_ADDRESS(GEMINI_GLOBAL_BASE) +
|
||||
+ GLOBAL_MISC_CTRL));
|
||||
+
|
||||
+ /* enabling ports for presence detection, master only */
|
||||
+ writel(0x00000001, (void __iomem*)(IO_ADDRESS(GEMINI_SATA_BASE) + 0x18));
|
||||
+ writel(0x00000001, (void __iomem*)(IO_ADDRESS(GEMINI_SATA_BASE) + 0x1c));
|
||||
+}
|
||||
+
|
||||
static void __init ib4220b_init(void)
|
||||
{
|
||||
gemini_gpio_init();
|
||||
ib4220b_gmac_init();
|
||||
usb_ib4220b_init();
|
||||
+ sata_ib4220b_init();
|
||||
platform_register_uart();
|
||||
platform_register_pflash(SZ_16M, NULL, 0);
|
||||
platform_device_register(&ib4220b_led_device);
|
||||
@@ -161,6 +178,8 @@
|
||||
platform_register_ethernet(&ib4220b_gmac_data);
|
||||
platform_register_usb(0);
|
||||
platform_register_usb(1);
|
||||
+ platform_register_pata(0);
|
||||
+ platform_register_pata(1);
|
||||
}
|
||||
|
||||
MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
|
||||
Loading…
Reference in New Issue