mirror of https://github.com/hak5/openwrt.git
lantiq: align falcon code with ar9-vr9 code
Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>openwrt-18.06
parent
001a50d314
commit
49acec5b5f
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@ -184,7 +184,7 @@
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TRACE (MPS, DBG_LEVEL_HIGH, ("Providing Buffers...\n"));
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--- /dev/null
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+++ b/src/mps/drv_mps_vmmc_falcon.c
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@@ -0,0 +1,463 @@
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@@ -0,0 +1,396 @@
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+/******************************************************************************
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+
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+ Copyright (c) 2009
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@ -254,12 +254,7 @@
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+IFX_void_t ifx_mps_release (IFX_void_t);
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+extern IFX_uint32_t ifx_mps_reset_structures (mps_comm_dev * pMPSDev);
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+extern IFX_int32_t ifx_mps_bufman_close (IFX_void_t);
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+IFX_int32_t ifx_mps_wdog_callback (IFX_ulong_t wdog_cleared_ok_count);
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+extern IFXOS_event_t fw_ready_evt;
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+/* ============================= */
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+/* Local function declaration */
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+/* ============================= */
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+static IFX_int32_t ifx_mps_fw_wdog_start_ar9(IFX_void_t);
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+
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+/* ============================= */
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+/* Local variable definition */
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@ -277,20 +272,6 @@
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+ ******************************************************************************/
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+
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+/**
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+ * Start AR9 EDSP firmware watchdog mechanism.
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+ * Called after download and startup of VPE1.
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+ *
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+ * \param none
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+ * \return 0 IFX_SUCCESS
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+ * \return -1 IFX_ERROR
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+ * \ingroup Internal
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+ */
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+IFX_int32_t ifx_mps_fw_wdog_start_ar9()
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+{
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+ return IFX_SUCCESS;
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+}
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+
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+/**
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+ * Firmware download to Voice CPU
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+ * This function performs a firmware download to the coprocessor.
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+ *
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@ -447,7 +428,7 @@
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+ TRACE (MPS, DBG_LEVEL_HIGH,
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+ ("MPS: FW checksum error: img=0x%08x calc=0x%08x\r\n",
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+ pFW_img_data->crc32, cksum));
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+ /*return IFX_ERROR;*/
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+ return IFX_ERROR;
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+ }
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+ }
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+ else
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@ -458,10 +439,7 @@
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+
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+ /* start VPE1 */
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+ ifx_mps_release ();
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+#if 0
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+ /* start FW watchdog mechanism */
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+ ifx_mps_fw_wdog_start_ar9();
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+#endif
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+
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+ /* get FW version */
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+ return ifx_mps_get_fw_version (0);
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+}
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@ -486,8 +464,6 @@
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+ ifx_mps_init_gpt ();
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+ /* let CPU1 run */
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+ ifx_mps_release ();
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+ /* start FW watchdog mechanism */
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+ ifx_mps_fw_wdog_start_ar9();
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+ TRACE (MPS, DBG_LEVEL_HIGH, ("IFX_MPS: Restarting firmware..."));
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+ return ifx_mps_get_fw_version (0);
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+}
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@ -502,10 +478,6 @@
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+{
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+ if (vpe1_started)
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+ {
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+ /* stop software watchdog timer */
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+ vpe1_sw_wdog_stop (0);
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+ /* clean up the BSP callback function */
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+ vpe1_sw_wdog_register_reset_handler (IFX_NULL);
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+ /* stop VPE1 */
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+ vpe1_sw_stop (0);
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+ vpe1_started = 0;
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@ -528,8 +500,6 @@
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+ /* if VPE1 is already started, stop it */
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+ if (vpe1_started)
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+ {
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+ /* stop software watchdog timer first */
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+ vpe1_sw_wdog_stop (0);
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+ vpe1_sw_stop (0);
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+ vpe1_started = 0;
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+ }
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@ -577,43 +547,6 @@
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+}
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+
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+/**
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+ * WDT callback.
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+ * This function is called by BSP (module softdog_vpe) in case if software
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+ * watchdog timer expiration is detected by BSP.
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+ * This function needs to be registered at BSP as WDT callback using
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+ * vpe1_sw_wdog_register_reset_handler() API.
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+ *
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+ * \return 0 IFX_SUCCESS, cannot fail
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+ * \ingroup Internal
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+ */
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+IFX_int32_t ifx_mps_wdog_callback (IFX_ulong_t wdog_cleared_ok_count)
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+{
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+#ifdef DEBUG
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+ TRACE (MPS, DBG_LEVEL_HIGH,
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+ ("MPS: watchdog callback! arg=0x%08x\r\n", wdog_cleared_ok_count));
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+#endif /* DEBUG */
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+
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+ /* reset SmartSLIC is done by FW */
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+ /* recalculate and compare the firmware checksum */
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+ ifx_mps_fw_crc_compare(cpu1_base_addr, pFW_img_data);
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+
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+ /* dump exception area on a console */
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+ ifx_mps_dump_fw_xcpt(cpu1_base_addr, pFW_img_data);
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+
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+ if (IFX_NULL != ifx_wdog_callback)
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+ {
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+ /* call VMMC driver */
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+ ifx_wdog_callback (wdog_cleared_ok_count);
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+ }
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+ else
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+ {
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+ TRACE (MPS, DBG_LEVEL_HIGH,
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+ (KERN_WARNING "MPS: VMMC watchdog timer callback is NULL.\r\n"));
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+ }
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+ return 0;
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+}
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+
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+/**
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+ * Register WDT callback.
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+ * This function is called by VMMC driver to register its callback in
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+ * the MPS driver.
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