ath5k: disable the 32 khz sleep clock, atheros also does this, might improve stability

SVN-Revision: 27366
lede-17.01
Felix Fietkau 2011-07-03 01:08:35 +00:00
parent b8dcd316eb
commit 45d4cee226
1 changed files with 18 additions and 0 deletions

View File

@ -0,0 +1,18 @@
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -1287,15 +1287,6 @@ int ath5k_hw_reset(struct ath5k_hw *ah,
*/
ath5k_hw_dma_init(ah);
-
- /* Enable 32KHz clock function for AR5212+ chips
- * Set clocks to 32KHz operation and use an
- * external 32KHz crystal when sleeping if one
- * exists */
- if (ah->ah_version == AR5K_AR5212 &&
- op_mode != NL80211_IFTYPE_AP)
- ath5k_hw_set_sleep_clock(ah, true);
-
/*
* Disable beacons and reset the TSF
*/