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ramips: dts file cleanup 

cleanup some inconsistencies in the dts files

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 37783
lede-17.01
John Crispin 2013-08-14 19:08:44 +00:00
parent eb7669fc5d
commit 41f62983d3
6 changed files with 14 additions and 31 deletions
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8
target/linux/ramips/dts/MT7620a.dts
View File

@ -6,10 +6,6 @@
compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
model = "Ralink MT7620a + MT7610e evaluation board"; model = "Ralink MT7620a + MT7610e evaluation board";
memory@0 {
reg = <0x0 0x2000000>;
};
palmbus@10000000 { palmbus@10000000 {
sysc@0 { sysc@0 {
ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2"; ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2";
@ -63,14 +59,14 @@
status = "okay"; status = "okay";
port@4 { port@4 {
compatible = "lantiq,mt7620a-gsw-port", "ralink,eth-port"; compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
reg = <4>; reg = <4>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&phy4>; phy-handle = <&phy4>;
}; };
port@5 { port@5 {
compatible = "lantiq,mt7620a-gsw-port", "ralink,eth-port"; compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port";
reg = <5>; reg = <5>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&phy5>; phy-handle = <&phy5>;

7
target/linux/ramips/dts/MT7620a_MT7610e.dts
View File

@ -6,13 +6,6 @@
compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
model = "Ralink MT7620A evaluation board"; model = "Ralink MT7620A evaluation board";
memory@0 {
reg = <0x0 0x2000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
palmbus@10000000 { palmbus@10000000 {
sysc@0 { sysc@0 {

4
target/linux/ramips/dts/RP-N53.dts
View File

@ -6,10 +6,6 @@
compatible = "asus,rp-n53", "ralink,mt7620a-soc"; compatible = "asus,rp-n53", "ralink,mt7620a-soc";
model = "Asus RP-N53"; model = "Asus RP-N53";
chosen {
bootargs = "console=ttyS0,57600";
};
palmbus@10000000 { palmbus@10000000 {
sysc@0 { sysc@0 {
ralink,pinmux = "spi", "uartlite", "wled", "ephy", "i2c"; ralink,pinmux = "spi", "uartlite", "wled", "ephy", "i2c";

2
target/linux/ramips/dts/WNCE2001.dts
View File

@ -3,8 +3,6 @@
/include/ "rt3050.dtsi" /include/ "rt3050.dtsi"
/ { / {
#address-cells = <1>;
#size-cells = <1>;
compatible = "WNCE2001", "ralink,rt3052-soc"; compatible = "WNCE2001", "ralink,rt3052-soc";
model = "Netgear WNCE2001"; model = "Netgear WNCE2001";

22
target/linux/ramips/dts/rt3050.dtsi
View File

@ -1,7 +1,7 @@
/ { / {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc"; compatible = "ralink,rt3050-soc", "ralink,rt3050-soc", "ralink,rt3350-soc";
cpus { cpus {
cpu@0 { cpu@0 {
@ -29,12 +29,12 @@
#size-cells = <1>; #size-cells = <1>;
sysc@0 { sysc@0 {
compatible = "ralink,rt3052-sysc", "ralink,rt3050-sysc"; compatible = "ralink,rt3050-sysc";
reg = <0x0 0x100>; reg = <0x0 0x100>;
}; };
timer@100 { timer@100 {
compatible = "ralink,rt3052-timer", "ralink,rt2880-timer"; compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
reg = <0x100 0x20>; reg = <0x100 0x20>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
@ -42,7 +42,7 @@
}; };
watchdog@120 { watchdog@120 {
compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt"; compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
reg = <0x120 0x10>; reg = <0x120 0x10>;
resets = <&rstctrl 8>; resets = <&rstctrl 8>;
@ -53,7 +53,7 @@
}; };
intc: intc@200 { intc: intc@200 {
compatible = "ralink,rt3052-intc", "ralink,rt2880-intc"; compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>; reg = <0x200 0x100>;
resets = <&rstctrl 19>; resets = <&rstctrl 19>;
@ -67,7 +67,7 @@
}; };
memc@300 { memc@300 {
compatible = "ralink,rt3052-memc", "ralink,rt3050-memc"; compatible = "ralink,rt3050-memc";
reg = <0x300 0x100>; reg = <0x300 0x100>;
resets = <&rstctrl 20>; resets = <&rstctrl 20>;
@ -78,7 +78,7 @@
}; };
uart@500 { uart@500 {
compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a"; compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>; reg = <0x500 0x100>;
resets = <&rstctrl 12>; resets = <&rstctrl 12>;
@ -93,7 +93,7 @@
}; };
gpio0: gpio@600 { gpio0: gpio@600 {
compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>; reg = <0x600 0x34>;
gpio-controller; gpio-controller;
@ -115,7 +115,7 @@
}; };
gpio1: gpio@638 { gpio1: gpio@638 {
compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
reg = <0x638 0x24>; reg = <0x638 0x24>;
gpio-controller; gpio-controller;
@ -131,7 +131,7 @@
}; };
gpio2: gpio@660 { gpio2: gpio@660 {
compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
reg = <0x660 0x24>; reg = <0x660 0x24>;
gpio-controller; gpio-controller;
@ -160,7 +160,7 @@
}; };
uartlite@c00 { uartlite@c00 {
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>; reg = <0xc00 0x100>;
resets = <&rstctrl 19>; resets = <&rstctrl 19>;

2
target/linux/ramips/dts/rt3883.dtsi
View File

@ -202,7 +202,7 @@
status = "disabled"; status = "disabled";
port@0 { port@0 {
compatible = "lantiq,rt3883-port", "ralink,eth-port"; compatible = "ralink,rt3883-port", "ralink,eth-port";
reg = <0>; reg = <0>;
}; };