mirror of https://github.com/hak5/openwrt.git
brcm47xx: add vectored interrupts
This adds support for vectored interrupts in this SoC. This is supported by the 74K cpus. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38975lede-17.01
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25ca004f24
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3fb7e8b851
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@ -42,6 +42,7 @@ CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32_R1=y
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# CONFIG_CPU_MIPS32_R2 is not set
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CONFIG_CPU_MIPSR1=y
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CONFIG_CPU_MIPSR2_IRQ_VI=y
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CONFIG_CPU_R4K_CACHE_TLB=y
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CONFIG_CPU_R4K_FPU=y
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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@ -0,0 +1,66 @@
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From d9e8fd334d85fc8e4a2867655309a60c8de80883 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Wed, 20 Nov 2013 23:03:35 +0100
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Subject: [PATCH 18/18] bcm47xx: add cpu_has_vint
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---
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arch/mips/bcm47xx/Kconfig | 1 +
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arch/mips/bcm47xx/irq.c | 24 ++++++++++++++++++++++++
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2 files changed, 25 insertions(+)
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--- a/arch/mips/bcm47xx/Kconfig
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+++ b/arch/mips/bcm47xx/Kconfig
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@@ -21,6 +21,7 @@ config BCM47XX_SSB
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config BCM47XX_BCMA
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bool "BCMA Support for Broadcom BCM47XX"
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select SYS_HAS_CPU_MIPS32_R2
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+ select CPU_MIPSR2_IRQ_VI
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select BCMA
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select BCMA_HOST_SOC
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select BCMA_DRIVER_MIPS
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--- a/arch/mips/bcm47xx/irq.c
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+++ b/arch/mips/bcm47xx/irq.c
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@@ -25,6 +25,7 @@
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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+#include <asm/setup.h>
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#include <asm/irq_cpu.h>
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#include <bcm47xx.h>
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@@ -50,6 +51,18 @@ void plat_irq_dispatch(void)
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do_IRQ(6);
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}
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+#define DEFINE_HWx_IRQDISPATCH(x) \
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+ static void bcm47xx_hw ## x ## _irqdispatch(void) \
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+ { \
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+ do_IRQ(x); \
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+ }
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+DEFINE_HWx_IRQDISPATCH(2)
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+DEFINE_HWx_IRQDISPATCH(3)
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+DEFINE_HWx_IRQDISPATCH(4)
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+DEFINE_HWx_IRQDISPATCH(5)
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+DEFINE_HWx_IRQDISPATCH(6)
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+DEFINE_HWx_IRQDISPATCH(7)
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+
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void __init arch_init_irq(void)
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{
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#ifdef CONFIG_BCM47XX_BCMA
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@@ -63,5 +76,16 @@ void __init arch_init_irq(void)
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cp0_compare_irq = 7;
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}
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#endif
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+
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mips_cpu_irq_init();
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+
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+ if (cpu_has_vint) {
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+ pr_info("Setting up vectored interrupts\n");
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+ set_vi_handler(2, bcm47xx_hw2_irqdispatch);
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+ set_vi_handler(3, bcm47xx_hw3_irqdispatch);
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+ set_vi_handler(4, bcm47xx_hw4_irqdispatch);
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+ set_vi_handler(5, bcm47xx_hw5_irqdispatch);
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+ set_vi_handler(6, bcm47xx_hw6_irqdispatch);
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+ set_vi_handler(7, bcm47xx_hw7_irqdispatch);
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+ }
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}
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