mirror of https://github.com/hak5/openwrt.git
generic: ar8216: add defines for the AR8316 POSTRIP register
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35539lede-17.01
parent
5ed480598d
commit
393163b098
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@ -788,7 +788,7 @@ ar8316_hw_init(struct ar8216_priv *priv)
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u32 val, newval;
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struct mii_bus *bus;
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val = priv->read(priv, 0x8);
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val = priv->read(priv, AR8316_REG_POSTRIP);
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if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
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if (priv->port4_phy) {
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@ -812,7 +812,7 @@ ar8316_hw_init(struct ar8216_priv *priv)
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if (val == newval)
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goto out;
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priv->write(priv, 0x8, newval);
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priv->write(priv, AR8316_REG_POSTRIP, newval);
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/* Initialize the ports */
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bus = priv->mii_bus;
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@ -255,6 +255,36 @@
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#define AR8236_STATS_TXDEFER 0xa0
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#define AR8236_STATS_TXLATECOL 0xa4
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#define AR8316_REG_POSTRIP 0x0008
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#define AR8316_POSTRIP_MAC0_GMII_EN BIT(0)
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#define AR8316_POSTRIP_MAC0_RGMII_EN BIT(1)
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#define AR8316_POSTRIP_PHY4_GMII_EN BIT(2)
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#define AR8316_POSTRIP_PHY4_RGMII_EN BIT(3)
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#define AR8316_POSTRIP_MAC0_MAC_MODE BIT(4)
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#define AR8316_POSTRIP_RTL_MODE BIT(5)
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#define AR8316_POSTRIP_RGMII_RXCLK_DELAY_EN BIT(6)
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#define AR8316_POSTRIP_RGMII_TXCLK_DELAY_EN BIT(7)
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#define AR8316_POSTRIP_SERDES_EN BIT(8)
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#define AR8316_POSTRIP_SEL_ANA_RST BIT(9)
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#define AR8316_POSTRIP_GATE_25M_EN BIT(10)
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#define AR8316_POSTRIP_SEL_CLK25M BIT(11)
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#define AR8316_POSTRIP_HIB_PULSE_HW BIT(12)
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#define AR8316_POSTRIP_DBG_MODE_I BIT(13)
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#define AR8316_POSTRIP_MAC5_MAC_MODE BIT(14)
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#define AR8316_POSTRIP_MAC5_PHY_MODE BIT(15)
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#define AR8316_POSTRIP_POWER_DOWN_HW BIT(16)
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#define AR8316_POSTRIP_LPW_STATE_EN BIT(17)
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#define AR8316_POSTRIP_MAN_EN BIT(18)
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#define AR8316_POSTRIP_PHY_PLL_ON BIT(19)
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#define AR8316_POSTRIP_LPW_EXIT BIT(20)
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#define AR8316_POSTRIP_TXDELAY_S0 BIT(21)
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#define AR8316_POSTRIP_TXDELAY_S1 BIT(22)
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#define AR8316_POSTRIP_RXDELAY_S0 BIT(23)
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#define AR8316_POSTRIP_LED_OPEN_EN BIT(24)
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#define AR8316_POSTRIP_SPI_EN BIT(25)
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#define AR8316_POSTRIP_RXDELAY_S1 BIT(26)
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#define AR8316_POSTRIP_POWER_ON_SEL BIT(31)
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#define AR8327_NUM_PORTS 7
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#define AR8327_NUM_PHYS 5
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#define AR8327_PORTS_ALL 0x7f
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