mirror of https://github.com/hak5/openwrt.git
ramips: drop obsolete sd card driver code
The pinmux for all SoCs using this driver is now set via the pinmux. It makes this code obsolete. Some of the code targeting the mt76x8 SoCs is still required. The sd card pins share the pads with the EPHY. These pads need to be switched to digital mode if the pins are used for sd cards. The eMMC 8-bit mode has to be enabled via pinmux instead of a kernel option. The uart2 group need to be set to function "sdxc d5 d4", pwm1 to "sdxc d6" and pwm0 to "sdxc d7" to do so. It can't be done by as part of a default pinmux, as it would break the normal operation of uart2. Signed-off-by: Mathias Kresin <dev@kresin.me>openwrt-19.07
parent
563a5b5f94
commit
287b7aa583
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@ -10,7 +10,3 @@ config MTK_MMC_CD_POLL
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bool "Card Detect with Polling"
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bool "Card Detect with Polling"
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depends on MTK_MMC
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depends on MTK_MMC
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config MTK_MMC_EMMC_8BIT
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bool "eMMC 8-bit support"
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depends on MTK_MMC && RALINK_MT7628
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@ -2207,27 +2207,15 @@ static int msdc_drv_probe(struct platform_device *pdev)
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int ret;
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int ret;
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u32 reg;
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u32 reg;
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// Set the pins for sdxc to sdxc mode
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//FIXME: this should be done by pinconf and not by the sd driver
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//FIXME: this should be done by pinctl and not by the sd driver
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if (ralink_soc == MT762X_SOC_MT7688 ||
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if (ralink_soc == MT762X_SOC_MT7620A ||
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ralink_soc == MT762X_SOC_MT7628AN) {
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ralink_soc == MT762X_SOC_MT7621AT) {
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/* set EPHY pads to digital mode */
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reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE +
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0x60)) & ~(0x3 << 18);
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if (ralink_soc == MT762X_SOC_MT7620A)
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reg |= 0x1 << 18;
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} else {
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reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c));
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reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c));
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reg |= 0x1e << 16;
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reg |= 0x1e << 16;
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sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg);
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sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg);
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reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE +
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0x60)) & ~(0x3 << 10);
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#if defined(CONFIG_MTK_MMC_EMMC_8BIT)
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reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30;
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#endif
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}
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}
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sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60), reg);
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hw = &msdc0_hw;
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hw = &msdc0_hw;
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if (of_property_read_bool(pdev->dev.of_node, "mtk,wp-en"))
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if (of_property_read_bool(pdev->dev.of_node, "mtk,wp-en"))
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