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ramips: drop obsolete sd card driver code 

The pinmux for all SoCs using this driver is now set via the pinmux. It
makes this code obsolete.

Some of the code targeting the mt76x8 SoCs is still required. The sd
card pins share the pads with the EPHY. These pads need to be switched
to digital mode if the pins are used for sd cards.

The eMMC 8-bit mode has to be enabled via pinmux instead of a kernel
option. The uart2 group need to be set to function "sdxc d5 d4", pwm1
to "sdxc d6" and pwm0 to "sdxc d7" to do so. It can't be done by as
part of a default pinmux, as it would break the normal operation of
uart2.

Signed-off-by: Mathias Kresin <dev@kresin.me>
openwrt-19.07
Mathias Kresin 2018-08-30 19:16:53 +02:00
parent 563a5b5f94
commit 287b7aa583
2 changed files with 4 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/Kconfig
View File

@ -10,7 +10,3 @@ config MTK_MMC_CD_POLL
bool "Card Detect with Polling"
depends on MTK_MMC
config MTK_MMC_EMMC_8BIT
bool "eMMC 8-bit support"
depends on MTK_MMC && RALINK_MT7628

20
target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c
View File

@ -2207,27 +2207,15 @@ static int msdc_drv_probe(struct platform_device *pdev)
int ret;
u32 reg;
// Set the pins for sdxc to sdxc mode
//FIXME: this should be done by pinctl and not by the sd driver
if (ralink_soc == MT762X_SOC_MT7620A ||
ralink_soc == MT762X_SOC_MT7621AT) {
reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE +
0x60)) & ~(0x3 << 18);
if (ralink_soc == MT762X_SOC_MT7620A)
reg |= 0x1 << 18;
} else {
//FIXME: this should be done by pinconf and not by the sd driver
if (ralink_soc == MT762X_SOC_MT7688 ||
ralink_soc == MT762X_SOC_MT7628AN) {
/* set EPHY pads to digital mode */
reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c));
reg |= 0x1e << 16;
sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg);
reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE +
0x60)) & ~(0x3 << 10);
#if defined(CONFIG_MTK_MMC_EMMC_8BIT)
reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30;
#endif
}
sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60), reg);
hw = &msdc0_hw;
if (of_property_read_bool(pdev->dev.of_node, "mtk,wp-en"))