add support for 2.6.32

SVN-Revision: 19520
lede-17.01
Florian Fainelli 2010-02-04 14:35:30 +00:00
parent 917d883e0c
commit 16006896b4
6 changed files with 89 additions and 17 deletions

View File

@ -1,33 +1,37 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATA=y
# CONFIG_ATA_PIIX is not set
# CONFIG_BCM47XX is not set
# CONFIG_BINARY_PRINTF is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
CONFIG_BLK_DEV_SD=y
CONFIG_BOOT_RAW=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2 is not set
# CONFIG_CPU_LOONGSON2E is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
@ -49,8 +53,8 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
# CONFIG_DEBUG_FS is not set
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
@ -59,8 +63,9 @@ CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_EXT2_FS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
@ -73,15 +78,14 @@ CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
@ -90,14 +94,15 @@ CONFIG_KEXEC=y
CONFIG_KORINA=y
# CONFIG_LEDS_GPIO is not set
CONFIG_LEDS_MIKROTIK_RB532=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MIKROTIK_RB532=y
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=4
# CONFIG_MIPS_MACHINE is not set
@ -106,16 +111,15 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MIPS=y
CONFIG_MTD_BLOCK2MTD=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_AMDSTD is not set
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_NAND_VERIFY_WRITE=y
CONFIG_MTD_NAND=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_ROOTFS_ROOT_DEV is not set
# CONFIG_MTD_ROOTFS_SPLIT is not set
@ -135,10 +139,10 @@ CONFIG_PCSPKR_PLATFORM=y
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RC32434_WDT=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_SCSI=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SCSI=y
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
@ -152,17 +156,17 @@ CONFIG_SCSI=y
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TRACING_SUPPORT=y
CONFIG_TRAD_SIGNALS=y
CONFIG_VIA_RHINE_MMIO=y
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_VIA_RHINE=y
CONFIG_VIA_RHINE_MMIO=y
CONFIG_YAFFS_9BYTE_TAGS=y
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_AUTO_YAFFS2=y

View File

@ -0,0 +1,20 @@
--- a/arch/mips/rb532/prom.c
+++ b/arch/mips/rb532/prom.c
@@ -67,6 +67,7 @@ static inline unsigned long tag2ul(char
return simple_strtoul(num, 0, 10);
}
+extern char __image_cmdline[];
void __init prom_setup_cmdline(void)
{
char cmd_line[CL_SIZE];
@@ -109,6 +110,9 @@ void __init prom_setup_cmdline(void)
}
*(cp++) = ' ';
+ strcpy(cp,(__image_cmdline));
+ cp += strlen(__image_cmdline);
+
i = strlen(arcs_cmdline);
if (i > 0) {
*(cp++) = ' ';

View File

@ -0,0 +1,48 @@
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -140,6 +140,19 @@ static struct platform_device cf_slot0 =
};
/* Resources and device for NAND */
+
+/*
+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
+ * will not be able to find the kernel that we load. So set the oobinfo
+ * when creating the partitions
+ */
+static struct nand_ecclayout rb532_nand_ecclayout = {
+ .eccbytes = 6,
+ .eccpos = { 8, 9, 10, 13, 14, 15 },
+ .oobavail = 9,
+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
+};
+
static int rb532_dev_ready(struct mtd_info *mtd)
{
return gpio_get_value(GPIO_RDY);
@@ -281,6 +294,16 @@ static void __init parse_mac_addr(char *
/* NAND definitions */
#define NAND_CHIP_DELAY 25
+static int rb532_nand_fixup(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd->priv;
+
+ if (mtd->writesize == 512)
+ chip->ecc.layout = &rb532_nand_ecclayout;
+
+ return 0;
+}
+
static void __init rb532_nand_setup(void)
{
switch (mips_machtype) {
@@ -300,6 +323,8 @@ static void __init rb532_nand_setup(void
rb532_nand_data.chip.partitions = rb532_partition_info;
rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
+
+ rb532_nand_data.chip.chip_fixup = &rb532_nand_fixup;
}