mirror of https://github.com/hak5/openwrt.git
Add board specific code, autodetect the kernel, fixes #1707, thanks Gabor Juhos
SVN-Revision: 7398lede-17.01
Florian Fainelli
parent
87dace0887
commit
0e07a06c42
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@ -8,31 +8,49 @@
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include $(TOPDIR)/rules.mk
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LOADER := loader
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BZ_STARTUP_ORG := 0
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LOADER := adm5120
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LOADER_NAME := loader-$(LOADER)
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LOADER_DATA :=
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LOADER_BIN := $(KDIR)/$(LOADER_NAME).bin
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LOADER_GZ := $(KDIR)/$(LOADER_NAME).gz
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LOADER_ELF := $(KDIR)/$(LOADER_NAME).elf
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LZMA_STARTUP_ORG:= 0
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LZMA_TEXT_START := 0x80300000
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PKG_NAME := lzma-loader
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PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME)
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PKG_BUILD_DIR := $(KDIR)/$(PKG_NAME)
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.PHONY : loader-compile
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$(PKG_BUILD_DIR)/.prepared:
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mkdir $(PKG_BUILD_DIR)
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$(CP) ./src/* $(PKG_BUILD_DIR)/
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touch $@
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$(PKG_BUILD_DIR)/$(LOADER).gz: $(PKG_BUILD_DIR)/.prepared
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$(MAKE) -C $(PKG_BUILD_DIR) CC="$(TARGET_CC)" \
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LD="$(TARGET_CROSS)ld" CROSS_COMPILE="$(TARGET_CROSS)" \
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LOADER=$(LOADER) BZ_STARTUP_ORG=$(BZ_STARTUP_ORG)
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loader-compile: $(PKG_BUILD_DIR)/.prepared
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$(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
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LZMA_STARTUP_ORG=$(LZMA_STARTUP_ORG) \
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LZMA_TEXT_START=$(LZMA_TEXT_START) \
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LOADER_DATA=$(LOADER_DATA) \
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clean all
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$(LOADER_GZ): $(PKG_BUILD_DIR)/loader.bin
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gzip -nc9 $< > $@
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$(LOADER_ELF) : $(PKG_BUILD_DIR)/loader.elf
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$(CP) $< $@
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$(LOADER_BIN) : $(PKG_BUILD_DIR)/loader.bin
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$(CP) $< $@
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download:
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prepare: $(PKG_BUILD_DIR)/.prepared
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compile: $(PKG_BUILD_DIR)/$(LOADER).gz
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install:
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compile: loader-compile $(LOADER_BIN) $(LOADER_GZ) $(LOADER_ELF)
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ifneq ($(TARGET),)
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install: compile
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$(CP) $(PKG_BUILD_DIR)/$(LOADER).gz $(PKG_BUILD_DIR)/$(LOADER).elf $(PKG_BUILD_DIR)/$(LOADER).bin $(TARGET)/
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endif
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install:
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clean:
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rm -rf $(PKG_BUILD_DIR)
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rm -f $(KDIR)/loader-*.gz $(KDIR)/loader-*.elf $(KDIR)/loader-*.bin
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@ -22,51 +22,65 @@
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#
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LOADADDR := 0x80001000
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BZ_TEXT_START := 0x80300000
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BZ_STARTUP_ORG := 0
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LOADER := loader
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LZMA_TEXT_START := 0x80500000
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LZMA_STARTUP_ORG:= 0
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LOADER_DATA :=
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OBJCOPY := $(CROSS_COMPILE)objcopy -O binary -R .reginfo -R .note -R .comment -R .mdebug -S
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CC := $(CROSS_COMPILE)gcc
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LD := $(CROSS_COMPILE)ld
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OBJCOPY := $(CROSS_COMPILE)objcopy
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OBJDUMP := $(CROSS_COMPILE)objdump
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BIN_FLAGS := -O binary -R .reginfo -R .note -R .comment -R .mdebug -S
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CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
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-fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 -mno-abicalls -fno-pic \
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-ffunction-sections -pipe -mlong-calls -fno-common \
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-mabi=32 -march=mips32 -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap
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CFLAGS += -DLOADADDR=$(LOADADDR) -D_LZMA_IN_CB
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CFLAGS += -DLOADADDR=$(LOADADDR)
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ASFLAGS = $(CFLAGS) -D__ASSEMBLY__ -DBZ_STARTUP_ORG=$(BZ_STARTUP_ORG)
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ASFLAGS = $(CFLAGS) -D__ASSEMBLY__ -DLZMA_STARTUP_ORG=$(LZMA_STARTUP_ORG)
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LDFLAGS = -static --gc-sections -no-warn-mismatch
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LDFLAGS += -e startup -Ttext $(BZ_TEXT_START) -T loader.lds.in
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LDFLAGS += -e startup -T loader.lds -Ttext $(LZMA_TEXT_START)
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OBJECTS := $(LOADER)-head.o decompress.o LzmaDecode.o
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O_FORMAT = $(shell $(OBJDUMP) -i | head -2 | grep elf32)
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all: $(LOADER).gz $(LOADER).elf
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OBJECTS := head.o decompress.o board.o LzmaDecode.o
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ifneq ($(strip $(LOADER_DATA)),)
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OBJECTS += data.o
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CFLAGS += -DLZMA_WRAPPER=1
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else
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CFLAGS += -D_LZMA_IN_CB
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endif
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all: loader.bin
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# Don't build dependencies, this may die if $(CC) isn't gcc
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dep:
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install:
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decompress.o:
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$(CC) $(CFLAGS) -c decompress.c -o $@
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%.o : %.c
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$(CC) $(CFLAGS) -c -o $@ $<
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$(LOADER)-head.o:
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$(CC) $(ASFLAGS) -c head.S -o $@
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%.o : %.S
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$(CC) $(ASFLAGS) -c -o $@ $<
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$(LOADER).gz: $(LOADER).bin
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gzip -nc9 $< > $@
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data.o: $(LOADER_DATA)
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$(LD) -r -b binary --oformat $(O_FORMAT) -T lzma-data.lds -o $@ $<
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$(LOADER).elf: $(LOADER).o
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cp $< $@
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loader.bin: loader.elf
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$(OBJCOPY) $(BIN_FLAGS) $< $@
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$(LOADER).bin: $(LOADER).o
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$(OBJCOPY) -O binary $< $@
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$(LOADER).o: $(OBJECTS)
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loader.elf: $(OBJECTS)
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$(LD) $(LDFLAGS) -o $@ $(OBJECTS)
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mrproper: clean
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clean:
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rm -f *.gz *.elf *.bin *.o
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@ -0,0 +1,184 @@
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/*
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* ADM5120 specific board support for LZMA decompressor
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*
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* Copyright (C) 2007 OpenWrt.org
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* Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <stddef.h>
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#define READREG(r) *(volatile unsigned int *)(r)
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#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
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/*
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* INTC definitions
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*/
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#define INTC_BASE 0xB2200000
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/* INTC registers */
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#define INTC_REG_IRQ_DISABLE 0x0C
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/*
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* UART definitions
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*/
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#define UART_BASE 0xB2600000
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/* UART registers */
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#define UART_REG_DATA 0x00 /* Data register */
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#define UART_REG_ECR 0x04 /* Error Clear register */
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#define UART_REG_LCRH 0x08 /* Line Control High register */
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#define UART_REG_LCRM 0x0C /* Line Control Middle register */
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#define UART_REG_LCRL 0x10 /* Line Control Low register */
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#define UART_REG_CTRL 0x14 /* Control register */
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#define UART_REG_FLAG 0x18 /* Flag register */
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/* Control register bits */
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#define UART_CTRL_EN ( 1 << 0 ) /* UART enable */
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/* Line Control High register bits */
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#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */
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/* Flag register bits */
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#define UART_FLAG_CTS ( 1 << 0 )
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#define UART_FLAG_DSR ( 1 << 1 )
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#define UART_FLAG_DCD ( 1 << 2 )
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#define UART_FLAG_BUSY ( 1 << 3 )
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#define UART_FLAG_RXFE ( 1 << 4 ) /* RX FIFO empty */
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#define UART_FLAG_TXFF ( 1 << 5 ) /* TX FIFO full */
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#define UART_FLAG_RXFF ( 1 << 6 ) /* RX FIFO full */
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#define UART_FLAG_TXFE ( 1 << 7 ) /* TX FIFO empty */
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/*
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* SWITCH definitions
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*/
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#define SWITCH_BASE 0xB2000000
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#define SWITCH_REG_CPUP_CONF 0x0024
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#define SWITCH_REG_PORT_CONF0 0x0028
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#define SWITCH_REG_GPIO_CONF0 0x00B8
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#define SWITCH_REG_GPIO_CONF2 0x00BC
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#define SWITCH_REG_PORT0_LED 0x0100
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#define SWITCH_REG_PORT1_LED 0x0104
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#define SWITCH_REG_PORT2_LED 0x0108
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#define SWITCH_REG_PORT3_LED 0x010C
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#define SWITCH_REG_PORT4_LED 0x0110
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#define SWITCH_PORTS_HW 0x3F /* Hardware Ports */
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/* CPUP_CONF register bits */
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#define CPUP_CONF_DCPUP ( 1 << 0 ) /* Disable CPU port */
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/* PORT_CONF0 register bits */
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#define PORT_CONF0_DP_SHIFT 0 /* disable port shift*/
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/*
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* UART routines
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*/
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#define UART_READ(r) READREG(UART_BASE+(r))
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#define UART_WRITE(r,v) WRITEREG(UART_BASE+(r),(v))
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static void uart_init(void)
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{
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unsigned int t;
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/* disable uart */
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UART_WRITE(UART_REG_CTRL, 0);
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/* keep current baud rate */
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t = UART_READ(UART_REG_LCRM);
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UART_WRITE(UART_REG_LCRM, t);
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t = UART_READ(UART_REG_LCRL);
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UART_WRITE(UART_REG_LCRL, t);
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/* keep data, stop, and parity bits, but disable FIFO */
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t = UART_READ(UART_REG_LCRH);
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t &= ~(UART_LCRH_FEN);
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UART_WRITE(UART_REG_LCRH, t );
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/* clear error bits */
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UART_WRITE(UART_REG_ECR, 0xFF);
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/* enable uart, and disable interrupts */
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UART_WRITE(UART_REG_CTRL, UART_CTRL_EN);
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}
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static void uart_putc(int ch)
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{
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while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
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UART_WRITE(UART_REG_DATA, ch);
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while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFF) != 0);
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}
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/*
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* INTC routines
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*/
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#define INTC_READ(r) READREG(INTC_BASE+(r))
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#define INTC_WRITE(r,v) WRITEREG(INTC_BASE+(r),v)
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static void intc_init(void)
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{
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INTC_WRITE(INTC_REG_IRQ_DISABLE, 0xFFFFFFFF);
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}
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/*
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* SWITCH routines
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*/
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#define SWITCH_READ(r) READREG(SWITCH_BASE+(r))
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#define SWITCH_WRITE(r,v) WRITEREG(SWITCH_BASE+(r),v)
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static void switch_init(void)
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{
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/* disable PHYS ports */
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SWITCH_WRITE(SWITCH_REG_PORT_CONF0,
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(SWITCH_PORTS_HW << PORT_CONF0_DP_SHIFT));
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/* disable CPU port */
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SWITCH_WRITE(SWITCH_REG_CPUP_CONF, CPUP_CONF_DCPUP);
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/* disable GPIO lines */
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SWITCH_WRITE(SWITCH_REG_GPIO_CONF0, 0);
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SWITCH_WRITE(SWITCH_REG_GPIO_CONF2, 0);
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/* disable LED lines */
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SWITCH_WRITE(SWITCH_REG_PORT0_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT1_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT2_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT3_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT4_LED, 0);
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}
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/*
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* routines needed by decompress.c
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*/
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void board_putc(int ch)
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{
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uart_putc(ch);
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}
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void board_init(void)
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{
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intc_init();
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switch_init();
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uart_init();
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}
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@ -1,7 +1,8 @@
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/*
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* LZMA compressed kernel decompressor for bcm947xx boards
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* LZMA compressed kernel decompressor for ADM5120 boards
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*
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* Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
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* Copyright (C) 2007 OpenWrt.org
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -33,11 +34,18 @@
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* 24-Mar-2007 Gabor Juhos
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* pass original values of the a0,a1,a2,a3 registers to the kernel
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*
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* 19-May-2007 Gabor Juhos
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* endiannes related cleanups
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* add support for decompressing an embedded kernel
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*
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*/
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#include <stddef.h>
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#include "LzmaDecode.h"
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#define BCM4710_FLASH 0x1fc00000 /* Flash */
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#define ADM5120_FLASH_START 0x1fc00000 /* Flash start */
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#define ADM5120_FLASH_END 0x1fe00000 /* Flash end */
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#define KSEG0 0x80000000
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#define KSEG1 0xa0000000
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@ -54,7 +62,7 @@
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"cache %1, (%0);\n" \
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".set mips0;\n" \
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".set reorder\n" \
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: \
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: \
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: "r" (base), \
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"i" (op));
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@ -81,6 +89,7 @@ static __inline__ void blast_dcache(unsigned long size, unsigned long lsize)
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}
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#define TRX_MAGIC 0x30524448 /* "HDR0" */
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#define TRX_ALIGN 0x1000
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struct trx_header {
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unsigned int magic; /* "HDR0" */
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@ -92,26 +101,24 @@ struct trx_header {
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/* beyound the image end, size not known in advance */
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extern unsigned char workspace[];
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#if LZMA_WRAPPER
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extern unsigned char _lzma_data_start[];
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extern unsigned char _lzma_data_end[];
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#endif
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extern void board_init(void);
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extern void board_putc(int ch);
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unsigned int offset;
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unsigned char *data;
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unsigned long datalen;
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typedef void (*kernel_entry)(unsigned long reg_a0, unsigned long reg_a1,
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unsigned long reg_a2, unsigned long reg_a3);
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/* flash access should be aligned, so wrapper is used */
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/* read byte from the flash, all accesses are 32-bit aligned */
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static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize)
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{
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static unsigned int val;
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if (((unsigned int)offset % 4) == 0) {
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val = *(unsigned int *)data;
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data += 4;
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}
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*bufferSize = 1;
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*buffer = ((unsigned char *)&val) + (offset++ & 3);
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*buffer = data++;
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return LZMA_RESULT_OK;
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}
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@ -121,10 +128,90 @@ static __inline__ unsigned char get_byte(void)
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unsigned char *buffer;
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UInt32 fake;
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return read_byte(0, &buffer, &fake), *buffer;
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read_byte(0, &buffer, &fake);
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return *buffer;
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}
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int uart_write_str(char * str);
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static __inline__ unsigned int read_le32(void *buf)
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{
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unsigned char *p;
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p = buf;
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return ((unsigned int)p[0] + ((unsigned int)p[1] << 8) +
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((unsigned int)p[2] << 16) +((unsigned int)p[3] << 24));
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}
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static void print_char(char ch)
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{
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if (ch == '\n')
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board_putc('\r');
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board_putc(ch);
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}
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static void print_str(char * str)
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{
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while ( *str != 0 )
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print_char(*str++);
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}
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static void print_hex(int val)
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{
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int i;
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int tmp;
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print_str("0x");
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for ( i=0 ; i<8 ; i++ ) {
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tmp = (val >> ((7-i) * 4 )) & 0xf;
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tmp = tmp < 10 ? (tmp + '0') : (tmp + 'A' - 10);
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board_putc(tmp);
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}
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}
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static unsigned char *find_kernel(void)
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{
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struct trx_header *hdr;
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unsigned char *ret;
|
||||
|
||||
print_str("Looking for TRX header... ");
|
||||
/* look for trx header, 32-bit data access */
|
||||
hdr = NULL;
|
||||
for (ret = ((unsigned char *) KSEG1ADDR(ADM5120_FLASH_START));
|
||||
ret < ((unsigned char *)KSEG1ADDR(ADM5120_FLASH_END));
|
||||
ret += TRX_ALIGN) {
|
||||
|
||||
if (read_le32(ret) == TRX_MAGIC) {
|
||||
hdr = (struct trx_header *)ret;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (hdr == NULL) {
|
||||
print_str("not found!\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
print_str("found at ");
|
||||
print_hex((unsigned int)ret);
|
||||
print_str(", kernel in partition ");
|
||||
|
||||
/* compressed kernel is in the partition 0 or 1 */
|
||||
if ((read_le32(&hdr->offsets[1]) == 0) ||
|
||||
(read_le32(&hdr->offsets[1]) > 65536)) {
|
||||
ret += read_le32(&hdr->offsets[0]);
|
||||
print_str("0\n");
|
||||
} else {
|
||||
ret += read_le32(&hdr->offsets[1]);
|
||||
print_str("1\n");
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void halt(void)
|
||||
{
|
||||
print_str("\nSystem halted!\n");
|
||||
for(;;);
|
||||
}
|
||||
|
||||
/* should be the first function */
|
||||
void decompress_entry(unsigned long reg_a0, unsigned long reg_a1,
|
||||
|
|
@ -137,23 +224,27 @@ void decompress_entry(unsigned long reg_a0, unsigned long reg_a1,
|
|||
unsigned int lp; /* literal pos state bits */
|
||||
unsigned int pb; /* pos state bits */
|
||||
unsigned int osize; /* uncompressed size */
|
||||
|
||||
int res;
|
||||
#if !(LZMA_WRAPPER)
|
||||
ILzmaInCallback callback;
|
||||
callback.Read = read_byte;
|
||||
#endif
|
||||
|
||||
uart_write_str("decompress kernel ... ");
|
||||
board_init();
|
||||
|
||||
/* look for trx header, 32-bit data access */
|
||||
for (data = ((unsigned char *) KSEG1ADDR(BCM4710_FLASH));
|
||||
((struct trx_header *)data)->magic != TRX_MAGIC; data += 65536);
|
||||
print_str("\n\nLZMA loader for ADM5120, Copyright (C) 2007 OpenWrt.org\n\n");
|
||||
|
||||
/* compressed kernel is in the partition 0 or 1 */
|
||||
if (((struct trx_header *)data)->offsets[1] > 65536)
|
||||
data += ((struct trx_header *)data)->offsets[0];
|
||||
else
|
||||
data += ((struct trx_header *)data)->offsets[1];
|
||||
#if LZMA_WRAPPER
|
||||
data = _lzma_data_start;
|
||||
datalen = _lzma_data_end - _lzma_data_start;
|
||||
#else
|
||||
data = find_kernel();
|
||||
if (data == NULL) {
|
||||
/* no compressed kernel found, halting */
|
||||
halt();
|
||||
}
|
||||
|
||||
offset = 0;
|
||||
datalen = ((unsigned char *) KSEG1ADDR(ADM5120_FLASH_END))-data;
|
||||
#endif
|
||||
|
||||
/* lzma args */
|
||||
i = get_byte();
|
||||
|
|
@ -174,68 +265,33 @@ void decompress_entry(unsigned long reg_a0, unsigned long reg_a1,
|
|||
for (i = 0; i < 4; i++)
|
||||
get_byte();
|
||||
|
||||
print_str("decompressing kernel... ");
|
||||
|
||||
/* decompress kernel */
|
||||
if (LzmaDecode(workspace, ~0, lc, lp, pb, &callback,
|
||||
(unsigned char*)LOADADDR, osize, &i) == LZMA_RESULT_OK)
|
||||
{
|
||||
blast_dcache(dcache_size, dcache_lsize);
|
||||
blast_icache(icache_size, icache_lsize);
|
||||
|
||||
/* Jump to load address */
|
||||
uart_write_str("ok\r\n");
|
||||
((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3);
|
||||
#if LZMA_WRAPPER
|
||||
res = LzmaDecode(workspace, ~0, lc, lp, pb, data, datalen,
|
||||
(unsigned char*)LOADADDR, osize, &i);
|
||||
#else
|
||||
callback.Read = read_byte;
|
||||
res = LzmaDecode(workspace, ~0, lc, lp, pb, &callback,
|
||||
(unsigned char*)LOADADDR, osize, &i);
|
||||
#endif
|
||||
if (res != LZMA_RESULT_OK) {
|
||||
print_str("failed, LzmaDecode error: ");
|
||||
print_hex(res);
|
||||
print_str("\n");
|
||||
halt();
|
||||
}
|
||||
uart_write_str("failed\r\n");
|
||||
while (1 );
|
||||
|
||||
print_str("done!\n");
|
||||
|
||||
blast_dcache(dcache_size, dcache_lsize);
|
||||
blast_icache(icache_size, icache_lsize);
|
||||
|
||||
print_str("launching kernel...\n\n");
|
||||
|
||||
/* Jump to load address */
|
||||
((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3);
|
||||
}
|
||||
|
||||
/* *********************************************************************
|
||||
*
|
||||
* ADM5120 UART driver File: dev_adm_uart.c
|
||||
*
|
||||
* This is a console device driver for an ADM5120 UART
|
||||
*
|
||||
*********************************************************************
|
||||
*
|
||||
* Copyright 2006
|
||||
* Compex Systems. All rights reserved.
|
||||
*
|
||||
********************************************************************* */
|
||||
|
||||
#define READCSR(r) *(volatile UInt32 *)(0xB2600000+(r))
|
||||
#define WRITECSR(r,v) *(volatile UInt32 *)(0xB2600000+(r)) = v
|
||||
|
||||
#define UART_DR_REG 0x00
|
||||
#define UART_FR_REG 0x18
|
||||
#define UART_TX_FIFO_FULL 0x20
|
||||
|
||||
int uart_write(int val)
|
||||
{
|
||||
WRITECSR(UART_DR_REG, val);
|
||||
while ( (READCSR(UART_FR_REG) & UART_TX_FIFO_FULL) );
|
||||
return 0;
|
||||
}
|
||||
|
||||
int uart_write_str(char * str)
|
||||
{
|
||||
while ( *str != 0 ) {
|
||||
uart_write ( *str++ );
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int uart_write_hex(int val)
|
||||
{
|
||||
int i;
|
||||
int tmp;
|
||||
|
||||
uart_write_str("0x");
|
||||
for ( i=0 ; i<8 ; i++ ) {
|
||||
tmp = (val >> ((7-i) * 4 )) & 0xf;
|
||||
tmp = tmp < 10 ? (tmp + '0') : (tmp + 'A' - 10);
|
||||
uart_write(tmp);
|
||||
}
|
||||
uart_write_str("\r\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,11 @@
|
|||
|
||||
#define KSEG0 0x80000000
|
||||
|
||||
#define C0_STATUS $12
|
||||
#define C0_CAUSE $13
|
||||
#define C0_CONFIG $16
|
||||
#define C0_WATCHLO $18
|
||||
#define C0_WATCHHI $19
|
||||
#define C0_TAGLO $28
|
||||
#define C0_TAGHI $29
|
||||
|
||||
|
|
@ -40,17 +44,28 @@
|
|||
|
||||
.text
|
||||
|
||||
#if (BZ_STARTUP_ORG)
|
||||
#if (LZMA_STARTUP_ORG)
|
||||
.set noreorder
|
||||
|
||||
b startup
|
||||
nop
|
||||
|
||||
.org BZ_STARTUP_ORG
|
||||
.org LZMA_STARTUP_ORG
|
||||
#endif
|
||||
|
||||
LEAF(startup)
|
||||
.set noreorder
|
||||
.set mips32
|
||||
|
||||
mtc0 zero, C0_WATCHLO # clear watch registers
|
||||
mtc0 zero, C0_WATCHHI
|
||||
|
||||
mtc0 zero, C0_CAUSE # clear before writing status register
|
||||
|
||||
mfc0 t0, C0_STATUS # get status register
|
||||
li t1, ~(0xFF01)
|
||||
and t0, t1 # mask interrupts
|
||||
mtc0 t0, C0_STATUS # set up status register
|
||||
|
||||
move t1, ra # save return address
|
||||
la t0, __reloc_label # get linked address of label
|
||||
|
|
|
|||
|
|
@ -0,0 +1,27 @@
|
|||
OUTPUT_ARCH(mips)
|
||||
SECTIONS {
|
||||
.text : {
|
||||
_code_start = .;
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
}
|
||||
|
||||
.data : {
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
}
|
||||
_code_end = .;
|
||||
|
||||
.bss : {
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
}
|
||||
|
||||
. = ALIGN(16);
|
||||
. = . + 8192;
|
||||
_stack = .;
|
||||
|
||||
workspace = .;
|
||||
}
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
OUTPUT_ARCH(mips)
|
||||
SECTIONS {
|
||||
.text : {
|
||||
_code_start = .;
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
_code_end = .;
|
||||
}
|
||||
|
||||
.data : {
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
}
|
||||
|
||||
.bss : {
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
}
|
||||
|
||||
. = ALIGN(16);
|
||||
. = . + 8192;
|
||||
_stack = .;
|
||||
|
||||
workspace = .;
|
||||
}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
OUTPUT_ARCH(mips)
|
||||
SECTIONS {
|
||||
.rodata : {
|
||||
. = ALIGN(16);
|
||||
_lzma_data_start = .;
|
||||
*(.data)
|
||||
_lzma_data_end = .;
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue