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ar71xx: fix GPIO function handling on AR934x 

SVN-Revision: 29124
lede-17.01
Gabor Juhos 2011-11-14 17:43:13 +00:00
parent aa0c8c4885
commit 0c1d3617d7
2 changed files with 35 additions and 9 deletions
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42
target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
View File

@ -141,13 +141,21 @@ void ar71xx_gpio_function_enable(u32 mask)
{
void __iomem *base = ar71xx_gpio_base;
unsigned long flags;
unsigned int reg;
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
ar71xx_soc == AR71XX_SOC_AR9344) {
reg = AR934X_GPIO_REG_FUNC;
} else {
reg = AR71XX_GPIO_REG_FUNC;
}
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) | mask,
base + AR71XX_GPIO_REG_FUNC);
__raw_writel(__raw_readl(base + reg) | mask, base + reg);
/* flush write */
(void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
(void) __raw_readl(base + reg);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
@ -156,13 +164,21 @@ void ar71xx_gpio_function_disable(u32 mask)
{
void __iomem *base = ar71xx_gpio_base;
unsigned long flags;
unsigned int reg;
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
ar71xx_soc == AR71XX_SOC_AR9344) {
reg = AR934X_GPIO_REG_FUNC;
} else {
reg = AR71XX_GPIO_REG_FUNC;
}
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~mask,
base + AR71XX_GPIO_REG_FUNC);
__raw_writel(__raw_readl(base + reg) & ~mask, base + reg);
/* flush write */
(void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
(void) __raw_readl(base + reg);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
@ -171,13 +187,21 @@ void ar71xx_gpio_function_setup(u32 set, u32 clear)
{
void __iomem *base = ar71xx_gpio_base;
unsigned long flags;
unsigned int reg;
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
ar71xx_soc == AR71XX_SOC_AR9344) {
reg = AR934X_GPIO_REG_FUNC;
} else {
reg = AR71XX_GPIO_REG_FUNC;
}
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
__raw_writel((__raw_readl(base + AR71XX_GPIO_REG_FUNC) & ~clear) | set,
base + AR71XX_GPIO_REG_FUNC);
__raw_writel((__raw_readl(base + reg) & ~clear) | set, base + reg);
/* flush write */
(void) __raw_readl(base + AR71XX_GPIO_REG_FUNC);
(void) __raw_readl(base + reg);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}

2
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
View File

@ -430,6 +430,8 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
#define AR71XX_GPIO_REG_FUNC 0x28
#define AR934X_GPIO_REG_FUNC 0x6c
#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)