mirror of https://github.com/hak5/openwrt.git
Imre Kaloz
parent
a8d3dc4d94
commit
022ac5019d
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@ -293,6 +293,7 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437
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CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
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CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
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CONFIG_FAT_FS=m
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CONFIG_FAT_FS=m
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# CONFIG_FB is not set
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# CONFIG_FB is not set
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# CONFIG_FB_IBM_GXT4500 is not set
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# CONFIG_FDDI is not set
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# CONFIG_FDDI is not set
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# CONFIG_FEALNX is not set
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# CONFIG_FEALNX is not set
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CONFIG_FIB_RULES=y
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CONFIG_FIB_RULES=y
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@ -339,6 +340,7 @@ CONFIG_HOTPLUG=y
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# CONFIG_HWMON is not set
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# CONFIG_HWMON is not set
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# CONFIG_HWMON_VID is not set
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# CONFIG_HWMON_VID is not set
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# CONFIG_HZ_1000 is not set
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# CONFIG_HZ_1000 is not set
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# CONFIG_HZ_300 is not set
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# CONFIG_I2C_ALGOPCA is not set
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# CONFIG_I2C_ALGOPCA is not set
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# CONFIG_I2C_ALGOPCF is not set
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# CONFIG_I2C_ALGOPCF is not set
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# CONFIG_I2C_ALI1535 is not set
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# CONFIG_I2C_ALI1535 is not set
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@ -623,6 +625,7 @@ CONFIG_LOCKD_V4=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_LOG_BUF_SHIFT=14
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# CONFIG_LSF is not set
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# CONFIG_LSF is not set
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# CONFIG_LXT_PHY is not set
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# CONFIG_LXT_PHY is not set
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# CONFIG_MAC_EMUMOUSEBTN is not set
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CONFIG_MAC_PARTITION=y
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CONFIG_MAC_PARTITION=y
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# CONFIG_MAGIC_SYSRQ is not set
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# CONFIG_MAGIC_SYSRQ is not set
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# CONFIG_MARKEINS is not set
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# CONFIG_MARKEINS is not set
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@ -1107,6 +1110,7 @@ CONFIG_SERIAL_CORE=y
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CONFIG_SERIAL_CORE_CONSOLE=y
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CONFIG_SERIAL_CORE_CONSOLE=y
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# CONFIG_SERIAL_JSM is not set
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# CONFIG_SERIAL_JSM is not set
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# CONFIG_SERIAL_NONSTANDARD is not set
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# CONFIG_SERIAL_NONSTANDARD is not set
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# CONFIG_SERIAL_UARTLITE is not set
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# CONFIG_SERIO is not set
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# CONFIG_SERIO is not set
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# CONFIG_SGI_IOC4 is not set
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# CONFIG_SGI_IOC4 is not set
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# CONFIG_SGI_PARTITION is not set
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# CONFIG_SGI_PARTITION is not set
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@ -0,0 +1,249 @@
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/*
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* Support for IBM PPC 405EP-based MagicBox board
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* Copyright (C) 2006 Karol Lewandowski
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*
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* Heavily based on bubinga.c
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*
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* Author: SAW (IBM), derived from walnut.c.
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* Maintained by MontaVista Software <source@mvista.com>
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*
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* 2003 (c) MontaVista Softare Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/autoconf.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/threads.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/blkdev.h>
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#include <linux/pci.h>
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#include <linux/tty.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <asm/system.h>
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#include <asm/pci-bridge.h>
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#include <asm/processor.h>
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#include <asm/machdep.h>
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#include <asm/page.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/kgdb.h>
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#include <asm/ocp.h>
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#include <asm/ibm_ocp_pci.h>
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#include <platforms/4xx/ibm405ep.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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extern bd_t __res;
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/* Some IRQs unique to board
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* Used by the generic 405 PCI setup functions in ppc4xx_pci.c
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*/
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int __init
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ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
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{29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
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{30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
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{31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
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};
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const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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};
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/* The serial clock for the chip is an internal clock determined by
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* different clock speeds/dividers.
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* Calculate the proper input baud rate and setup the serial driver.
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*/
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static void __init
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magicbox_early_serial_map(void)
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{
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u32 uart_div;
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int uart_clock;
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struct uart_port port;
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/* Calculate the serial clock input frequency
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*
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* The base baud is the PLL OUTA (provided in the board info
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* structure) divided by the external UART Divisor, divided
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* by 16.
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*/
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uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
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uart_clock = __res.bi_procfreq / uart_div;
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/* Setup serial port access */
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memset(&port, 0, sizeof(port));
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port.membase = (void*)ACTING_UART0_IO_BASE;
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port.irq = ACTING_UART0_INT;
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port.uartclk = uart_clock;
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port.regshift = 0;
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port.iotype = SERIAL_IO_MEM;
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port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
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port.line = 0;
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if (early_serial_setup(&port) != 0) {
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printk("Early serial init of port 0 failed\n");
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}
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port.membase = (void*)ACTING_UART1_IO_BASE;
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port.irq = ACTING_UART1_INT;
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port.line = 1;
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if (early_serial_setup(&port) != 0) {
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printk("Early serial init of port 1 failed\n");
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}
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}
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void __init
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bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
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{
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unsigned int bar_response, bar;
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/*
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* Expected PCI mapping:
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*
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* PLB addr PCI memory addr
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* --------------------- ---------------------
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* 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
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* 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
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*
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* PLB addr PCI io addr
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* --------------------- ---------------------
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* e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
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*
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* The following code is simplified by assuming that the bootrom
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* has been well behaved in following this mapping.
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*/
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#ifdef DEBUG
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int i;
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printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
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printk("PCI bridge regs before fixup \n");
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for (i = 0; i <= 3; i++) {
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
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}
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printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
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printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
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printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
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printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
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#endif
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/* added for IBM boot rom version 1.15 bios bar changes -AK */
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/* Disable region first */
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out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
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/* PLB starting addr, PCI: 0x80000000 */
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out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
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/* PCI start addr, 0x80000000 */
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out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
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/* 512MB range of PLB to PCI */
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out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
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/* Enable no pre-fetch, enable region */
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out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
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(PPC405_PCI_UPPER_MEM -
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PPC405_PCI_MEM_BASE)) | 0x01));
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/* Disable region one */
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out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
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out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
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out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
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out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
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out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
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out_le32((void *) &(pcip->ptm1ms), 0x00000001);
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/* Disable region two */
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out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
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out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
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out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
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out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
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out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
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out_le32((void *) &(pcip->ptm2ms), 0x00000000);
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out_le32((void *) &(pcip->ptm2la), 0x00000000);
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/* Zero config bars */
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for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
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early_write_config_dword(hose, hose->first_busno,
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PCI_FUNC(hose->first_busno), bar,
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0x00000000);
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early_read_config_dword(hose, hose->first_busno,
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PCI_FUNC(hose->first_busno), bar,
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&bar_response);
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DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
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hose->first_busno, PCI_SLOT(hose->first_busno),
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PCI_FUNC(hose->first_busno), bar, bar_response);
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}
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/* end work arround */
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#ifdef DEBUG
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printk("PCI bridge regs after fixup \n");
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for (i = 0; i <= 3; i++) {
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
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printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
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}
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printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
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printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
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printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
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printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
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#endif /* DEBUG */
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}
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void __init
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magicbox_setup_arch(void)
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{
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ppc4xx_setup_arch();
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ibm_ocp_set_emac(0, 1);
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magicbox_early_serial_map();
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/* Identify the system */
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printk("MagicBox port (C) 2005 Karol Lewandowski <kl@jasmine.eu.org>\n");
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}
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void __init
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magicbox_map_io(void)
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{
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ppc4xx_map_io();
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}
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void __init
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platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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ppc4xx_init(r3, r4, r5, r6, r7);
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ppc_md.setup_arch = magicbox_setup_arch;
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ppc_md.setup_io_mappings = magicbox_map_io;
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#ifdef CONFIG_KGDB
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ppc_md.early_serial_map = bubinga_early_serial_map;
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#endif
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}
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@ -0,0 +1,47 @@
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/*
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* Support for IBM PPC 405EP-based MagicBox board
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*
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* Heavily based on bubinga.h
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*
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*
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* Author: SAW (IBM), derived from walnut.h.
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* Maintained by MontaVista Software <source@mvista.com>
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*
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* 2003 (c) MontaVista Softare Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __MAGICBOX_H__
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#define __MAGICBOX_H__
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#include <linux/autoconf.h>
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#include <platforms/4xx/ibm405ep.h>
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#include <asm/ppcboot.h>
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/* Memory map for the "MagicBox" 405EP evaluation board -- generic 4xx. */
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/* The UART clock is based off an internal clock -
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* define BASE_BAUD based on the internal clock and divider(s).
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* Since BASE_BAUD must be a constant, we will initialize it
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* using clock/divider values which OpenBIOS initializes
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* for typical configurations at various CPU speeds.
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* The base baud is calculated as (FWDA / EXT UART DIV / 16)
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*/
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#define BASE_BAUD 0
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/* Flash */
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#define PPC40x_FPGA_BASE 0xF0300000
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#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */
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#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
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#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
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#define PPC40x_FLASH_LOW 0xFFF00000
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#define PPC40x_FLASH_HIGH 0xFFF80000
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#define PPC40x_FLASH_SIZE 0x80000
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#define PPC4xx_MACHINE_NAME "MagicBox"
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#endif /* __MAGICBOX_H__ */
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#endif /* __KERNEL__ */
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@ -0,0 +1,147 @@
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/* Driver for MagicBox 2.0 onboard CompactFlash adapter.
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* Written by Wojtek Kaniewski <wojtekka@toxygen.net>
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*
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||||||
|
* GNU General Public License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/types.h>
|
||||||
|
#include <linux/mm.h>
|
||||||
|
#include <linux/interrupt.h>
|
||||||
|
#include <linux/blkdev.h>
|
||||||
|
#include <linux/hdreg.h>
|
||||||
|
#include <linux/ide.h>
|
||||||
|
#include <linux/delay.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
|
||||||
|
|
||||||
|
#define UIC0_PR 0xc4
|
||||||
|
#define UIC0_TR 0xc5
|
||||||
|
#define IRQ 25
|
||||||
|
|
||||||
|
static int ide_offsets[IDE_NR_PORTS] = {0, 2, 4, 6, 8, 10, 12, 14, -1, -1};
|
||||||
|
|
||||||
|
static u8 magicbox_ide_inb (unsigned long port)
|
||||||
|
{
|
||||||
|
return (u8) (readw((void __iomem *) port) >> 8) & 255;
|
||||||
|
}
|
||||||
|
|
||||||
|
static u16 magicbox_ide_inw (unsigned long port)
|
||||||
|
{
|
||||||
|
return (u16) readw((void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_insw (unsigned long port, void *addr, u32 count)
|
||||||
|
{
|
||||||
|
u16 *ptr;
|
||||||
|
|
||||||
|
for (ptr = addr; count--; ptr++)
|
||||||
|
*ptr = readw((void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static u32 magicbox_ide_inl (unsigned long port)
|
||||||
|
{
|
||||||
|
return (u32) readl((void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_insl (unsigned long port, void *addr, u32 count)
|
||||||
|
{
|
||||||
|
u32 *ptr;
|
||||||
|
|
||||||
|
for (ptr = addr; count--; ptr++)
|
||||||
|
*ptr = readl((void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_outb (u8 value, unsigned long port)
|
||||||
|
{
|
||||||
|
writew(value << 8, (void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
|
||||||
|
{
|
||||||
|
writew(value << 8, (void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_outw (u16 value, unsigned long port)
|
||||||
|
{
|
||||||
|
writew(value, (void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_outsw (unsigned long port, void *addr, u32 count)
|
||||||
|
{
|
||||||
|
u16 *ptr;
|
||||||
|
|
||||||
|
for (ptr = addr; count--; ptr++)
|
||||||
|
writew(*ptr, (void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_outl (u32 value, unsigned long port)
|
||||||
|
{
|
||||||
|
writel(value, (void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void magicbox_ide_outsl (unsigned long port, void *addr, u32 count)
|
||||||
|
{
|
||||||
|
u32 *ptr;
|
||||||
|
|
||||||
|
for (ptr = addr; count--; ptr++)
|
||||||
|
writel(*ptr, (void __iomem *) port);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static void __init ide_magicbox_register(unsigned long addr,
|
||||||
|
unsigned long caddr, int irq)
|
||||||
|
{
|
||||||
|
hw_regs_t hw;
|
||||||
|
ide_hwif_t *hwif;
|
||||||
|
|
||||||
|
memset(&hw, 0, sizeof(hw));
|
||||||
|
ide_setup_ports(&hw, addr, ide_offsets, caddr + 12, 0, NULL,irq);
|
||||||
|
|
||||||
|
if (ide_register_hw(&hw, &hwif) != -1)
|
||||||
|
{
|
||||||
|
printk(KERN_NOTICE "magicbox-ide: Registered IDE-CF driver\n");
|
||||||
|
hwif->mmio = 2;
|
||||||
|
hwif->drives[0].unmask = 1;
|
||||||
|
hwif->OUTB = magicbox_ide_outb;
|
||||||
|
hwif->OUTBSYNC = magicbox_ide_outbsync;
|
||||||
|
hwif->OUTW = magicbox_ide_outw;
|
||||||
|
hwif->OUTSW = magicbox_ide_outsw;
|
||||||
|
hwif->OUTSL = magicbox_ide_outsl;
|
||||||
|
hwif->INB = magicbox_ide_inb;
|
||||||
|
hwif->INW = magicbox_ide_inw;
|
||||||
|
hwif->INSW = magicbox_ide_insw;
|
||||||
|
hwif->INSL = magicbox_ide_insl;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init ide_magicbox_init(void)
|
||||||
|
{
|
||||||
|
volatile u16 *addr;
|
||||||
|
volatile u16 *caddr;
|
||||||
|
|
||||||
|
/* Turn on PerWE instead of PCIsomething */
|
||||||
|
mtdcr(DCRN_CPC0_PCI_BASE, mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
|
||||||
|
|
||||||
|
/* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
|
||||||
|
mtdcr(DCRN_EBC_BASE, 1);
|
||||||
|
mtdcr(DCRN_EBC_BASE + 1, 0xff11a000);
|
||||||
|
mtdcr(DCRN_EBC_BASE, 0x11);
|
||||||
|
mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
|
||||||
|
|
||||||
|
/* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
|
||||||
|
mtdcr(DCRN_EBC_BASE, 2);
|
||||||
|
mtdcr(DCRN_EBC_BASE + 1, 0xff21a000);
|
||||||
|
mtdcr(DCRN_EBC_BASE, 0x12);
|
||||||
|
mtdcr(DCRN_EBC_BASE + 1, 0x080bd800);
|
||||||
|
|
||||||
|
/* Remap physical address space */
|
||||||
|
addr = ioremap_nocache(0xff100000, 4096);
|
||||||
|
caddr = ioremap_nocache(0xff200000, 4096);
|
||||||
|
|
||||||
|
/* Set interrupt to low-to-high-edge-triggered */
|
||||||
|
mtdcr(UIC0_TR, mfdcr(UIC0_TR) & ~(0x80000000L >> IRQ));
|
||||||
|
mtdcr(UIC0_PR, mfdcr(UIC0_PR) | (0x80000000L >> IRQ));
|
||||||
|
|
||||||
|
ide_magicbox_register((unsigned long)addr, (unsigned long)caddr, IRQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,113 @@
|
||||||
|
/*
|
||||||
|
* magicmap.c: Copyleft 2005 Karol Lewandowski
|
||||||
|
*
|
||||||
|
* Mapping for MagicBox flash.
|
||||||
|
* Based on walnut.c.
|
||||||
|
*
|
||||||
|
* Heikki Lindholm <holindho@infradead.org>
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
* Free Software Foundation; either version 2 of the License, or (at your
|
||||||
|
* option) any later version.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/module.h>
|
||||||
|
#include <linux/types.h>
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/init.h>
|
||||||
|
#include <linux/mtd/mtd.h>
|
||||||
|
#include <linux/mtd/map.h>
|
||||||
|
#include <linux/mtd/partitions.h>
|
||||||
|
#include <linux/autoconf.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
|
||||||
|
static struct mtd_info *flash;
|
||||||
|
|
||||||
|
static struct map_info magic_map = {
|
||||||
|
.name = "Magically mapped flash",
|
||||||
|
.phys = 0xffc00000,
|
||||||
|
.size = 0x400000,
|
||||||
|
.bankwidth = 2,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct mtd_partition magic_partitions[] = {
|
||||||
|
{
|
||||||
|
.name = "linux",
|
||||||
|
.offset = 0x0,
|
||||||
|
.size = 0x3c0000,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "rootfs",
|
||||||
|
.offset = 0x100000,
|
||||||
|
.size = 0x2c0000,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "bootloader",
|
||||||
|
.offset = 0x3c0000,
|
||||||
|
.size = 0x040000,
|
||||||
|
.mask_flags = MTD_WRITEABLE,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
int __init init_magic(void)
|
||||||
|
{
|
||||||
|
u32 size, len;
|
||||||
|
|
||||||
|
magic_map.virt =
|
||||||
|
(void __iomem *)ioremap(magic_map.phys, magic_map.size);
|
||||||
|
|
||||||
|
if (!magic_map.virt) {
|
||||||
|
printk("Failed to ioremap flash.\n");
|
||||||
|
return -EIO;
|
||||||
|
}
|
||||||
|
|
||||||
|
simple_map_init(&magic_map);
|
||||||
|
|
||||||
|
flash = do_map_probe("cfi_probe", &magic_map);
|
||||||
|
if (flash) {
|
||||||
|
flash->owner = THIS_MODULE;
|
||||||
|
if (flash->read(flash, 12, sizeof(u32), &len, (char *) &size) ||
|
||||||
|
len != 4)
|
||||||
|
return -ENXIO;
|
||||||
|
size += 0x40; /* header size of the uImage */
|
||||||
|
if (size < 0x400000) {
|
||||||
|
/* skip to next erase block */
|
||||||
|
if (size & (flash->erasesize - 1)) {
|
||||||
|
size |= (flash->erasesize - 1);
|
||||||
|
size += 1;
|
||||||
|
}
|
||||||
|
magic_partitions[1].offset = size;
|
||||||
|
magic_partitions[1].size = magic_partitions[2].offset - size;
|
||||||
|
}
|
||||||
|
|
||||||
|
add_mtd_partitions(flash, magic_partitions,
|
||||||
|
ARRAY_SIZE(magic_partitions));
|
||||||
|
} else {
|
||||||
|
printk("map probe failed for flash\n");
|
||||||
|
return -ENXIO;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __exit cleanup_magic(void)
|
||||||
|
{
|
||||||
|
if (flash) {
|
||||||
|
del_mtd_partitions(flash);
|
||||||
|
map_destroy(flash);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (magic_map.virt) {
|
||||||
|
iounmap((void *)magic_map.virt);
|
||||||
|
magic_map.virt = NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
module_init(init_magic);
|
||||||
|
module_exit(cleanup_magic);
|
||||||
|
|
||||||
|
MODULE_LICENSE("GPL");
|
||||||
|
MODULE_AUTHOR("Karol Lewandowski");
|
||||||
|
MODULE_DESCRIPTION("MTD map and partitions for IBM 405EP MagicBox boards");
|
||||||
|
|
@ -18,8 +18,8 @@ diff -urN linux.old/arch/ppc/platforms/4xx/Kconfig linux.dev/arch/ppc/platforms/
|
||||||
|
|
||||||
config IBM_OCP
|
config IBM_OCP
|
||||||
bool
|
bool
|
||||||
- depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
|
- depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT
|
||||||
+ depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT || MAGICBOX
|
+ depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT || MAGICBOX
|
||||||
default y
|
default y
|
||||||
|
|
||||||
config IBM_EMAC4
|
config IBM_EMAC4
|
||||||
|
|
@ -41,310 +41,6 @@ diff -urN linux.old/arch/ppc/platforms/4xx/Kconfig linux.dev/arch/ppc/platforms/
|
||||||
default y
|
default y
|
||||||
|
|
||||||
config 405GP
|
config 405GP
|
||||||
diff -urN linux.old/arch/ppc/platforms/4xx/magicbox.c linux.dev/arch/ppc/platforms/4xx/magicbox.c
|
|
||||||
--- linux.old/arch/ppc/platforms/4xx/magicbox.c 1970-01-01 01:00:00.000000000 +0100
|
|
||||||
+++ linux.dev/arch/ppc/platforms/4xx/magicbox.c 2006-12-14 08:48:56.000000000 +0100
|
|
||||||
@@ -0,0 +1,249 @@
|
|
||||||
+/*
|
|
||||||
+ * Support for IBM PPC 405EP-based MagicBox board
|
|
||||||
+ * Copyright (C) 2006 Karol Lewandowski
|
|
||||||
+ *
|
|
||||||
+ * Heavily based on bubinga.c
|
|
||||||
+ *
|
|
||||||
+ * Author: SAW (IBM), derived from walnut.c.
|
|
||||||
+ * Maintained by MontaVista Software <source@mvista.com>
|
|
||||||
+ *
|
|
||||||
+ * 2003 (c) MontaVista Softare Inc. This file is licensed under the
|
|
||||||
+ * terms of the GNU General Public License version 2. This program is
|
|
||||||
+ * licensed "as is" without any warranty of any kind, whether express
|
|
||||||
+ * or implied.
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#include <linux/autoconf.h>
|
|
||||||
+#include <linux/init.h>
|
|
||||||
+#include <linux/smp.h>
|
|
||||||
+#include <linux/threads.h>
|
|
||||||
+#include <linux/param.h>
|
|
||||||
+#include <linux/string.h>
|
|
||||||
+#include <linux/blkdev.h>
|
|
||||||
+#include <linux/pci.h>
|
|
||||||
+#include <linux/tty.h>
|
|
||||||
+#include <linux/serial.h>
|
|
||||||
+#include <linux/serial_core.h>
|
|
||||||
+
|
|
||||||
+#include <asm/system.h>
|
|
||||||
+#include <asm/pci-bridge.h>
|
|
||||||
+#include <asm/processor.h>
|
|
||||||
+#include <asm/machdep.h>
|
|
||||||
+#include <asm/page.h>
|
|
||||||
+#include <asm/time.h>
|
|
||||||
+#include <asm/io.h>
|
|
||||||
+#include <asm/kgdb.h>
|
|
||||||
+#include <asm/ocp.h>
|
|
||||||
+#include <asm/ibm_ocp_pci.h>
|
|
||||||
+
|
|
||||||
+#include <platforms/4xx/ibm405ep.h>
|
|
||||||
+
|
|
||||||
+#undef DEBUG
|
|
||||||
+
|
|
||||||
+#ifdef DEBUG
|
|
||||||
+#define DBG(x...) printk(x)
|
|
||||||
+#else
|
|
||||||
+#define DBG(x...)
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
+extern bd_t __res;
|
|
||||||
+
|
|
||||||
+/* Some IRQs unique to board
|
|
||||||
+ * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
|
|
||||||
+ */
|
|
||||||
+int __init
|
|
||||||
+ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
|
|
||||||
+{
|
|
||||||
+ static char pci_irq_table[][4] =
|
|
||||||
+ /*
|
|
||||||
+ * PCI IDSEL/INTPIN->INTLINE
|
|
||||||
+ * A B C D
|
|
||||||
+ */
|
|
||||||
+ {
|
|
||||||
+ {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
|
|
||||||
+ {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
|
|
||||||
+ {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
|
|
||||||
+ {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
|
|
||||||
+ return PCI_IRQ_TABLE_LOOKUP;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+
|
|
||||||
+/* The serial clock for the chip is an internal clock determined by
|
|
||||||
+ * different clock speeds/dividers.
|
|
||||||
+ * Calculate the proper input baud rate and setup the serial driver.
|
|
||||||
+ */
|
|
||||||
+static void __init
|
|
||||||
+magicbox_early_serial_map(void)
|
|
||||||
+{
|
|
||||||
+ u32 uart_div;
|
|
||||||
+ int uart_clock;
|
|
||||||
+ struct uart_port port;
|
|
||||||
+
|
|
||||||
+ /* Calculate the serial clock input frequency
|
|
||||||
+ *
|
|
||||||
+ * The base baud is the PLL OUTA (provided in the board info
|
|
||||||
+ * structure) divided by the external UART Divisor, divided
|
|
||||||
+ * by 16.
|
|
||||||
+ */
|
|
||||||
+ uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
|
|
||||||
+ uart_clock = __res.bi_procfreq / uart_div;
|
|
||||||
+
|
|
||||||
+ /* Setup serial port access */
|
|
||||||
+ memset(&port, 0, sizeof(port));
|
|
||||||
+ port.membase = (void*)ACTING_UART0_IO_BASE;
|
|
||||||
+ port.irq = ACTING_UART0_INT;
|
|
||||||
+ port.uartclk = uart_clock;
|
|
||||||
+ port.regshift = 0;
|
|
||||||
+ port.iotype = SERIAL_IO_MEM;
|
|
||||||
+ port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
|
|
||||||
+ port.line = 0;
|
|
||||||
+
|
|
||||||
+ if (early_serial_setup(&port) != 0) {
|
|
||||||
+ printk("Early serial init of port 0 failed\n");
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ port.membase = (void*)ACTING_UART1_IO_BASE;
|
|
||||||
+ port.irq = ACTING_UART1_INT;
|
|
||||||
+ port.line = 1;
|
|
||||||
+
|
|
||||||
+ if (early_serial_setup(&port) != 0) {
|
|
||||||
+ printk("Early serial init of port 1 failed\n");
|
|
||||||
+ }
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+void __init
|
|
||||||
+bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
|
|
||||||
+{
|
|
||||||
+ unsigned int bar_response, bar;
|
|
||||||
+ /*
|
|
||||||
+ * Expected PCI mapping:
|
|
||||||
+ *
|
|
||||||
+ * PLB addr PCI memory addr
|
|
||||||
+ * --------------------- ---------------------
|
|
||||||
+ * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
|
|
||||||
+ * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
|
|
||||||
+ *
|
|
||||||
+ * PLB addr PCI io addr
|
|
||||||
+ * --------------------- ---------------------
|
|
||||||
+ * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
|
|
||||||
+ *
|
|
||||||
+ * The following code is simplified by assuming that the bootrom
|
|
||||||
+ * has been well behaved in following this mapping.
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#ifdef DEBUG
|
|
||||||
+ int i;
|
|
||||||
+
|
|
||||||
+ printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
|
|
||||||
+ printk("PCI bridge regs before fixup \n");
|
|
||||||
+ for (i = 0; i <= 3; i++) {
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
|
|
||||||
+ }
|
|
||||||
+ printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
|
|
||||||
+ printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
|
|
||||||
+ printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
|
|
||||||
+ printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
|
|
||||||
+
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
+ /* added for IBM boot rom version 1.15 bios bar changes -AK */
|
|
||||||
+
|
|
||||||
+ /* Disable region first */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
|
|
||||||
+ /* PLB starting addr, PCI: 0x80000000 */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
|
|
||||||
+ /* PCI start addr, 0x80000000 */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
|
|
||||||
+ /* 512MB range of PLB to PCI */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
|
|
||||||
+ /* Enable no pre-fetch, enable region */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
|
|
||||||
+ (PPC405_PCI_UPPER_MEM -
|
|
||||||
+ PPC405_PCI_MEM_BASE)) | 0x01));
|
|
||||||
+
|
|
||||||
+ /* Disable region one */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->ptm1ms), 0x00000001);
|
|
||||||
+
|
|
||||||
+ /* Disable region two */
|
|
||||||
+ out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->ptm2ms), 0x00000000);
|
|
||||||
+ out_le32((void *) &(pcip->ptm2la), 0x00000000);
|
|
||||||
+
|
|
||||||
+ /* Zero config bars */
|
|
||||||
+ for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
|
|
||||||
+ early_write_config_dword(hose, hose->first_busno,
|
|
||||||
+ PCI_FUNC(hose->first_busno), bar,
|
|
||||||
+ 0x00000000);
|
|
||||||
+ early_read_config_dword(hose, hose->first_busno,
|
|
||||||
+ PCI_FUNC(hose->first_busno), bar,
|
|
||||||
+ &bar_response);
|
|
||||||
+ DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
|
|
||||||
+ hose->first_busno, PCI_SLOT(hose->first_busno),
|
|
||||||
+ PCI_FUNC(hose->first_busno), bar, bar_response);
|
|
||||||
+ }
|
|
||||||
+ /* end work arround */
|
|
||||||
+
|
|
||||||
+#ifdef DEBUG
|
|
||||||
+ printk("PCI bridge regs after fixup \n");
|
|
||||||
+ for (i = 0; i <= 3; i++) {
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
|
|
||||||
+ printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
|
|
||||||
+ }
|
|
||||||
+ printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
|
|
||||||
+ printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
|
|
||||||
+ printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
|
|
||||||
+ printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
|
|
||||||
+
|
|
||||||
+#endif /* DEBUG */
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+void __init
|
|
||||||
+magicbox_setup_arch(void)
|
|
||||||
+{
|
|
||||||
+ ppc4xx_setup_arch();
|
|
||||||
+
|
|
||||||
+ ibm_ocp_set_emac(0, 1);
|
|
||||||
+
|
|
||||||
+ magicbox_early_serial_map();
|
|
||||||
+
|
|
||||||
+ /* Identify the system */
|
|
||||||
+ printk("MagicBox port (C) 2005 Karol Lewandowski <kl@jasmine.eu.org>\n");
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+void __init
|
|
||||||
+magicbox_map_io(void)
|
|
||||||
+{
|
|
||||||
+ ppc4xx_map_io();
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+void __init
|
|
||||||
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
|
||||||
+ unsigned long r6, unsigned long r7)
|
|
||||||
+{
|
|
||||||
+ ppc4xx_init(r3, r4, r5, r6, r7);
|
|
||||||
+
|
|
||||||
+ ppc_md.setup_arch = magicbox_setup_arch;
|
|
||||||
+ ppc_md.setup_io_mappings = magicbox_map_io;
|
|
||||||
+
|
|
||||||
+#ifdef CONFIG_KGDB
|
|
||||||
+ ppc_md.early_serial_map = bubinga_early_serial_map;
|
|
||||||
+#endif
|
|
||||||
+
|
|
||||||
+}
|
|
||||||
diff -urN linux.old/arch/ppc/platforms/4xx/magicbox.h linux.dev/arch/ppc/platforms/4xx/magicbox.h
|
|
||||||
--- linux.old/arch/ppc/platforms/4xx/magicbox.h 1970-01-01 01:00:00.000000000 +0100
|
|
||||||
+++ linux.dev/arch/ppc/platforms/4xx/magicbox.h 2006-12-14 08:48:56.000000000 +0100
|
|
||||||
@@ -0,0 +1,47 @@
|
|
||||||
+/*
|
|
||||||
+ * Support for IBM PPC 405EP-based MagicBox board
|
|
||||||
+ *
|
|
||||||
+ * Heavily based on bubinga.h
|
|
||||||
+ *
|
|
||||||
+ *
|
|
||||||
+ * Author: SAW (IBM), derived from walnut.h.
|
|
||||||
+ * Maintained by MontaVista Software <source@mvista.com>
|
|
||||||
+ *
|
|
||||||
+ * 2003 (c) MontaVista Softare Inc. This file is licensed under the
|
|
||||||
+ * terms of the GNU General Public License version 2. This program is
|
|
||||||
+ * licensed "as is" without any warranty of any kind, whether express
|
|
||||||
+ * or implied.
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#ifdef __KERNEL__
|
|
||||||
+#ifndef __MAGICBOX_H__
|
|
||||||
+#define __MAGICBOX_H__
|
|
||||||
+
|
|
||||||
+#include <linux/autoconf.h>
|
|
||||||
+#include <platforms/4xx/ibm405ep.h>
|
|
||||||
+#include <asm/ppcboot.h>
|
|
||||||
+
|
|
||||||
+/* Memory map for the "MagicBox" 405EP evaluation board -- generic 4xx. */
|
|
||||||
+
|
|
||||||
+/* The UART clock is based off an internal clock -
|
|
||||||
+ * define BASE_BAUD based on the internal clock and divider(s).
|
|
||||||
+ * Since BASE_BAUD must be a constant, we will initialize it
|
|
||||||
+ * using clock/divider values which OpenBIOS initializes
|
|
||||||
+ * for typical configurations at various CPU speeds.
|
|
||||||
+ * The base baud is calculated as (FWDA / EXT UART DIV / 16)
|
|
||||||
+ */
|
|
||||||
+#define BASE_BAUD 0
|
|
||||||
+
|
|
||||||
+/* Flash */
|
|
||||||
+#define PPC40x_FPGA_BASE 0xF0300000
|
|
||||||
+#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */
|
|
||||||
+#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
|
|
||||||
+#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
|
|
||||||
+#define PPC40x_FLASH_LOW 0xFFF00000
|
|
||||||
+#define PPC40x_FLASH_HIGH 0xFFF80000
|
|
||||||
+#define PPC40x_FLASH_SIZE 0x80000
|
|
||||||
+
|
|
||||||
+#define PPC4xx_MACHINE_NAME "MagicBox"
|
|
||||||
+
|
|
||||||
+#endif /* __MAGICBOX_H__ */
|
|
||||||
+#endif /* __KERNEL__ */
|
|
||||||
diff -urN linux.old/arch/ppc/platforms/4xx/Makefile linux.dev/arch/ppc/platforms/4xx/Makefile
|
diff -urN linux.old/arch/ppc/platforms/4xx/Makefile linux.dev/arch/ppc/platforms/4xx/Makefile
|
||||||
--- linux.old/arch/ppc/platforms/4xx/Makefile 2006-11-29 22:57:37.000000000 +0100
|
--- linux.old/arch/ppc/platforms/4xx/Makefile 2006-11-29 22:57:37.000000000 +0100
|
||||||
+++ linux.dev/arch/ppc/platforms/4xx/Makefile 2006-12-14 08:48:56.000000000 +0100
|
+++ linux.dev/arch/ppc/platforms/4xx/Makefile 2006-12-14 08:48:56.000000000 +0100
|
||||||
|
|
|
||||||
|
|
@ -17,123 +17,6 @@ diff -urN linux.old/drivers/mtd/maps/Kconfig linux.dev/drivers/mtd/maps/Kconfig
|
||||||
config MTD_EBONY
|
config MTD_EBONY
|
||||||
tristate "Flash devices mapped on IBM 440GP Ebony"
|
tristate "Flash devices mapped on IBM 440GP Ebony"
|
||||||
depends on MTD_JEDECPROBE && EBONY
|
depends on MTD_JEDECPROBE && EBONY
|
||||||
diff -urN linux.old/drivers/mtd/maps/magicmap.c linux.dev/drivers/mtd/maps/magicmap.c
|
|
||||||
--- linux.old/drivers/mtd/maps/magicmap.c 1970-01-01 01:00:00.000000000 +0100
|
|
||||||
+++ linux.dev/drivers/mtd/maps/magicmap.c 2006-08-30 06:52:34.000000000 +0200
|
|
||||||
@@ -0,0 +1,113 @@
|
|
||||||
+/*
|
|
||||||
+ * magicmap.c: Copyleft 2005 Karol Lewandowski
|
|
||||||
+ *
|
|
||||||
+ * Mapping for MagicBox flash.
|
|
||||||
+ * Based on walnut.c.
|
|
||||||
+ *
|
|
||||||
+ * Heikki Lindholm <holindho@infradead.org>
|
|
||||||
+ *
|
|
||||||
+ *
|
|
||||||
+ * This program is free software; you can redistribute it and/or modify it
|
|
||||||
+ * under the terms of the GNU General Public License as published by the
|
|
||||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
|
||||||
+ * option) any later version.
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+#include <linux/module.h>
|
|
||||||
+#include <linux/types.h>
|
|
||||||
+#include <linux/kernel.h>
|
|
||||||
+#include <linux/init.h>
|
|
||||||
+#include <linux/mtd/mtd.h>
|
|
||||||
+#include <linux/mtd/map.h>
|
|
||||||
+#include <linux/mtd/partitions.h>
|
|
||||||
+#include <linux/autoconf.h>
|
|
||||||
+#include <asm/io.h>
|
|
||||||
+
|
|
||||||
+static struct mtd_info *flash;
|
|
||||||
+
|
|
||||||
+static struct map_info magic_map = {
|
|
||||||
+ .name = "Magically mapped flash",
|
|
||||||
+ .phys = 0xffc00000,
|
|
||||||
+ .size = 0x400000,
|
|
||||||
+ .bankwidth = 2,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+static struct mtd_partition magic_partitions[] = {
|
|
||||||
+ {
|
|
||||||
+ .name = "linux",
|
|
||||||
+ .offset = 0x0,
|
|
||||||
+ .size = 0x3c0000,
|
|
||||||
+ },
|
|
||||||
+ {
|
|
||||||
+ .name = "rootfs",
|
|
||||||
+ .offset = 0x100000,
|
|
||||||
+ .size = 0x2c0000,
|
|
||||||
+ },
|
|
||||||
+ {
|
|
||||||
+ .name = "bootloader",
|
|
||||||
+ .offset = 0x3c0000,
|
|
||||||
+ .size = 0x040000,
|
|
||||||
+ .mask_flags = MTD_WRITEABLE,
|
|
||||||
+ },
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+int __init init_magic(void)
|
|
||||||
+{
|
|
||||||
+ u32 size, len;
|
|
||||||
+
|
|
||||||
+ magic_map.virt =
|
|
||||||
+ (void __iomem *)ioremap(magic_map.phys, magic_map.size);
|
|
||||||
+
|
|
||||||
+ if (!magic_map.virt) {
|
|
||||||
+ printk("Failed to ioremap flash.\n");
|
|
||||||
+ return -EIO;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ simple_map_init(&magic_map);
|
|
||||||
+
|
|
||||||
+ flash = do_map_probe("cfi_probe", &magic_map);
|
|
||||||
+ if (flash) {
|
|
||||||
+ flash->owner = THIS_MODULE;
|
|
||||||
+ if (flash->read(flash, 12, sizeof(u32), &len, (char *) &size) ||
|
|
||||||
+ len != 4)
|
|
||||||
+ return -ENXIO;
|
|
||||||
+ size += 0x40; /* header size of the uImage */
|
|
||||||
+ if (size < 0x400000) {
|
|
||||||
+ /* skip to next erase block */
|
|
||||||
+ if (size & (flash->erasesize - 1)) {
|
|
||||||
+ size |= (flash->erasesize - 1);
|
|
||||||
+ size += 1;
|
|
||||||
+ }
|
|
||||||
+ magic_partitions[1].offset = size;
|
|
||||||
+ magic_partitions[1].size = magic_partitions[2].offset - size;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ add_mtd_partitions(flash, magic_partitions,
|
|
||||||
+ ARRAY_SIZE(magic_partitions));
|
|
||||||
+ } else {
|
|
||||||
+ printk("map probe failed for flash\n");
|
|
||||||
+ return -ENXIO;
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ return 0;
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+static void __exit cleanup_magic(void)
|
|
||||||
+{
|
|
||||||
+ if (flash) {
|
|
||||||
+ del_mtd_partitions(flash);
|
|
||||||
+ map_destroy(flash);
|
|
||||||
+ }
|
|
||||||
+
|
|
||||||
+ if (magic_map.virt) {
|
|
||||||
+ iounmap((void *)magic_map.virt);
|
|
||||||
+ magic_map.virt = NULL;
|
|
||||||
+ }
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
+module_init(init_magic);
|
|
||||||
+module_exit(cleanup_magic);
|
|
||||||
+
|
|
||||||
+MODULE_LICENSE("GPL");
|
|
||||||
+MODULE_AUTHOR("Karol Lewandowski");
|
|
||||||
+MODULE_DESCRIPTION("MTD map and partitions for IBM 405EP MagicBox boards");
|
|
||||||
diff -urN linux.old/drivers/mtd/maps/Makefile linux.dev/drivers/mtd/maps/Makefile
|
diff -urN linux.old/drivers/mtd/maps/Makefile linux.dev/drivers/mtd/maps/Makefile
|
||||||
--- linux.old/drivers/mtd/maps/Makefile 2006-08-30 06:30:59.000000000 +0200
|
--- linux.old/drivers/mtd/maps/Makefile 2006-08-30 06:30:59.000000000 +0200
|
||||||
+++ linux.dev/drivers/mtd/maps/Makefile 2006-08-30 06:11:51.000000000 +0200
|
+++ linux.dev/drivers/mtd/maps/Makefile 2006-08-30 06:11:51.000000000 +0200
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue